ia64/xen-unstable

changeset 11827:a7c6b1c5507c

[IA64] remove unused vmx/mm.c file

Signed-off-by: Tristan Gingold <tristan.gingold@bull.net>
author awilliam@xenbuild.aw
date Sun Oct 22 14:14:58 2006 -0600 (2006-10-22)
parents 463658ccf683
children d5a46e4cc340
files xen/arch/ia64/vmx/mm.c
line diff
     1.1 --- a/xen/arch/ia64/vmx/mm.c	Sun Oct 22 14:12:30 2006 -0600
     1.2 +++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
     1.3 @@ -1,153 +0,0 @@
     1.4 -/******************************************************************************
     1.5 - * arch/ia64/mm.c
     1.6 - * 
     1.7 - * Copyright (c) 2002-2005 K A Fraser
     1.8 - * Copyright (c) 2004 Christian Limpach
     1.9 - * Copyright (c) 2005, Intel Corporation.
    1.10 - *  Xuefei Xu (Anthony Xu) (Anthony.xu@intel.com)
    1.11 - * 
    1.12 - * This program is free software; you can redistribute it and/or modify
    1.13 - * it under the terms of the GNU General Public License as published by
    1.14 - * the Free Software Foundation; either version 2 of the License, or
    1.15 - * (at your option) any later version.
    1.16 - * 
    1.17 - * This program is distributed in the hope that it will be useful,
    1.18 - * but WITHOUT ANY WARRANTY; without even the implied warranty of
    1.19 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    1.20 - * GNU General Public License for more details.
    1.21 - * 
    1.22 - * You should have received a copy of the GNU General Public License
    1.23 - * along with this program; if not, write to the Free Software
    1.24 - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
    1.25 - */
    1.26 -
    1.27 -/*
    1.28 - * A description of the x86 page table API:
    1.29 - * 
    1.30 - * Domains trap to do_mmu_update with a list of update requests.
    1.31 - * This is a list of (ptr, val) pairs, where the requested operation
    1.32 - * is *ptr = val.
    1.33 - * 
    1.34 - * Reference counting of pages:
    1.35 - * ----------------------------
    1.36 - * Each page has two refcounts: tot_count and type_count.
    1.37 - * 
    1.38 - * TOT_COUNT is the obvious reference count. It counts all uses of a
    1.39 - * physical page frame by a domain, including uses as a page directory,
    1.40 - * a page table, or simple mappings via a PTE. This count prevents a
    1.41 - * domain from releasing a frame back to the free pool when it still holds
    1.42 - * a reference to it.
    1.43 - * 
    1.44 - * TYPE_COUNT is more subtle. A frame can be put to one of three
    1.45 - * mutually-exclusive uses: it might be used as a page directory, or a
    1.46 - * page table, or it may be mapped writable by the domain [of course, a
    1.47 - * frame may not be used in any of these three ways!].
    1.48 - * So, type_count is a count of the number of times a frame is being 
    1.49 - * referred to in its current incarnation. Therefore, a page can only
    1.50 - * change its type when its type count is zero.
    1.51 - * 
    1.52 - * Pinning the page type:
    1.53 - * ----------------------
    1.54 - * The type of a page can be pinned/unpinned with the commands
    1.55 - * MMUEXT_[UN]PIN_L?_TABLE. Each page can be pinned exactly once (that is,
    1.56 - * pinning is not reference counted, so it can't be nested).
    1.57 - * This is useful to prevent a page's type count falling to zero, at which
    1.58 - * point safety checks would need to be carried out next time the count
    1.59 - * is increased again.
    1.60 - * 
    1.61 - * A further note on writable page mappings:
    1.62 - * -----------------------------------------
    1.63 - * For simplicity, the count of writable mappings for a page may not
    1.64 - * correspond to reality. The 'writable count' is incremented for every
    1.65 - * PTE which maps the page with the _PAGE_RW flag set. However, for
    1.66 - * write access to be possible the page directory entry must also have
    1.67 - * its _PAGE_RW bit set. We do not check this as it complicates the 
    1.68 - * reference counting considerably [consider the case of multiple
    1.69 - * directory entries referencing a single page table, some with the RW
    1.70 - * bit set, others not -- it starts getting a bit messy].
    1.71 - * In normal use, this simplification shouldn't be a problem.
    1.72 - * However, the logic can be added if required.
    1.73 - * 
    1.74 - * One more note on read-only page mappings:
    1.75 - * -----------------------------------------
    1.76 - * We want domains to be able to map pages for read-only access. The
    1.77 - * main reason is that page tables and directories should be readable
    1.78 - * by a domain, but it would not be safe for them to be writable.
    1.79 - * However, domains have free access to rings 1 & 2 of the Intel
    1.80 - * privilege model. In terms of page protection, these are considered
    1.81 - * to be part of 'supervisor mode'. The WP bit in CR0 controls whether
    1.82 - * read-only restrictions are respected in supervisor mode -- if the 
    1.83 - * bit is clear then any mapped page is writable.
    1.84 - * 
    1.85 - * We get round this by always setting the WP bit and disallowing 
    1.86 - * updates to it. This is very unlikely to cause a problem for guest
    1.87 - * OS's, which will generally use the WP bit to simplify copy-on-write
    1.88 - * implementation (in that case, OS wants a fault when it writes to
    1.89 - * an application-supplied buffer).
    1.90 - */
    1.91 -
    1.92 -#include <xen/config.h>
    1.93 -//#include <public/xen.h>
    1.94 -#include <xen/init.h>
    1.95 -#include <xen/lib.h>
    1.96 -#include <xen/mm.h>
    1.97 -#include <xen/errno.h>
    1.98 -#include <asm/vmx_vcpu.h>
    1.99 -#include <asm/vmmu.h>
   1.100 -#include <asm/regionreg.h>
   1.101 -#include <asm/vmx_mm_def.h>
   1.102 -/*
   1.103 -        uregs->ptr is virtual address
   1.104 -        uregs->val is pte value
   1.105 - */
   1.106 -int vmx_do_mmu_update(mmu_update_t *ureqs,u64 count,u64 *pdone,u64 foreigndom)
   1.107 -{
   1.108 -    int i,cmd;
   1.109 -    u64 mfn, gpfn;
   1.110 -    VCPU *vcpu;
   1.111 -    mmu_update_t req;
   1.112 -    /* ia64_rr rr; */
   1.113 -    thash_cb_t *hcb;
   1.114 -    /* thash_data_t entry={0},*ovl; */
   1.115 -    vcpu = current;
   1.116 -    /* search_section_t sections; */
   1.117 -    hcb = vmx_vcpu_get_vtlb(vcpu);
   1.118 -    for ( i = 0; i < count; i++ )
   1.119 -    {
   1.120 -        copy_from_user(&req, ureqs, sizeof(req));
   1.121 -        cmd = req.ptr&3;
   1.122 -        req.ptr &= ~3;
   1.123 -/*
   1.124 -        if(cmd ==MMU_NORMAL_PT_UPDATE){
   1.125 -            entry.page_flags = req.val;
   1.126 -            entry.locked = 1;
   1.127 -            entry.tc = 1;
   1.128 -            entry.cl = DSIDE_TLB;
   1.129 -            rr = vmx_vcpu_rr(vcpu, req.ptr);
   1.130 -            entry.ps = rr.ps;
   1.131 -            entry.key = rr.rid;
   1.132 -            entry.rid = rr.rid;
   1.133 -            entry.vadr = PAGEALIGN(req.ptr,entry.ps);
   1.134 -            sections.tr = 1;
   1.135 -            sections.tc = 0;
   1.136 -            ovl = thash_find_overlap(hcb, &entry, sections);
   1.137 -            if (ovl) {
   1.138 -                  // generate MCA.
   1.139 -                panic("Tlb conflict!!");
   1.140 -                return -1;
   1.141 -            }
   1.142 -            thash_purge_and_insert(hcb, &entry, req.ptr);
   1.143 -        }else
   1.144 - */
   1.145 -        if(cmd == MMU_MACHPHYS_UPDATE){
   1.146 -            mfn = req.ptr >>PAGE_SHIFT;
   1.147 -            gpfn = req.val;
   1.148 -            set_machinetophys(mfn,gpfn);
   1.149 -        }else{
   1.150 -            printf("Unkown command of mmu_update:ptr: %lx,val: %lx \n",req.ptr,req.val);
   1.151 -            while(1);
   1.152 -        }
   1.153 -        ureqs ++;
   1.154 -    }
   1.155 -    return 0;
   1.156 -}