ia64/xen-unstable

changeset 16129:a76f3f7ddca0

vt-d: disable protected memory registers after vt-d is enabled.
Signed-off-by: Allen Kay <allen.m.kay@intel.com>
author Keir Fraser <keir@xensource.com>
date Sat Oct 13 08:44:06 2007 +0100 (2007-10-13)
parents 22175cd36a10
children 415beae13d06
files xen/arch/x86/hvm/vmx/vtd/dmar.h xen/arch/x86/hvm/vmx/vtd/intel-iommu.c xen/arch/x86/hvm/vmx/vtd/utils.c xen/include/asm-x86/hvm/vmx/intel-iommu.h
line diff
     1.1 --- a/xen/arch/x86/hvm/vmx/vtd/dmar.h	Fri Oct 12 15:37:13 2007 +0100
     1.2 +++ b/xen/arch/x86/hvm/vmx/vtd/dmar.h	Sat Oct 13 08:44:06 2007 +0100
     1.3 @@ -87,6 +87,13 @@ struct acpi_ioapic_unit {
     1.4      }ioapic;
     1.5  };
     1.6  
     1.7 +#define DMAR_OPERATION_TIMEOUT (HZ*60) /* 1m */
     1.8 +#define time_after(a,b)         \
     1.9 +        (typecheck(unsigned long, a) && \
    1.10 +         typecheck(unsigned long, b) && \
    1.11 +         ((long)(b) - (long)(a) < 0))
    1.12 +
    1.13  int vtd_hw_check(void);
    1.14 +void disable_pmr(struct iommu *iommu);
    1.15  
    1.16  #endif // _DMAR_H_
     2.1 --- a/xen/arch/x86/hvm/vmx/vtd/intel-iommu.c	Fri Oct 12 15:37:13 2007 +0100
     2.2 +++ b/xen/arch/x86/hvm/vmx/vtd/intel-iommu.c	Sat Oct 13 08:44:06 2007 +0100
     2.3 @@ -40,13 +40,6 @@ extern void print_iommu_regs(struct acpi
     2.4  extern void print_vtd_entries(struct domain *d, int bus, int devfn,
     2.5                                unsigned long gmfn);
     2.6  
     2.7 -#define DMAR_OPERATION_TIMEOUT (HZ*60) /* 1m */
     2.8 -
     2.9 -#define time_after(a,b)         \
    2.10 -        (typecheck(unsigned long, a) && \
    2.11 -         typecheck(unsigned long, b) && \
    2.12 -         ((long)(b) - (long)(a) < 0))
    2.13 -
    2.14  unsigned int x86_clflush_size;
    2.15  void clflush_cache_range(void *adr, int size)
    2.16  {
    2.17 @@ -1774,7 +1767,7 @@ int iommu_setup(void)
    2.18      struct hvm_iommu *hd  = domain_hvm_iommu(dom0);
    2.19      struct acpi_drhd_unit *drhd;
    2.20      struct iommu *iommu;
    2.21 -    unsigned long i;
    2.22 +    unsigned long i, status;
    2.23  
    2.24      if ( !vtd_enabled )
    2.25          return 0;
    2.26 @@ -1804,6 +1797,10 @@ int iommu_setup(void)
    2.27      if ( enable_vtd_translation() )
    2.28          goto error;
    2.29  
    2.30 +    status = dmar_readl(iommu->reg, DMAR_PMEN_REG);
    2.31 +    if (status & DMA_PMEN_PRS)
    2.32 +        disable_pmr(iommu);
    2.33 +
    2.34      return 0;
    2.35  
    2.36   error:
     3.1 --- a/xen/arch/x86/hvm/vmx/vtd/utils.c	Fri Oct 12 15:37:13 2007 +0100
     3.2 +++ b/xen/arch/x86/hvm/vmx/vtd/utils.c	Sat Oct 13 08:44:06 2007 +0100
     3.3 @@ -64,6 +64,26 @@ int vtd_hw_check(void)
     3.4      return 0;
     3.5  }
     3.6  
     3.7 +/* disable vt-d protected memory registers */
     3.8 +void disable_pmr(struct iommu *iommu)
     3.9 +{
    3.10 +    unsigned long start_time, status;
    3.11 +
    3.12 +    gdprintk(XENLOG_INFO VTDPREFIX,
    3.13 +        "disabling protected memory registers\n");
    3.14 +
    3.15 +    dmar_writel(iommu->reg, DMAR_PMEN_REG, 0);
    3.16 +    start_time = jiffies;
    3.17 +    while (1) {
    3.18 +        status = dmar_readl(iommu->reg, DMAR_PMEN_REG);
    3.19 +        if ( (status & DMA_PMEN_PRS) == 0 )
    3.20 +            break;
    3.21 +        if (time_after(jiffies, start_time + DMAR_OPERATION_TIMEOUT))
    3.22 +            panic("Cannot set QIE field for queue invalidation\n");
    3.23 +        cpu_relax();
    3.24 +    }
    3.25 +}
    3.26 +
    3.27  #if defined(__x86_64__)
    3.28  void print_iommu_regs(struct acpi_drhd_unit *drhd)
    3.29  {
     4.1 --- a/xen/include/asm-x86/hvm/vmx/intel-iommu.h	Fri Oct 12 15:37:13 2007 +0100
     4.2 +++ b/xen/include/asm-x86/hvm/vmx/intel-iommu.h	Sat Oct 13 08:44:06 2007 +0100
     4.3 @@ -145,6 +145,10 @@
     4.4  #define DMA_GSTS_QIES   (((u64)1) <<26)
     4.5  #define DMA_GSTS_IRES   (((u64)1) <<25)
     4.6  
     4.7 +/* PMEN_REG */
     4.8 +#define DMA_PMEN_EPM   (((u32)1) << 31)
     4.9 +#define DMA_PMEN_PRS   (((u32)1) << 1)
    4.10 +
    4.11  /* CCMD_REG */
    4.12  #define DMA_CCMD_INVL_GRANU_OFFSET  61
    4.13  #define DMA_CCMD_ICC (((u64)1) << 63)