ia64/xen-unstable

changeset 15457:a5360bf18668

Fix fixup of invalid PTE writes, broken by 13392:0fd65225e4c6.

By the time we test if addr is the upper word it has already been
aligned to the 8 byte pte size.

Signed-off-by: Ian Campbell <ian.campbell@xensource.com>
author Ian Campbell <ian.campbell@xensource.com>
date Thu Jun 28 18:40:20 2007 +0100 (2007-06-28)
parents d0608ecb56bc
children b377a102f0eb
files xen/arch/x86/mm.c
line diff
     1.1 --- a/xen/arch/x86/mm.c	Wed Jun 27 22:20:17 2007 +0100
     1.2 +++ b/xen/arch/x86/mm.c	Thu Jun 28 18:40:20 2007 +0100
     1.3 @@ -3240,6 +3240,7 @@ static int ptwr_emulated_update(
     1.4      struct ptwr_emulate_ctxt *ptwr_ctxt)
     1.5  {
     1.6      unsigned long mfn;
     1.7 +    unsigned long unaligned_addr = addr;
     1.8      struct page_info *page;
     1.9      l1_pgentry_t pte, ol1e, nl1e, *pl1e;
    1.10      struct vcpu *v = current;
    1.11 @@ -3294,7 +3295,7 @@ static int ptwr_emulated_update(
    1.12      if ( unlikely(!get_page_from_l1e(nl1e, d)) )
    1.13      {
    1.14          if ( (CONFIG_PAGING_LEVELS >= 3) && is_pv_32bit_domain(d) &&
    1.15 -             (bytes == 4) && (addr & 4) && !do_cmpxchg &&
    1.16 +             (bytes == 4) && (unaligned_addr & 4) && !do_cmpxchg &&
    1.17               (l1e_get_flags(nl1e) & _PAGE_PRESENT) )
    1.18          {
    1.19              /*