ia64/xen-unstable

changeset 3396:a4621fab44b4

bitkeeper revision 1.1159.212.14 (41e016e0WABx7Lr5PD8jIm9NC3fw7g)

Merge scramble.cl.cam.ac.uk:/local/scratch/kaf24/xen-2.0-testing.bk
into scramble.cl.cam.ac.uk:/local/scratch/kaf24/xen-unstable.bk
author kaf24@scramble.cl.cam.ac.uk
date Sat Jan 08 17:22:40 2005 +0000 (2005-01-08)
parents 4136a5dc787a 1c0155635933
children 53666c56e533
files xen/arch/x86/memory.c xen/arch/x86/shadow.c xen/common/physdev.c
line diff
     3.1 --- a/xen/common/physdev.c	Sat Jan 08 01:29:56 2005 +0000
     3.2 +++ b/xen/common/physdev.c	Sat Jan 08 17:22:40 2005 +0000
     3.3 @@ -45,6 +45,7 @@ extern void pcibios_enable_irq(struct pc
     3.4  #define INFO(_f, _a...) ((void)0)
     3.5  #endif
     3.6  
     3.7 +#define SLOPPY_CHECKING
     3.8  
     3.9  #define ACC_READ  1
    3.10  #define ACC_WRITE 2
    3.11 @@ -305,7 +306,7 @@ inline static int check_dev_acc (struct 
    3.12      return 0;
    3.13  }
    3.14  
    3.15 -
    3.16 +#ifndef SLOPPY_CHECKING
    3.17  /*
    3.18   * Base address registers contain the base address for IO regions.
    3.19   * The length can be determined by writing all 1s to the register and
    3.20 @@ -496,6 +497,7 @@ static int do_rom_address_access(phys_de
    3.21      return ret;
    3.22  
    3.23  }
    3.24 +#endif /* SLOPPY_CHECKING */
    3.25  
    3.26  /*
    3.27   * Handle a PCI config space read access if the domain has access privileges.
    3.28 @@ -512,12 +514,13 @@ static long pci_cfgreg_read(int bus, int
    3.29           * all 1s.  In this case the domain has no read access, which should
    3.30           * also look like the device is non-existent. */
    3.31          *val = 0xFFFFFFFF;
    3.32 -        return ret; /* KAF: error return seems to matter on my test machine. */
    3.33 +        return ret;
    3.34      }
    3.35  
    3.36      /* Fake out read requests for some registers. */
    3.37      switch ( reg )
    3.38      {
    3.39 +#ifndef SLOPPY_CHECKING
    3.40      case PCI_BASE_ADDRESS_0:
    3.41          ret = do_base_address_access(pdev, ACC_READ, 0, len, val);
    3.42          break;
    3.43 @@ -545,6 +548,7 @@ static long pci_cfgreg_read(int bus, int
    3.44      case PCI_ROM_ADDRESS:
    3.45          ret = do_rom_address_access(pdev, ACC_READ, len, val);
    3.46          break;        
    3.47 +#endif
    3.48  
    3.49      case PCI_INTERRUPT_LINE:
    3.50          *val = pdev->dev->irq;
    3.51 @@ -577,6 +581,7 @@ static long pci_cfgreg_write(int bus, in
    3.52      /* special treatment for some registers */
    3.53      switch (reg)
    3.54      {
    3.55 +#ifndef SLOPPY_CHECKING
    3.56      case PCI_BASE_ADDRESS_0:
    3.57          ret = do_base_address_access(pdev, ACC_WRITE, 0, len, &val);
    3.58          break;
    3.59 @@ -604,6 +609,7 @@ static long pci_cfgreg_write(int bus, in
    3.60      case PCI_ROM_ADDRESS:
    3.61          ret = do_rom_address_access(pdev, ACC_WRITE, len, &val);
    3.62          break;        
    3.63 +#endif
    3.64  
    3.65      default:
    3.66          if ( pdev->flags != ACC_WRITE )