ia64/xen-unstable

changeset 11615:9e24cd7951ea

[XEN][HVM] Initialise the ELCR to level triggered mode from pic_init1.
This should really be done from the BIOS, but since it isn't, work around
it from here.

Signed-off-by: Steven Smith <sos22@cam.ac.uk>
author Steven Smith <ssmith@xensource.com>
date Mon Sep 25 09:26:51 2006 +0100 (2006-09-25)
parents c81eb1ccdce5
children 4b6284d2c11c
files xen/arch/x86/hvm/i8259.c
line diff
     1.1 --- a/xen/arch/x86/hvm/i8259.c	Sun Sep 24 10:14:17 2006 +0100
     1.2 +++ b/xen/arch/x86/hvm/i8259.c	Mon Sep 25 09:26:51 2006 +0100
     1.3 @@ -447,6 +447,10 @@ static void pic_init1(int io_addr, int e
     1.4      ASSERT(spin_is_locked(&s->pics_state->lock));
     1.5  
     1.6      pic_reset(s);
     1.7 +
     1.8 +    /* XXX We set the ELCR to level triggered here, but that should
     1.9 +       really be done by the BIOS, and only for PCI IRQs. */
    1.10 +    s->elcr = 0xff & s->elcr_mask;
    1.11  }
    1.12  
    1.13  void pic_init(struct hvm_virpic *s, void (*irq_request)(void *, int),
    1.14 @@ -458,12 +462,12 @@ void pic_init(struct hvm_virpic *s, void
    1.15      spin_lock_init(&s->lock);
    1.16      s->pics[0].pics_state = s;
    1.17      s->pics[1].pics_state = s;
    1.18 +    s->pics[0].elcr_mask = 0xf8;
    1.19 +    s->pics[1].elcr_mask = 0xde;
    1.20      spin_lock_irqsave(&s->lock, flags);
    1.21      pic_init1(0x20, 0x4d0, &s->pics[0]);
    1.22      pic_init1(0xa0, 0x4d1, &s->pics[1]);
    1.23      spin_unlock_irqrestore(&s->lock, flags);
    1.24 -    s->pics[0].elcr_mask = 0xf8;
    1.25 -    s->pics[1].elcr_mask = 0xde;
    1.26      s->irq_request = irq_request;
    1.27      s->irq_request_opaque = irq_request_opaque;
    1.28  }