ia64/xen-unstable

changeset 144:9d397996348f

bitkeeper revision 1.22.1.12 (3e4a888cZcWx5bHvHbUKxAaFxGiyRg)

Merge boulderdash.cl.cam.ac.uk:/usr/groups/xeno/BK/xeno
into boulderdash.cl.cam.ac.uk:/auto/anfs/scratch/boulderdash/akw27/argh/xeno
author akw27@boulderdash.cl.cam.ac.uk
date Wed Feb 12 17:46:52 2003 +0000 (2003-02-12)
parents 2f78322be16a e18322478a0f
children afaade366555
files xen-2.4.16/arch/i386/process.c xen-2.4.16/arch/i386/smpboot.c xen-2.4.16/arch/i386/traps.c xen-2.4.16/include/asm-i386/processor.h
line diff
     1.1 --- a/xen-2.4.16/arch/i386/process.c	Tue Feb 11 13:05:51 2003 +0000
     1.2 +++ b/xen-2.4.16/arch/i386/process.c	Wed Feb 12 17:46:52 2003 +0000
     1.3 @@ -364,7 +364,6 @@ void new_thread(struct task_struct *p,
     1.4  /* NB. prev_p passed in %eax, next_p passed in %edx */
     1.5  void __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
     1.6  {
     1.7 -    extern struct desc_struct idt_table[];
     1.8      struct thread_struct *prev = &prev_p->thread,
     1.9          *next = &next_p->thread;
    1.10      struct tss_struct *tss = init_tss + smp_processor_id();
     2.1 --- a/xen-2.4.16/arch/i386/smpboot.c	Tue Feb 11 13:05:51 2003 +0000
     2.2 +++ b/xen-2.4.16/arch/i386/smpboot.c	Wed Feb 12 17:46:52 2003 +0000
     2.3 @@ -395,6 +395,10 @@ int cpucount;
     2.4   */
     2.5  int __init start_secondary(void *unused)
     2.6  {
     2.7 +    unsigned int cpu = smp_processor_id();
     2.8 +    /* A 'mem64' suitable for passing to LIDT instruction. */
     2.9 +    unsigned long idt_load[2] = { (IDT_ENTRIES*8)-1, 0 };
    2.10 +
    2.11      extern void cpu_init(void);
    2.12  
    2.13      /*
    2.14 @@ -409,6 +413,15 @@ int __init start_secondary(void *unused)
    2.15          rep_nop();
    2.16  
    2.17      /*
    2.18 +     * At this point, boot CPU has fully initialised the IDT. It is
    2.19 +     * now safe to make ourselves a private copy.
    2.20 +     */
    2.21 +    idt_tables[cpu] = kmalloc(IDT_ENTRIES*8, GFP_KERNEL);
    2.22 +    memcpy(idt_tables[cpu], idt_table, IDT_ENTRIES*8);
    2.23 +    idt_load[2] = (unsigned long)idt_tables[cpu];
    2.24 +    __asm__ __volatile__ ( "lidt %0" : "=m" (idt_load) );
    2.25 +
    2.26 +    /*
    2.27       * low-memory mappings have been cleared, flush them from the local TLBs 
    2.28       * too.
    2.29       */
     3.1 --- a/xen-2.4.16/arch/i386/traps.c	Tue Feb 11 13:05:51 2003 +0000
     3.2 +++ b/xen-2.4.16/arch/i386/traps.c	Wed Feb 12 17:46:52 2003 +0000
     3.3 @@ -43,12 +43,10 @@ asmlinkage int hypervisor_call(void);
     3.4  asmlinkage void lcall7(void);
     3.5  asmlinkage void lcall27(void);
     3.6  
     3.7 -/*
     3.8 - * The IDT has to be page-aligned to simplify the Pentium
     3.9 - * F0 0F bug workaround.. We have a special link segment
    3.10 - * for this.
    3.11 - */
    3.12 -struct desc_struct idt_table[256] __attribute__((__section__(".data.idt"))) = { {0, 0}, };
    3.13 +/* Master table, and the one used by CPU0. */
    3.14 +struct desc_struct idt_table[256] = { {0, 0}, };
    3.15 +/* All other CPUs have their own copy. */
    3.16 +struct desc_struct *idt_tables[NR_CPUS] = { 0 };
    3.17  
    3.18  asmlinkage void divide_error(void);
    3.19  asmlinkage void debug(void);
    3.20 @@ -299,7 +297,12 @@ asmlinkage void do_general_protection(st
    3.21          ti = current->thread.traps + (error_code>>3);
    3.22          if ( ti->dpl >= (regs->xcs & 3) )
    3.23          {
    3.24 -            if ( (error_code>>3)==0x80 ) { printk("!!!\n"); BUG(); }
    3.25 +            /* XXX Kill next conditional soon :-) XXX */
    3.26 +            if ( (error_code>>3)==0x80 ) 
    3.27 +            { 
    3.28 +                printk("DIDN'T USE FAST-TRAP HANDLER FOR 0x80!!! :-(\n");
    3.29 +                BUG(); 
    3.30 +            }
    3.31              gtb->flags = GTBF_TRAP_NOCODE;
    3.32              gtb->cs    = ti->cs;
    3.33              gtb->eip   = ti->address;
    3.34 @@ -542,6 +545,9 @@ void __init trap_init(void)
    3.35      /* Only ring 1 can access monitor services. */
    3.36      _set_gate(idt_table+HYPERVISOR_CALL_VECTOR,15,1,&hypervisor_call);
    3.37  
    3.38 +    /* CPU0 uses the master IDT. */
    3.39 +    idt_tables[0] = idt_table;
    3.40 +
    3.41      /*
    3.42       * Should be a barrier for any external CPU state.
    3.43       */
     4.1 --- a/xen-2.4.16/include/asm-i386/processor.h	Tue Feb 11 13:05:51 2003 +0000
     4.2 +++ b/xen-2.4.16/include/asm-i386/processor.h	Wed Feb 12 17:46:52 2003 +0000
     4.3 @@ -358,16 +358,22 @@ struct thread_struct {
     4.4      trap_info_t         traps[256];
     4.5  };
     4.6  
     4.7 +#define IDT_ENTRIES 256
     4.8 +extern struct desc_struct idt_table[];
     4.9 +extern struct desc_struct *idt_tables[];
    4.10 +
    4.11  #define SET_DEFAULT_FAST_TRAP(_p) \
    4.12      (_p)->fast_trap_idx = 0x20;   \
    4.13      (_p)->fast_trap_desc.a = 0;   \
    4.14      (_p)->fast_trap_desc.b = 0;
    4.15  
    4.16  #define CLEAR_FAST_TRAP(_p) \
    4.17 -    (memset(idt_table + (_p)->fast_trap_idx, 0, 8))
    4.18 +    (memset(idt_tables[smp_processor_id()] + (_p)->fast_trap_idx, \
    4.19 +     0, 8))
    4.20  
    4.21  #define SET_FAST_TRAP(_p)   \
    4.22 -    (memcpy(idt_table + (_p)->fast_trap_idx, &((_p)->fast_trap_desc), 8))
    4.23 +    (memcpy(idt_tables[smp_processor_id()] + (_p)->fast_trap_idx, \
    4.24 +     &((_p)->fast_trap_desc), 8))
    4.25  
    4.26  #define INIT_THREAD  {						\
    4.27  	sizeof(idle0_stack) + (long) &idle0_stack, /* esp0 */   \