ia64/xen-unstable

changeset 5377:99d9ce2c0a65

bitkeeper revision 1.1159.258.164 (42a7277bdZm8DZjc_UHJ0TWuobiRXw)

reenable TS flag after testing for fdiv bug. fix the fpu corruption that some config have

Signed-off: Vincent Hanquez <vincent@xensource.com>
author vh249@arcadians.cl.cam.ac.uk
date Wed Jun 08 17:14:35 2005 +0000 (2005-06-08)
parents 073dc14d65f6
children 936540389715 02d442d39367
files .rootkeys linux-2.6.11-xen-sparse/include/asm-xen/asm-i386/bugs.h
line diff
     1.1 --- a/.rootkeys	Wed Jun 01 15:30:48 2005 +0000
     1.2 +++ b/.rootkeys	Wed Jun 08 17:14:35 2005 +0000
     1.3 @@ -282,6 +282,7 @@ 4108f5c1ppFXVpQzCOAZ6xXYubsjKA linux-2.6
     1.4  3e5a4e65IUfzzMu2kZFlGEB8-rpTaA linux-2.6.11-xen-sparse/drivers/xen/privcmd/privcmd.c
     1.5  412f47e4RKD-R5IS5gEXvcT8L4v8gA linux-2.6.11-xen-sparse/include/asm-generic/pgtable.h
     1.6  42400318xlBIV46qyxLTaDepPLNyhg linux-2.6.11-xen-sparse/include/asm-xen/asm-i386/agp.h
     1.7 +42a7252dZgup3r7qUeJGriyN5o9rUg linux-2.6.11-xen-sparse/include/asm-xen/asm-i386/bugs.h
     1.8  40f56239YAjS52QG2FIAQpHDZAdGHg linux-2.6.11-xen-sparse/include/asm-xen/asm-i386/desc.h
     1.9  4107adf1E5O4ztGHNGMzCCNhcvqNow linux-2.6.11-xen-sparse/include/asm-xen/asm-i386/dma-mapping.h
    1.10  40f5623akIoBsQ3KxSB2kufkbgONXQ linux-2.6.11-xen-sparse/include/asm-xen/asm-i386/fixmap.h
     2.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     2.2 +++ b/linux-2.6.11-xen-sparse/include/asm-xen/asm-i386/bugs.h	Wed Jun 08 17:14:35 2005 +0000
     2.3 @@ -0,0 +1,214 @@
     2.4 +/*
     2.5 + *  include/asm-i386/bugs.h
     2.6 + *
     2.7 + *  Copyright (C) 1994  Linus Torvalds
     2.8 + *
     2.9 + *  Cyrix stuff, June 1998 by:
    2.10 + *	- Rafael R. Reilova (moved everything from head.S),
    2.11 + *        <rreilova@ececs.uc.edu>
    2.12 + *	- Channing Corn (tests & fixes),
    2.13 + *	- Andrew D. Balsa (code cleanup).
    2.14 + *
    2.15 + *  Pentium III FXSR, SSE support
    2.16 + *	Gareth Hughes <gareth@valinux.com>, May 2000
    2.17 + */
    2.18 +
    2.19 +/*
    2.20 + * This is included by init/main.c to check for architecture-dependent bugs.
    2.21 + *
    2.22 + * Needs:
    2.23 + *	void check_bugs(void);
    2.24 + */
    2.25 +
    2.26 +#include <linux/config.h>
    2.27 +#include <linux/init.h>
    2.28 +#include <asm/processor.h>
    2.29 +#include <asm/i387.h>
    2.30 +#include <asm/msr.h>
    2.31 +
    2.32 +static int __init no_halt(char *s)
    2.33 +{
    2.34 +	boot_cpu_data.hlt_works_ok = 0;
    2.35 +	return 1;
    2.36 +}
    2.37 +
    2.38 +__setup("no-hlt", no_halt);
    2.39 +
    2.40 +static int __init mca_pentium(char *s)
    2.41 +{
    2.42 +	mca_pentium_flag = 1;
    2.43 +	return 1;
    2.44 +}
    2.45 +
    2.46 +__setup("mca-pentium", mca_pentium);
    2.47 +
    2.48 +static int __init no_387(char *s)
    2.49 +{
    2.50 +	boot_cpu_data.hard_math = 0;
    2.51 +	write_cr0(0xE | read_cr0());
    2.52 +	return 1;
    2.53 +}
    2.54 +
    2.55 +__setup("no387", no_387);
    2.56 +
    2.57 +static double __initdata x = 4195835.0;
    2.58 +static double __initdata y = 3145727.0;
    2.59 +
    2.60 +/*
    2.61 + * This used to check for exceptions.. 
    2.62 + * However, it turns out that to support that,
    2.63 + * the XMM trap handlers basically had to
    2.64 + * be buggy. So let's have a correct XMM trap
    2.65 + * handler, and forget about printing out
    2.66 + * some status at boot.
    2.67 + *
    2.68 + * We should really only care about bugs here
    2.69 + * anyway. Not features.
    2.70 + */
    2.71 +static void __init check_fpu(void)
    2.72 +{
    2.73 +	if (!boot_cpu_data.hard_math) {
    2.74 +#ifndef CONFIG_MATH_EMULATION
    2.75 +		printk(KERN_EMERG "No coprocessor found and no math emulation present.\n");
    2.76 +		printk(KERN_EMERG "Giving up.\n");
    2.77 +		for (;;) ;
    2.78 +#endif
    2.79 +		return;
    2.80 +	}
    2.81 +
    2.82 +/* Enable FXSR and company _before_ testing for FP problems. */
    2.83 +	/*
    2.84 +	 * Verify that the FXSAVE/FXRSTOR data will be 16-byte aligned.
    2.85 +	 */
    2.86 +	if (offsetof(struct task_struct, thread.i387.fxsave) & 15) {
    2.87 +		extern void __buggy_fxsr_alignment(void);
    2.88 +		__buggy_fxsr_alignment();
    2.89 +	}
    2.90 +	if (cpu_has_fxsr) {
    2.91 +		printk(KERN_INFO "Enabling fast FPU save and restore... ");
    2.92 +		set_in_cr4(X86_CR4_OSFXSR);
    2.93 +		printk("done.\n");
    2.94 +	}
    2.95 +	if (cpu_has_xmm) {
    2.96 +		printk(KERN_INFO "Enabling unmasked SIMD FPU exception support... ");
    2.97 +		set_in_cr4(X86_CR4_OSXMMEXCPT);
    2.98 +		printk("done.\n");
    2.99 +	}
   2.100 +
   2.101 +	/* Test for the divl bug.. */
   2.102 +	__asm__("fninit\n\t"
   2.103 +		"fldl %1\n\t"
   2.104 +		"fdivl %2\n\t"
   2.105 +		"fmull %2\n\t"
   2.106 +		"fldl %1\n\t"
   2.107 +		"fsubp %%st,%%st(1)\n\t"
   2.108 +		"fistpl %0\n\t"
   2.109 +		"fwait\n\t"
   2.110 +		"fninit"
   2.111 +		: "=m" (*&boot_cpu_data.fdiv_bug)
   2.112 +		: "m" (*&x), "m" (*&y));
   2.113 +	stts();
   2.114 +	if (boot_cpu_data.fdiv_bug)
   2.115 +		printk("Hmm, FPU with FDIV bug.\n");
   2.116 +}
   2.117 +
   2.118 +static void __init check_hlt(void)
   2.119 +{
   2.120 +	printk(KERN_INFO "Checking 'hlt' instruction... ");
   2.121 +	if (!boot_cpu_data.hlt_works_ok) {
   2.122 +		printk("disabled\n");
   2.123 +		return;
   2.124 +	}
   2.125 +	__asm__ __volatile__("hlt ; hlt ; hlt ; hlt");
   2.126 +	printk("OK.\n");
   2.127 +}
   2.128 +
   2.129 +/*
   2.130 + *	Most 386 processors have a bug where a POPAD can lock the 
   2.131 + *	machine even from user space.
   2.132 + */
   2.133 + 
   2.134 +static void __init check_popad(void)
   2.135 +{
   2.136 +#ifndef CONFIG_X86_POPAD_OK
   2.137 +	int res, inp = (int) &res;
   2.138 +
   2.139 +	printk(KERN_INFO "Checking for popad bug... ");
   2.140 +	__asm__ __volatile__( 
   2.141 +	  "movl $12345678,%%eax; movl $0,%%edi; pusha; popa; movl (%%edx,%%edi),%%ecx "
   2.142 +	  : "=&a" (res)
   2.143 +	  : "d" (inp)
   2.144 +	  : "ecx", "edi" );
   2.145 +	/* If this fails, it means that any user program may lock the CPU hard. Too bad. */
   2.146 +	if (res != 12345678) printk( "Buggy.\n" );
   2.147 +		        else printk( "OK.\n" );
   2.148 +#endif
   2.149 +}
   2.150 +
   2.151 +/*
   2.152 + * Check whether we are able to run this kernel safely on SMP.
   2.153 + *
   2.154 + * - In order to run on a i386, we need to be compiled for i386
   2.155 + *   (for due to lack of "invlpg" and working WP on a i386)
   2.156 + * - In order to run on anything without a TSC, we need to be
   2.157 + *   compiled for a i486.
   2.158 + * - In order to support the local APIC on a buggy Pentium machine,
   2.159 + *   we need to be compiled with CONFIG_X86_GOOD_APIC disabled,
   2.160 + *   which happens implicitly if compiled for a Pentium or lower
   2.161 + *   (unless an advanced selection of CPU features is used) as an
   2.162 + *   otherwise config implies a properly working local APIC without
   2.163 + *   the need to do extra reads from the APIC.
   2.164 +*/
   2.165 +
   2.166 +static void __init check_config(void)
   2.167 +{
   2.168 +/*
   2.169 + * We'd better not be a i386 if we're configured to use some
   2.170 + * i486+ only features! (WP works in supervisor mode and the
   2.171 + * new "invlpg" and "bswap" instructions)
   2.172 + */
   2.173 +#if defined(CONFIG_X86_WP_WORKS_OK) || defined(CONFIG_X86_INVLPG) || defined(CONFIG_X86_BSWAP)
   2.174 +	if (boot_cpu_data.x86 == 3)
   2.175 +		panic("Kernel requires i486+ for 'invlpg' and other features");
   2.176 +#endif
   2.177 +
   2.178 +/*
   2.179 + * If we configured ourselves for a TSC, we'd better have one!
   2.180 + */
   2.181 +#ifdef CONFIG_X86_TSC
   2.182 +	if (!cpu_has_tsc)
   2.183 +		panic("Kernel compiled for Pentium+, requires TSC feature!");
   2.184 +#endif
   2.185 +
   2.186 +/*
   2.187 + * If we were told we had a good local APIC, check for buggy Pentia,
   2.188 + * i.e. all B steppings and the C2 stepping of P54C when using their
   2.189 + * integrated APIC (see 11AP erratum in "Pentium Processor
   2.190 + * Specification Update").
   2.191 + */
   2.192 +#if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_GOOD_APIC)
   2.193 +	if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL
   2.194 +	    && cpu_has_apic
   2.195 +	    && boot_cpu_data.x86 == 5
   2.196 +	    && boot_cpu_data.x86_model == 2
   2.197 +	    && (boot_cpu_data.x86_mask < 6 || boot_cpu_data.x86_mask == 11))
   2.198 +		panic("Kernel compiled for PMMX+, assumes a local APIC without the read-before-write bug!");
   2.199 +#endif
   2.200 +}
   2.201 +
   2.202 +extern void alternative_instructions(void);
   2.203 +
   2.204 +static void __init check_bugs(void)
   2.205 +{
   2.206 +	identify_cpu(&boot_cpu_data);
   2.207 +#ifndef CONFIG_SMP
   2.208 +	printk("CPU: ");
   2.209 +	print_cpu_info(&boot_cpu_data);
   2.210 +#endif
   2.211 +	check_config();
   2.212 +	check_fpu();
   2.213 +	check_hlt();
   2.214 +	check_popad();
   2.215 +	system_utsname.machine[1] = '0' + (boot_cpu_data.x86 > 6 ? 6 : boot_cpu_data.x86);
   2.216 +	alternative_instructions(); 
   2.217 +}