ia64/xen-unstable

changeset 16470:98defc4f3bf9

[IA64] Add physical to physical data only and reverse transitions.

Signed-off-by: Tristan Gingold <tgingold@free.fr>
author Alex Williamson <alex.williamson@hp.com>
date Mon Nov 26 10:07:30 2007 -0700 (2007-11-26)
parents 4ac315e33f88
children 0cc58b6dfeb2
files xen/arch/ia64/vmx/vmx_phy_mode.c
line diff
     1.1 --- a/xen/arch/ia64/vmx/vmx_phy_mode.c	Mon Nov 26 10:03:53 2007 -0700
     1.2 +++ b/xen/arch/ia64/vmx/vmx_phy_mode.c	Mon Nov 26 10:07:30 2007 -0700
     1.3 @@ -33,9 +33,9 @@
     1.4      (((psr).it << 2) + ((psr).dt << 1) + (psr).rt)
     1.5  
     1.6  #define SW_BAD    0   /* Bad mode transitition */
     1.7 -#define SW_V2P_DT 1   /* Physical emulation is activated */
     1.8 -#define SW_V2P_D  2   /* Physical emulation is activated (only for data) */
     1.9 -#define SW_P2V    3   /* Exit physical mode emulation */
    1.10 +#define SW_2P_DT  1   /* Physical emulation is activated */
    1.11 +#define SW_2P_D   2   /* Physical emulation is activated (only for data) */
    1.12 +#define SW_2V     3   /* Exit physical mode emulation */
    1.13  #define SW_SELF   4   /* No mode transition */
    1.14  #define SW_NOP    5   /* Mode transition, but without action required */
    1.15  
    1.16 @@ -59,8 +59,10 @@ static const unsigned char mm_switch_tab
    1.17       *  service. Due to gva = gpa in this case (Same region),
    1.18       *  data access can be satisfied though itlb entry for physical
    1.19       *  emulation is hit.
    1.20 +     *
    1.21 +     *  (it,dt,rt): (0,0,0) -> (1,0,1)
    1.22       */
    1.23 -    {SW_SELF,0,  0,  SW_NOP, 0,  0,  0,  SW_P2V},
    1.24 +    {SW_SELF,0,  0,  SW_NOP, 0,  SW_2P_D,  0,  SW_2V},
    1.25      {0,  0,  0,  0,  0,  0,  0,  0},
    1.26      {0,  0,  0,  0,  0,  0,  0,  0},
    1.27      /*
    1.28 @@ -70,16 +72,18 @@ static const unsigned char mm_switch_tab
    1.29       *  (it,dt,rt): (0,1,1) -> (0,0,0)
    1.30       *  This kind of transition is found in OSYa
    1.31       */
    1.32 -    {SW_NOP, 0,  0,  SW_SELF,0,  0,  0,  SW_P2V},
    1.33 +    {SW_NOP, 0,  0,  SW_SELF,0,  0,  0,  SW_2V},
    1.34      /* (1,0,0)->(1,1,1) */
    1.35 -    {0,  0,  0,  0,  0,  0,  0,  SW_P2V},
    1.36 +    {0,  0,  0,  0,  0,  0,  0,  SW_2V},
    1.37      /*
    1.38       *  (it,dt,rt): (1,0,1) -> (1,1,1)
    1.39       *  This kind of transition usually occurs when Linux returns
    1.40       *  from the low level TLB miss handlers.
    1.41       *  (see "arch/ia64/kernel/ivt.S")
    1.42 +     *
    1.43 +     *  (it,dt,rt): (1,0,1) -> (0,0,0)
    1.44       */
    1.45 -    {0,  0,  0,  0,  0,  SW_SELF,0,  SW_P2V},
    1.46 +    {SW_2P_DT,  0,  0,  0,  0,  SW_SELF,0,  SW_2V},
    1.47      {0,  0,  0,  0,  0,  0,  0,  0},
    1.48      /*
    1.49       *  (it,dt,rt): (1,1,1) -> (1,0,1)
    1.50 @@ -90,9 +94,10 @@ static const unsigned char mm_switch_tab
    1.51       *  This kind of transition usually occurs in pal and efi calls,
    1.52       *  which requires running in physical mode.
    1.53       *  (see "arch/ia64/kernel/head.S")
    1.54 -     *  (1,1,1)->(1,0,0)
    1.55 +     *
    1.56 +     *  (it,dt,rt): (1,1,1)->(1,0,0)
    1.57       */
    1.58 -    {SW_V2P_DT, 0,  0,  0,  SW_V2P_D, SW_V2P_D, 0,  SW_SELF},
    1.59 +    {SW_2P_DT, 0,  0,  0,  SW_2P_D, SW_2P_D, 0,  SW_SELF},
    1.60  };
    1.61  
    1.62  void
    1.63 @@ -234,17 +239,17 @@ switch_mm_mode(VCPU *vcpu, IA64_PSR old_
    1.64      act = mm_switch_action(old_psr, new_psr);
    1.65      perfc_incra(vmx_switch_mm_mode, act);
    1.66      switch (act) {
    1.67 -    case SW_V2P_DT:
    1.68 +    case SW_2P_DT:
    1.69          vcpu->arch.arch_vmx.mmu_mode = VMX_MMU_PHY_DT;
    1.70          switch_to_physical_rid(vcpu);
    1.71          break;
    1.72 -    case SW_V2P_D:
    1.73 +    case SW_2P_D:
    1.74  //        printk("V -> P_D mode transition: (0x%lx -> 0x%lx)\n",
    1.75  //               old_psr.val, new_psr.val);
    1.76          vcpu->arch.arch_vmx.mmu_mode = VMX_MMU_PHY_D;
    1.77          switch_to_physical_rid(vcpu);
    1.78          break;
    1.79 -    case SW_P2V:
    1.80 +    case SW_2V:
    1.81  //        printk("P -> V mode transition: (0x%lx -> 0x%lx)\n",
    1.82  //               old_psr.val, new_psr.val);
    1.83          vcpu->arch.arch_vmx.mmu_mode = VMX_MMU_VIRTUAL;