ia64/xen-unstable

changeset 16541:90f02ca76244

qemu-dm: Limit transmit retries from virtual UART FIFO.
Signed-off-by: Trolle Selander <trolle.selander@gmail.com>
author Keir Fraser <keir.fraser@citrix.com>
date Thu Dec 06 10:41:10 2007 +0000 (2007-12-06)
parents 8ba08f2244b2
children 1936e6a79f85
files tools/ioemu/hw/serial.c
line diff
     1.1 --- a/tools/ioemu/hw/serial.c	Wed Dec 05 17:56:13 2007 +0000
     1.2 +++ b/tools/ioemu/hw/serial.c	Thu Dec 06 10:41:10 2007 +0000
     1.3 @@ -96,6 +96,7 @@
     1.4  
     1.5  #define XMIT_FIFO           0
     1.6  #define RECV_FIFO           1
     1.7 +#define MAX_XMIT_RETRY      4
     1.8   
     1.9  struct SerialFIFO {
    1.10      uint8_t data[UART_FIFO_LENGTH];
    1.11 @@ -136,7 +137,7 @@ struct SerialState {
    1.12  
    1.13      struct QEMUTimer *fifo_timeout_timer;
    1.14      int timeout_ipending;                   /* timeout interrupt pending state */
    1.15 -    struct QEMUTimer *fifo_transmit_timer;
    1.16 +    struct QEMUTimer *transmit_timer;
    1.17  
    1.18  
    1.19      uint64_t char_transmit_time;               /* time to transmit a char in ticks*/
    1.20 @@ -370,15 +371,17 @@ static void serial_xmit(void *opaque) {
    1.21  
    1.22      if ( qemu_chr_write(s->chr, &s->tsr, 1) != 1 ) {
    1.23          s->tsr_retry++;
    1.24 -        qemu_mod_timer(s->fifo_transmit_timer,  new_xmit_ts + s->char_transmit_time );
    1.25 -        return;
    1.26 +        if ( s->tsr_retry <= MAX_XMIT_RETRY ) {
    1.27 +            qemu_mod_timer(s->transmit_timer,  new_xmit_ts + s->char_transmit_time );
    1.28 +            return;
    1.29 +        }
    1.30      }
    1.31   
    1.32      s->tsr_retry = 0;
    1.33      s->last_xmit_ts = qemu_get_clock(vm_clock);
    1.34  
    1.35 -    if ( s->xmit_fifo.count > 0 )
    1.36 -        qemu_mod_timer(s->fifo_transmit_timer, s->last_xmit_ts + s->char_transmit_time );
    1.37 +    if ( !(s->lsr & UART_LSR_THRE) )
    1.38 +        qemu_mod_timer(s->transmit_timer, s->last_xmit_ts + s->char_transmit_time );
    1.39  
    1.40      if ( s->lsr & UART_LSR_THRE ) {
    1.41          s->lsr |= UART_LSR_TEMT;
    1.42 @@ -752,7 +755,7 @@ SerialState *serial_init(SetIRQFunc *set
    1.43      fifo_clear(s,XMIT_FIFO);
    1.44      s->last_xmit_ts = qemu_get_clock(vm_clock);
    1.45      s->fifo_timeout_timer = qemu_new_timer(vm_clock, ( QEMUTimerCB *) fifo_timeout_int, s);
    1.46 -    s->fifo_transmit_timer = qemu_new_timer(vm_clock, ( QEMUTimerCB *) serial_xmit, s);
    1.47 +    s->transmit_timer = qemu_new_timer(vm_clock, ( QEMUTimerCB *) serial_xmit, s);
    1.48  
    1.49      register_savevm("serial", base, 2, serial_save, serial_load, s);
    1.50