ia64/xen-unstable

changeset 5554:90d851ff9036

bitkeeper revision 1.1736 (42ba85d8Vh1WXA4F1eQpFRpsTyq1xg)

[PATCH] sysenter-msr.patch

Handle MSR reads/writes to sysenter related MSRs.

Signed-off-by: Xiaofeng Ling <xiaofeng.ling@intel.com>
Signed-off-by: Chengyuan Li <chengyuan.li@intel.com>
Signed-off-by: Arun Sharma <arun.sharma@intel.com>
author arun.sharma@intel.com[kaf24]
date Thu Jun 23 09:50:16 2005 +0000 (2005-06-23)
parents 106cb416f08c
children 94893eb31f44
files xen/arch/x86/vmx.c
line diff
     1.1 --- a/xen/arch/x86/vmx.c	Thu Jun 23 09:48:46 2005 +0000
     1.2 +++ b/xen/arch/x86/vmx.c	Thu Jun 23 09:50:16 2005 +0000
     1.3 @@ -1009,8 +1009,23 @@ static inline void vmx_do_msr_read(struc
     1.4      VMX_DBG_LOG(DBG_LEVEL_1, "vmx_do_msr_read: ecx=%lx, eax=%lx, edx=%lx",
     1.5                  (unsigned long)regs->ecx, (unsigned long)regs->eax, 
     1.6                  (unsigned long)regs->edx);
     1.7 -
     1.8 -    rdmsr(regs->ecx, regs->eax, regs->edx);
     1.9 +    switch (regs->ecx) {
    1.10 +        case MSR_IA32_SYSENTER_CS:
    1.11 +            __vmread(GUEST_SYSENTER_CS, &regs->eax);
    1.12 +            regs->edx = 0;
    1.13 +            break;
    1.14 +        case MSR_IA32_SYSENTER_ESP:	
    1.15 +             __vmread(GUEST_SYSENTER_ESP, &regs->eax);
    1.16 +             regs->edx = 0;
    1.17 +            break;
    1.18 +        case MSR_IA32_SYSENTER_EIP:		
    1.19 +            __vmread(GUEST_SYSENTER_EIP, &regs->eax);
    1.20 +            regs->edx = 0;
    1.21 +            break;
    1.22 +        default:
    1.23 +            rdmsr(regs->ecx, regs->eax, regs->edx);
    1.24 +            break;
    1.25 +    }
    1.26  
    1.27      VMX_DBG_LOG(DBG_LEVEL_1, "vmx_do_msr_read returns: "
    1.28                  "ecx=%lx, eax=%lx, edx=%lx",
    1.29 @@ -1018,6 +1033,31 @@ static inline void vmx_do_msr_read(struc
    1.30                  (unsigned long)regs->edx);
    1.31  }
    1.32  
    1.33 +static inline void vmx_do_msr_write(struct cpu_user_regs *regs)
    1.34 +{
    1.35 +    VMX_DBG_LOG(DBG_LEVEL_1, "vmx_do_msr_write: ecx=%lx, eax=%lx, edx=%lx",
    1.36 +                (unsigned long)regs->ecx, (unsigned long)regs->eax, 
    1.37 +                (unsigned long)regs->edx);
    1.38 +    switch (regs->ecx) {
    1.39 +        case MSR_IA32_SYSENTER_CS:
    1.40 +            __vmwrite(GUEST_SYSENTER_CS, regs->eax);
    1.41 +            break;
    1.42 +        case MSR_IA32_SYSENTER_ESP:	
    1.43 +             __vmwrite(GUEST_SYSENTER_ESP, regs->eax);
    1.44 +            break;
    1.45 +        case MSR_IA32_SYSENTER_EIP:		
    1.46 +            __vmwrite(GUEST_SYSENTER_EIP, regs->eax);
    1.47 +            break;
    1.48 +        default:
    1.49 +            break;
    1.50 +    }
    1.51 +
    1.52 +    VMX_DBG_LOG(DBG_LEVEL_1, "vmx_do_msr_write returns: "
    1.53 +                "ecx=%lx, eax=%lx, edx=%lx",
    1.54 +                (unsigned long)regs->ecx, (unsigned long)regs->eax,
    1.55 +                (unsigned long)regs->edx);
    1.56 +}
    1.57 +
    1.58  /*
    1.59   * Need to use this exit to reschedule
    1.60   */
    1.61 @@ -1332,9 +1372,7 @@ asmlinkage void vmx_vmexit_handler(struc
    1.62          break;
    1.63      case EXIT_REASON_MSR_WRITE:
    1.64          __vmread(GUEST_RIP, &eip);
    1.65 -        VMX_DBG_LOG(DBG_LEVEL_1, "MSR_WRITE: eip=%lx, eax=%lx, edx=%lx",
    1.66 -                eip, (unsigned long)regs.eax, (unsigned long)regs.edx);
    1.67 -        /* just ignore this point */
    1.68 +        vmx_do_msr_write(&regs);
    1.69          __get_instruction_length(inst_len);
    1.70          __update_guest_eip(inst_len);
    1.71          break;