ia64/xen-unstable

changeset 5838:9038a369268d

Here is a patch to enable Xen to run on a Unisys ES7000 x86_64 system.
Signed-off-by: Aravindh Puthiyaparambil <aravindh.puthiyaparambil@unisys.com>
author kaf24@firebug.cl.cam.ac.uk
date Thu Jul 21 15:50:11 2005 +0000 (2005-07-21)
parents 6e11af443eb1
children 7627476544b5
files xen/arch/x86/genapic/es7000plat.c xen/arch/x86/io_apic.c xen/arch/x86/mpparse.c xen/include/asm-x86/apicdef.h xen/include/asm-x86/genapic.h xen/include/asm-x86/mach-bigsmp/mach_apic.h xen/include/asm-x86/mach-default/mach_apic.h xen/include/asm-x86/mach-es7000/mach_apic.h xen/include/asm-x86/mach-generic/mach_apic.h xen/include/asm-x86/mach-summit/mach_apic.h
line diff
     1.1 --- a/xen/arch/x86/genapic/es7000plat.c	Thu Jul 21 14:15:35 2005 +0000
     1.2 +++ b/xen/arch/x86/genapic/es7000plat.c	Thu Jul 21 15:50:11 2005 +0000
     1.3 @@ -136,7 +136,19 @@ parse_unisys_oem (char *oemptr, int oem_
     1.4  		es7000_plat = 0;
     1.5  	} else {
     1.6  		printk("\nEnabling ES7000 specific features...\n");
     1.7 -		es7000_plat = 1;
     1.8 +		/*
     1.9 +		 * Determine the generation of the ES7000 currently running.
    1.10 +		 *
    1.11 +		 * es7000_plat = 0 if the machine is NOT a Unisys ES7000 box
    1.12 +		 * es7000_plat = 1 if the machine is a 5xx ES7000 box
    1.13 +		 * es7000_plat = 2 if the machine is a x86_64 ES7000 box
    1.14 +		 *
    1.15 +		 */
    1.16 +		if (!(boot_cpu_data.x86 <= 15 && boot_cpu_data.x86_model <= 2))
    1.17 +			es7000_plat = 2;
    1.18 +		else
    1.19 +			es7000_plat = 1;
    1.20 +
    1.21  		ioapic_renumber_irq = es7000_rename_gsi;
    1.22  	}
    1.23  	return es7000_plat;
    1.24 @@ -286,7 +298,7 @@ es7000_stop_cpu(int cpu)
    1.25  void __init
    1.26  es7000_sw_apic()
    1.27  {
    1.28 -	if (es7000_plat) {
    1.29 +	if (es7000_plat == 1) {
    1.30  		int mip_status;
    1.31  		struct mip_reg es7000_mip_reg;
    1.32  
     2.1 --- a/xen/arch/x86/io_apic.c	Thu Jul 21 14:15:35 2005 +0000
     2.2 +++ b/xen/arch/x86/io_apic.c	Thu Jul 21 15:50:11 2005 +0000
     2.3 @@ -956,6 +956,13 @@ static void __init setup_ioapic_ids_from
     2.4      unsigned long flags;
     2.5  
     2.6      /*
     2.7 +     * Don't check I/O APIC IDs for xAPIC systems. They have
     2.8 +     * no meaning without the serial APIC bus.
     2.9 +     */
    2.10 +    if (!(boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && boot_cpu_data.x86 < 15))
    2.11 +        return;
    2.12 +
    2.13 +    /*
    2.14       * This is broken; anything with a real cpu count has to
    2.15       * circumvent this idiocy regardless.
    2.16       */
    2.17 @@ -981,10 +988,6 @@ static void __init setup_ioapic_ids_from
    2.18              mp_ioapics[apic].mpc_apicid = reg_00.bits.ID;
    2.19          }
    2.20  
    2.21 -        /* Don't check I/O APIC IDs for some xAPIC systems.  They have
    2.22 -         * no meaning without the serial APIC bus. */
    2.23 -        if (NO_IOAPIC_CHECK)
    2.24 -            continue;
    2.25          /*
    2.26           * Sanity check, is the ID really free? Every APIC in a
    2.27           * system must have a unique ID or we get lots of nice
     3.1 --- a/xen/arch/x86/mpparse.c	Thu Jul 21 14:15:35 2005 +0000
     3.2 +++ b/xen/arch/x86/mpparse.c	Thu Jul 21 15:50:11 2005 +0000
     3.3 @@ -913,7 +913,10 @@ void __init mp_register_ioapic (
     3.4  	mp_ioapics[idx].mpc_apicaddr = address;
     3.5  
     3.6  	set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address);
     3.7 -	mp_ioapics[idx].mpc_apicid = io_apic_get_unique_id(idx, id);
     3.8 +	if ((boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) && (boot_cpu_data.x86 < 15))
     3.9 +		mp_ioapics[idx].mpc_apicid = io_apic_get_unique_id(idx, id);
    3.10 +	else
    3.11 +		mp_ioapics[idx].mpc_apicid = id;
    3.12  	mp_ioapics[idx].mpc_apicver = io_apic_get_version(idx);
    3.13  	
    3.14  	/* 
    3.15 @@ -995,9 +998,9 @@ void __init mp_config_acpi_legacy_irqs (
    3.16  	Dprintk("Bus #%d is ISA\n", MP_ISA_BUS);
    3.17  
    3.18  	/*
    3.19 -	 * ES7000 has no legacy identity mappings
    3.20 +	 * Older generations of ES7000 have no legacy identity mappings
    3.21  	 */
    3.22 -	if (es7000_plat)
    3.23 +	if (es7000_plat == 1)
    3.24  		return;
    3.25  
    3.26  	/* 
    3.27 @@ -1053,11 +1056,20 @@ void __init mp_config_acpi_legacy_irqs (
    3.28  	}
    3.29  }
    3.30  
    3.31 +#define MAX_GSI_NUM	4096
    3.32 +
    3.33  int mp_register_gsi (u32 gsi, int edge_level, int active_high_low)
    3.34  {
    3.35  	int			ioapic = -1;
    3.36  	int			ioapic_pin = 0;
    3.37  	int			idx, bit = 0;
    3.38 +	static int		pci_irq = 16;
    3.39 +	/*
    3.40 +	 * Mapping between Global System Interrups, which
    3.41 +	 * represent all possible interrupts, and IRQs
    3.42 +	 * assigned to actual devices.
    3.43 +	 */
    3.44 +	static int              gsi_to_irq[MAX_GSI_NUM];
    3.45  
    3.46  #ifdef CONFIG_ACPI_BUS
    3.47  	/* Don't set up the ACPI SCI because it's already set up */
    3.48 @@ -1092,11 +1104,26 @@ int mp_register_gsi (u32 gsi, int edge_l
    3.49  	if ((1<<bit) & mp_ioapic_routing[ioapic].pin_programmed[idx]) {
    3.50  		Dprintk(KERN_DEBUG "Pin %d-%d already programmed\n",
    3.51  			mp_ioapic_routing[ioapic].apic_id, ioapic_pin);
    3.52 -		return gsi;
    3.53 +		return gsi_to_irq[gsi];
    3.54  	}
    3.55  
    3.56  	mp_ioapic_routing[ioapic].pin_programmed[idx] |= (1<<bit);
    3.57  
    3.58 +	if (edge_level) {
    3.59 +		/*
    3.60 +		 * For PCI devices assign IRQs in order, avoiding gaps
    3.61 +		 * due to unused I/O APIC pins.
    3.62 +		 */
    3.63 +		int irq = gsi;
    3.64 +		if (gsi < MAX_GSI_NUM) {
    3.65 +			gsi = pci_irq++;
    3.66 +			gsi_to_irq[irq] = gsi;
    3.67 +		} else {
    3.68 +			printk(KERN_ERR "GSI %u is too high\n", gsi);
    3.69 +			return gsi;
    3.70 +		}
    3.71 +	}
    3.72 +
    3.73  	io_apic_set_pci_routing(ioapic, ioapic_pin, gsi,
    3.74  		    edge_level == ACPI_EDGE_SENSITIVE ? 0 : 1,
    3.75  		    active_high_low == ACPI_ACTIVE_HIGH ? 0 : 1);
     4.1 --- a/xen/include/asm-x86/apicdef.h	Thu Jul 21 14:15:35 2005 +0000
     4.2 +++ b/xen/include/asm-x86/apicdef.h	Thu Jul 21 15:50:11 2005 +0000
     4.3 @@ -108,10 +108,11 @@
     4.4  
     4.5  #define APIC_BASE (fix_to_virt(FIX_APIC_BASE))
     4.6  
     4.7 -#ifdef CONFIG_NUMA
     4.8 - #define MAX_IO_APICS 32
     4.9 +/* These limits are dictated by ES7000 hardware. */
    4.10 +#ifdef __i386__
    4.11 + #define MAX_IO_APICS 65
    4.12  #else
    4.13 - #define MAX_IO_APICS 8
    4.14 + #define MAX_IO_APICS 129
    4.15  #endif
    4.16  
    4.17  /*
     5.1 --- a/xen/include/asm-x86/genapic.h	Thu Jul 21 14:15:35 2005 +0000
     5.2 +++ b/xen/include/asm-x86/genapic.h	Thu Jul 21 15:50:11 2005 +0000
     5.3 @@ -30,7 +30,6 @@ struct genapic {
     5.4  	unsigned long (*check_apicid_used)(physid_mask_t bitmap, int apicid);
     5.5  	unsigned long (*check_apicid_present)(int apicid); 
     5.6  	int no_balance_irq;
     5.7 -	int no_ioapic_check;
     5.8  	void (*init_apic_ldr)(void);
     5.9  	physid_mask_t (*ioapic_phys_id_map)(physid_mask_t map);
    5.10  
    5.11 @@ -78,7 +77,6 @@ struct genapic {
    5.12  	.int_delivery_mode = INT_DELIVERY_MODE, \
    5.13  	.int_dest_mode = INT_DEST_MODE, \
    5.14  	.no_balance_irq = NO_BALANCE_IRQ, \
    5.15 -	.no_ioapic_check = NO_IOAPIC_CHECK, \
    5.16  	.ESR_DISABLE = esr_disable, \
    5.17  	.apic_destination_logical = APIC_DEST_LOGICAL, \
    5.18  	APICFUNC(apic_id_registered), \
     6.1 --- a/xen/include/asm-x86/mach-bigsmp/mach_apic.h	Thu Jul 21 14:15:35 2005 +0000
     6.2 +++ b/xen/include/asm-x86/mach-bigsmp/mach_apic.h	Thu Jul 21 15:50:11 2005 +0000
     6.3 @@ -14,8 +14,6 @@
     6.4  #define NO_BALANCE_IRQ (1)
     6.5  #define esr_disable (1)
     6.6  
     6.7 -#define NO_IOAPIC_CHECK (0)
     6.8 -
     6.9  static inline int apic_id_registered(void)
    6.10  {
    6.11  	return (1);
     7.1 --- a/xen/include/asm-x86/mach-default/mach_apic.h	Thu Jul 21 14:15:35 2005 +0000
     7.2 +++ b/xen/include/asm-x86/mach-default/mach_apic.h	Thu Jul 21 15:50:11 2005 +0000
     7.3 @@ -19,8 +19,6 @@ static inline cpumask_t target_cpus(void
     7.4  #define NO_BALANCE_IRQ (0)
     7.5  #define esr_disable (0)
     7.6  
     7.7 -#define NO_IOAPIC_CHECK (0)
     7.8 -
     7.9  #define INT_DELIVERY_MODE dest_LowestPrio
    7.10  #define INT_DEST_MODE 1     /* logical delivery broadcast to all procs */
    7.11  
     8.1 --- a/xen/include/asm-x86/mach-es7000/mach_apic.h	Thu Jul 21 14:15:35 2005 +0000
     8.2 +++ b/xen/include/asm-x86/mach-es7000/mach_apic.h	Thu Jul 21 15:50:11 2005 +0000
     8.3 @@ -38,8 +38,6 @@ static inline cpumask_t target_cpus(void
     8.4  #define WAKE_SECONDARY_VIA_INIT
     8.5  #endif
     8.6  
     8.7 -#define NO_IOAPIC_CHECK (1)
     8.8 -
     8.9  static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
    8.10  { 
    8.11  	return 0;
     9.1 --- a/xen/include/asm-x86/mach-generic/mach_apic.h	Thu Jul 21 14:15:35 2005 +0000
     9.2 +++ b/xen/include/asm-x86/mach-generic/mach_apic.h	Thu Jul 21 15:50:11 2005 +0000
     9.3 @@ -5,7 +5,6 @@
     9.4  
     9.5  #define esr_disable (genapic->ESR_DISABLE)
     9.6  #define NO_BALANCE_IRQ (genapic->no_balance_irq)
     9.7 -#define NO_IOAPIC_CHECK	(genapic->no_ioapic_check)
     9.8  #define INT_DELIVERY_MODE (genapic->int_delivery_mode)
     9.9  #define INT_DEST_MODE (genapic->int_dest_mode)
    9.10  #undef APIC_DEST_LOGICAL
    10.1 --- a/xen/include/asm-x86/mach-summit/mach_apic.h	Thu Jul 21 14:15:35 2005 +0000
    10.2 +++ b/xen/include/asm-x86/mach-summit/mach_apic.h	Thu Jul 21 15:50:11 2005 +0000
    10.3 @@ -7,8 +7,6 @@
    10.4  #define esr_disable (1)
    10.5  #define NO_BALANCE_IRQ (0)
    10.6  
    10.7 -#define NO_IOAPIC_CHECK (1)	/* Don't check I/O APIC ID for xAPIC */
    10.8 -
    10.9  /* In clustered mode, the high nibble of APIC ID is a cluster number.
   10.10   * The low nibble is a 4-bit bitmap. */
   10.11  #define XAPIC_DEST_CPUS_SHIFT	4