ia64/xen-unstable

changeset 797:8f90e566a816

bitkeeper revision 1.486 (3f82b27fg0yC_syhienAx8hHD4Vabg)

Merge scramble.cl.cam.ac.uk:/auto/groups/xeno/BK/xeno.bk
into scramble.cl.cam.ac.uk:/local/scratch/kaf24/xeno
author kaf24@scramble.cl.cam.ac.uk
date Tue Oct 07 12:33:03 2003 +0000 (2003-10-07)
parents 3a4eb84cc402 0fee6fe6955a
children 101f79f13c44
files xen/arch/i386/mm.c xen/arch/i386/setup.c xen/common/domain.c xen/common/memory.c xen/include/asm-i386/flushtlb.h xen/include/asm-i386/processor.h xen/include/asm-i386/system.h xen/include/xeno/config.h xen/include/xeno/sched.h
line diff
     1.1 --- a/xen/arch/i386/mm.c	Mon Oct 06 18:17:03 2003 +0000
     1.2 +++ b/xen/arch/i386/mm.c	Tue Oct 07 12:33:03 2003 +0000
     1.3 @@ -69,7 +69,7 @@ static void __init fixrange_init (unsign
     1.4          if ( !l2_pgentry_empty(*l2e) ) continue;
     1.5          page = (unsigned long)get_free_page(GFP_KERNEL);
     1.6          clear_page(page);
     1.7 -        *l2e = mk_l2_pgentry(__pa(page) | PAGE_HYPERVISOR);
     1.8 +        *l2e = mk_l2_pgentry(__pa(page) | __PAGE_HYPERVISOR);
     1.9          vaddr += 1 << L2_PAGETABLE_SHIFT;
    1.10      }
    1.11  }
    1.12 @@ -95,7 +95,7 @@ void __init paging_init(void)
    1.13      ioremap_pt = (void *)get_free_page(GFP_KERNEL);
    1.14      clear_page(ioremap_pt);
    1.15      idle0_pg_table[IOREMAP_VIRT_START >> L2_PAGETABLE_SHIFT] = 
    1.16 -        mk_l2_pgentry(__pa(ioremap_pt) | PAGE_HYPERVISOR);
    1.17 +        mk_l2_pgentry(__pa(ioremap_pt) | __PAGE_HYPERVISOR);
    1.18  
    1.19      /* Create read-only mapping of MPT for guest-OS use. */
    1.20      idle0_pg_table[READONLY_MPT_VIRT_START >> L2_PAGETABLE_SHIFT] =
     2.1 --- a/xen/arch/i386/setup.c	Mon Oct 06 18:17:03 2003 +0000
     2.2 +++ b/xen/arch/i386/setup.c	Tue Oct 07 12:33:03 2003 +0000
     2.3 @@ -272,7 +272,11 @@ void __init cpu_init(void)
     2.4      pl2e = idle_pg_table[nr] + (MAPCACHE_VIRT_START >> L2_PAGETABLE_SHIFT);
     2.5      mapcache[nr] = (unsigned long *)get_free_page(GFP_KERNEL);
     2.6      clear_page(mapcache[nr]);
     2.7 -    *pl2e = mk_l2_pgentry(__pa(mapcache[nr]) | PAGE_HYPERVISOR);
     2.8 +    *pl2e = mk_l2_pgentry(__pa(mapcache[nr]) | __PAGE_HYPERVISOR);
     2.9 +
    2.10 +    /* Set up linear page table mapping. */
    2.11 +    idle_pg_table[nr][LINEAR_PT_VIRT_START >> L2_PAGETABLE_SHIFT] =
    2.12 +        mk_l2_pgentry(__pa(idle_pg_table[nr]) | __PAGE_HYPERVISOR);
    2.13  
    2.14      init_idle_task();
    2.15  }
     3.1 --- a/xen/common/domain.c	Mon Oct 06 18:17:03 2003 +0000
     3.2 +++ b/xen/common/domain.c	Tue Oct 07 12:33:03 2003 +0000
     3.3 @@ -367,6 +367,8 @@ int final_setup_guestos(struct task_stru
     3.4          * sizeof(l2_pgentry_t));
     3.5      l2tab[PERDOMAIN_VIRT_START >> L2_PAGETABLE_SHIFT] = 
     3.6          mk_l2_pgentry(__pa(p->mm.perdomain_pt) | __PAGE_HYPERVISOR);
     3.7 +    l2tab[LINEAR_PT_VIRT_START >> L2_PAGETABLE_SHIFT] =
     3.8 +        mk_l2_pgentry(phys_l2tab | __PAGE_HYPERVISOR);
     3.9      p->mm.pagetable = mk_pagetable(phys_l2tab);
    3.10      unmap_domain_mem(l2tab);
    3.11  
    3.12 @@ -542,6 +544,8 @@ int setup_guestos(struct task_struct *p,
    3.13      memcpy(l2tab, idle_pg_table[p->processor], PAGE_SIZE);
    3.14      l2tab[PERDOMAIN_VIRT_START >> L2_PAGETABLE_SHIFT] =
    3.15          mk_l2_pgentry(__pa(p->mm.perdomain_pt) | __PAGE_HYPERVISOR);
    3.16 +    l2tab[LINEAR_PT_VIRT_START >> L2_PAGETABLE_SHIFT] =
    3.17 +        mk_l2_pgentry(phys_l2tab | __PAGE_HYPERVISOR);
    3.18      memset(l2tab, 0, DOMAIN_ENTRIES_PER_L2_PAGETABLE*sizeof(l2_pgentry_t));
    3.19      p->mm.pagetable = mk_pagetable(phys_l2tab);
    3.20  
     4.1 --- a/xen/common/memory.c	Mon Oct 06 18:17:03 2003 +0000
     4.2 +++ b/xen/common/memory.c	Tue Oct 07 12:33:03 2003 +0000
     4.3 @@ -367,6 +367,9 @@ static int get_l2_table(unsigned long pa
     4.4      p_l2_entry[(PERDOMAIN_VIRT_START >> L2_PAGETABLE_SHIFT) -
     4.5                DOMAIN_ENTRIES_PER_L2_PAGETABLE] =
     4.6          mk_l2_pgentry(__pa(current->mm.perdomain_pt) | __PAGE_HYPERVISOR);
     4.7 +    p_l2_entry[(LINEAR_PT_VIRT_START >> L2_PAGETABLE_SHIFT) -
     4.8 +              DOMAIN_ENTRIES_PER_L2_PAGETABLE] =
     4.9 +        mk_l2_pgentry((page_nr << PAGE_SHIFT) | __PAGE_HYPERVISOR);
    4.10  
    4.11   out:
    4.12      unmap_domain_mem(p_l2_entry);
    4.13 @@ -785,7 +788,7 @@ int do_process_page_updates(page_update_
    4.14          case PGREQ_NORMAL:
    4.15              page = frame_table + pfn;
    4.16              flags = page->flags;
    4.17 -            
    4.18 +
    4.19              if ( DOMAIN_OKAY(flags) )
    4.20              {
    4.21                  switch ( (flags & PG_type_mask) )
     5.1 --- a/xen/include/asm-i386/flushtlb.h	Mon Oct 06 18:17:03 2003 +0000
     5.2 +++ b/xen/include/asm-i386/flushtlb.h	Tue Oct 07 12:33:03 2003 +0000
     5.3 @@ -14,12 +14,6 @@
     5.4  #include <asm/atomic.h>
     5.5  
     5.6  atomic_t tlb_flush_count[NR_CPUS];
     5.7 -#define __read_cr3(__var)                                               \
     5.8 -    do {                                                                \
     5.9 -                __asm__ __volatile (                                    \
    5.10 -                        "movl %%cr3, %0;"                               \
    5.11 -                        : "=r" (__var));                                \
    5.12 -    } while (0)
    5.13  
    5.14  #define __write_cr3_counted(__pa)                                       \
    5.15      do {                                                                \
     6.1 --- a/xen/include/asm-i386/processor.h	Mon Oct 06 18:17:03 2003 +0000
     6.2 +++ b/xen/include/asm-i386/processor.h	Tue Oct 07 12:33:03 2003 +0000
     6.3 @@ -19,7 +19,8 @@
     6.4   * Default implementation of macro that returns current
     6.5   * instruction pointer ("program counter").
     6.6   */
     6.7 -#define current_text_addr() ({ void *pc; __asm__("movl $1f,%0\n1:":"=g" (pc)); pc; })
     6.8 +#define current_text_addr() \
     6.9 +  ({ void *pc; __asm__("movl $1f,%0\n1:":"=g" (pc)); pc; })
    6.10  
    6.11  /*
    6.12   *  CPU type and hardware bug flags. Kept separately for each CPU.
    6.13 @@ -159,6 +160,34 @@ static inline unsigned int cpuid_edx(uns
    6.14      return edx;
    6.15  }
    6.16  
    6.17 +
    6.18 +/*
    6.19 + * Intel CPU flags in CR0
    6.20 + */
    6.21 +#define X86_CR0_PE              0x00000001 /* Enable Protected Mode    (RW) */
    6.22 +#define X86_CR0_MP              0x00000002 /* Monitor Coprocessor      (RW) */
    6.23 +#define X86_CR0_EM              0x00000004 /* Require FPU Emulation    (RO) */
    6.24 +#define X86_CR0_TS              0x00000008 /* Task Switched            (RW) */
    6.25 +#define X86_CR0_NE              0x00000020 /* Numeric Error Reporting  (RW) */
    6.26 +#define X86_CR0_WP              0x00010000 /* Supervisor Write Protect (RW) */
    6.27 +#define X86_CR0_AM              0x00040000 /* Alignment Checking       (RW) */
    6.28 +#define X86_CR0_NW              0x20000000 /* Not Write-Through        (RW) */
    6.29 +#define X86_CR0_CD              0x40000000 /* Cache Disable            (RW) */
    6.30 +#define X86_CR0_PG              0x80000000 /* Paging                   (RW) */
    6.31 +
    6.32 +#define read_cr0() ({ \
    6.33 +	unsigned int __dummy; \
    6.34 +	__asm__( \
    6.35 +		"movl %%cr0,%0\n\t" \
    6.36 +		:"=r" (__dummy)); \
    6.37 +	__dummy; \
    6.38 +})
    6.39 +
    6.40 +#define write_cr0(x) \
    6.41 +	__asm__("movl %0,%%cr0": :"r" (x));
    6.42 +
    6.43 +
    6.44 +
    6.45  /*
    6.46   * Intel CPU features in CR4
    6.47   */
     7.1 --- a/xen/include/asm-i386/system.h	Mon Oct 06 18:17:03 2003 +0000
     7.2 +++ b/xen/include/asm-i386/system.h	Tue Oct 07 12:33:03 2003 +0000
     7.3 @@ -4,32 +4,9 @@
     7.4  #include <xeno/config.h>
     7.5  #include <asm/bitops.h>
     7.6  
     7.7 -struct task_struct;
     7.8 -extern void switch_to(struct task_struct *prev, 
     7.9 -                      struct task_struct *next);
    7.10 -
    7.11  /* Clear and set 'TS' bit respectively */
    7.12  #define clts() __asm__ __volatile__ ("clts")
    7.13 -#define read_cr0() ({ \
    7.14 -	unsigned int __dummy; \
    7.15 -	__asm__( \
    7.16 -		"movl %%cr0,%0\n\t" \
    7.17 -		:"=r" (__dummy)); \
    7.18 -	__dummy; \
    7.19 -})
    7.20 -#define write_cr0(x) \
    7.21 -	__asm__("movl %0,%%cr0": :"r" (x));
    7.22 -
    7.23 -#define read_cr4() ({ \
    7.24 -	unsigned int __dummy; \
    7.25 -	__asm__( \
    7.26 -		"movl %%cr4,%0\n\t" \
    7.27 -		:"=r" (__dummy)); \
    7.28 -	__dummy; \
    7.29 -})
    7.30 -#define write_cr4(x) \
    7.31 -	__asm__("movl %0,%%cr4": :"r" (x));
    7.32 -#define stts() write_cr0(8 | read_cr0())
    7.33 +#define stts() write_cr0(X86_CR0_TS|read_cr0())
    7.34  
    7.35  #define wbinvd() \
    7.36  	__asm__ __volatile__ ("wbinvd": : :"memory");
    7.37 @@ -46,62 +23,11 @@ static inline unsigned long get_limit(un
    7.38  
    7.39  #define xchg(ptr,v) ((__typeof__(*(ptr)))__xchg((unsigned long)(v),(ptr),sizeof(*(ptr))))
    7.40  
    7.41 -#define tas(ptr) (xchg((ptr),1))
    7.42 -
    7.43  struct __xchg_dummy { unsigned long a[100]; };
    7.44  #define __xg(x) ((struct __xchg_dummy *)(x))
    7.45  
    7.46  
    7.47  /*
    7.48 - * The semantics of XCHGCMP8B are a bit strange, this is why
    7.49 - * there is a loop and the loading of %%eax and %%edx has to
    7.50 - * be inside. This inlines well in most cases, the cached
    7.51 - * cost is around ~38 cycles. (in the future we might want
    7.52 - * to do an SIMD/3DNOW!/MMX/FPU 64-bit store here, but that
    7.53 - * might have an implicit FPU-save as a cost, so it's not
    7.54 - * clear which path to go.)
    7.55 - */
    7.56 -static inline void __set_64bit (unsigned long long * ptr,
    7.57 -		unsigned int low, unsigned int high)
    7.58 -{
    7.59 -	__asm__ __volatile__ (
    7.60 -		"\n1:\t"
    7.61 -		"movl (%0), %%eax\n\t"
    7.62 -		"movl 4(%0), %%edx\n\t"
    7.63 -		"cmpxchg8b (%0)\n\t"
    7.64 -		"jnz 1b"
    7.65 -		: /* no outputs */
    7.66 -		:	"D"(ptr),
    7.67 -			"b"(low),
    7.68 -			"c"(high)
    7.69 -		:	"ax","dx","memory");
    7.70 -}
    7.71 -
    7.72 -static inline void __set_64bit_constant (unsigned long long *ptr,
    7.73 -						 unsigned long long value)
    7.74 -{
    7.75 -	__set_64bit(ptr,(unsigned int)(value), (unsigned int)((value)>>32ULL));
    7.76 -}
    7.77 -#define ll_low(x)	*(((unsigned int*)&(x))+0)
    7.78 -#define ll_high(x)	*(((unsigned int*)&(x))+1)
    7.79 -
    7.80 -static inline void __set_64bit_var (unsigned long long *ptr,
    7.81 -			 unsigned long long value)
    7.82 -{
    7.83 -	__set_64bit(ptr,ll_low(value), ll_high(value));
    7.84 -}
    7.85 -
    7.86 -#define set_64bit(ptr,value) \
    7.87 -(__builtin_constant_p(value) ? \
    7.88 - __set_64bit_constant(ptr, value) : \
    7.89 - __set_64bit_var(ptr, value) )
    7.90 -
    7.91 -#define _set_64bit(ptr,value) \
    7.92 -(__builtin_constant_p(value) ? \
    7.93 - __set_64bit(ptr, (unsigned int)(value), (unsigned int)((value)>>32ULL) ) : \
    7.94 - __set_64bit(ptr, ll_low(value), ll_high(value)) )
    7.95 -
    7.96 -/*
    7.97   * Note: no "lock" prefix even on SMP: xchg always implies lock anyway
    7.98   * Note 2: xchg has side effect, so that attribute volatile is necessary,
    7.99   *   but generally the primitive is invalid, *ptr is output argument. --ANK
     8.1 --- a/xen/include/xeno/config.h	Mon Oct 06 18:17:03 2003 +0000
     8.2 +++ b/xen/include/xeno/config.h	Tue Oct 07 12:33:03 2003 +0000
     8.3 @@ -63,12 +63,12 @@
     8.4  #define READONLY_MPT_VIRT_START (HYPERVISOR_VIRT_START)
     8.5  #define READONLY_MPT_VIRT_END   (READONLY_MPT_VIRT_START + (4*1024*1024))
     8.6  /*
     8.7 - * Next 16MB is fixed monitor space, which is part of a 48MB direct-mapped
     8.8 + * Next 16MB is fixed monitor space, which is part of a 44MB direct-mapped
     8.9   * memory region. The following are machine addresses.
    8.10   */
    8.11  #define MAX_MONITOR_ADDRESS   (16*1024*1024)
    8.12  #define MAX_DMA_ADDRESS       (16*1024*1024)
    8.13 -#define MAX_DIRECTMAP_ADDRESS (48*1024*1024)
    8.14 +#define MAX_DIRECTMAP_ADDRESS (44*1024*1024)
    8.15  /* And the virtual addresses for the direct-map region... */
    8.16  #define DIRECTMAP_VIRT_START  (READONLY_MPT_VIRT_END)
    8.17  #define DIRECTMAP_VIRT_END    (DIRECTMAP_VIRT_START + MAX_DIRECTMAP_ADDRESS)
    8.18 @@ -78,8 +78,11 @@
    8.19  #define RDWR_MPT_VIRT_END     (RDWR_MPT_VIRT_START + (4*1024*1024))
    8.20  #define FRAMETABLE_VIRT_START (RDWR_MPT_VIRT_END)
    8.21  #define FRAMETABLE_VIRT_END   (DIRECTMAP_VIRT_END)
    8.22 +/* Next 4MB of virtual address space is used as a linear p.t. mapping. */
    8.23 +#define LINEAR_PT_VIRT_START  (DIRECTMAP_VIRT_END)
    8.24 +#define LINEAR_PT_VIRT_END    (LINEAR_PT_VIRT_START + (4*1024*1024))
    8.25  /* Next 4MB of virtual address space used for per-domain mappings (eg. GDT). */
    8.26 -#define PERDOMAIN_VIRT_START  (DIRECTMAP_VIRT_END)
    8.27 +#define PERDOMAIN_VIRT_START  (LINEAR_PT_VIRT_END)
    8.28  #define PERDOMAIN_VIRT_END    (PERDOMAIN_VIRT_START + (4*1024*1024))
    8.29  #define GDT_VIRT_START        (PERDOMAIN_VIRT_START)
    8.30  #define GDT_VIRT_END          (GDT_VIRT_START + (64*1024))
     9.1 --- a/xen/include/xeno/sched.h	Mon Oct 06 18:17:03 2003 +0000
     9.2 +++ b/xen/include/xeno/sched.h	Tue Oct 07 12:33:03 2003 +0000
     9.3 @@ -281,6 +281,10 @@ void reschedule(struct task_struct *p);
     9.4  asmlinkage void __enter_scheduler(void);
     9.5  #define schedule() __schedule_not_callable_in_xen()
     9.6  
     9.7 +extern void switch_to(struct task_struct *prev, 
     9.8 +                      struct task_struct *next);
     9.9 +
    9.10 +
    9.11  /* A compatibility hack for Linux drivers. */
    9.12  #define MAX_SCHEDULE_TIMEOUT 0UL
    9.13  static inline long schedule_timeout(long timeout)