ia64/xen-unstable

changeset 11045:8c6bb45901e7

[IA64] handle ld.s on guest tr mapped page (VTI)

Windows does an ld.s on a tr mapped page.
Currently xen/ipf uses tc/vtlb to emulate guest TR,
that may cause guest ld.s on tr page to be deferred, it is not correct.
For trapping this ld.s intruction, xen/ipf always set machine dcr.dm=0.

Signed-off-by: Anthony Xu <anthony.xu@intel.com>
[Moved cr.dcr restore to only impact vti -> non-vti switch]
Signed-off-by: Alex Williamson <alex.williamson@hp.com>
author awilliam@xenbuild.aw
date Wed Aug 16 14:28:57 2006 -0600 (2006-08-16)
parents 5becaaabd335
children ed22e77a1399
files xen/arch/ia64/vmx/vmx_phy_mode.c xen/arch/ia64/xen/domain.c xen/include/asm-ia64/vmx_vcpu.h xen/include/asm-ia64/vmx_vpd.h
line diff
     1.1 --- a/xen/arch/ia64/vmx/vmx_phy_mode.c	Wed Aug 16 10:40:17 2006 -0600
     1.2 +++ b/xen/arch/ia64/vmx/vmx_phy_mode.c	Wed Aug 16 14:28:57 2006 -0600
     1.3 @@ -195,7 +195,8 @@ vmx_load_all_rr(VCPU *vcpu)
     1.4  			(void *)vcpu->domain->shared_info,
     1.5  			(void *)vcpu->arch.privregs,
     1.6  			(void *)vcpu->arch.vhpt.hash, pal_vaddr );
     1.7 -	ia64_set_pta(vcpu->arch.arch_vmx.mpta);
     1.8 +	ia64_set_pta(VMX(vcpu, mpta));
     1.9 +	ia64_set_dcr(VMX(vcpu, mdcr));
    1.10  
    1.11  	ia64_srlz_d();
    1.12  	ia64_set_psr(psr);
     2.1 --- a/xen/arch/ia64/xen/domain.c	Wed Aug 16 10:40:17 2006 -0600
     2.2 +++ b/xen/arch/ia64/xen/domain.c	Wed Aug 16 14:28:57 2006 -0600
     2.3 @@ -136,10 +136,18 @@ void context_switch(struct vcpu *prev, s
     2.4  
     2.5      __ia64_save_fpu(prev->arch._thread.fph);
     2.6      __ia64_load_fpu(next->arch._thread.fph);
     2.7 -    if (VMX_DOMAIN(prev))
     2.8 -	    vmx_save_state(prev);
     2.9 +    if (VMX_DOMAIN(prev)) {
    2.10 +	vmx_save_state(prev);
    2.11 +	if (!VMX_DOMAIN(next)) {
    2.12 +	    /* VMX domains can change the physical cr.dcr.
    2.13 +	     * Restore default to prevent leakage. */
    2.14 +	    ia64_setreg(_IA64_REG_CR_DCR, (IA64_DCR_DP | IA64_DCR_DK
    2.15 +	                   | IA64_DCR_DX | IA64_DCR_DR | IA64_DCR_PP
    2.16 +	                   | IA64_DCR_DA | IA64_DCR_DD | IA64_DCR_LC));
    2.17 +	}
    2.18 +    }
    2.19      if (VMX_DOMAIN(next))
    2.20 -	    vmx_load_state(next);
    2.21 +	vmx_load_state(next);
    2.22      /*ia64_psr(ia64_task_regs(next))->dfh = !ia64_is_local_fpu_owner(next);*/
    2.23      prev = ia64_switch_to(next);
    2.24  
     3.1 --- a/xen/include/asm-ia64/vmx_vcpu.h	Wed Aug 16 10:40:17 2006 -0600
     3.2 +++ b/xen/include/asm-ia64/vmx_vcpu.h	Wed Aug 16 14:28:57 2006 -0600
     3.3 @@ -239,12 +239,13 @@ vmx_vcpu_set_dcr(VCPU *vcpu, u64 val)
     3.4  {
     3.5      u64 mdcr, mask;
     3.6      VCPU(vcpu,dcr)=val;
     3.7 -    /* All vDCR bits will go to mDCR, except for be/pp bit */
     3.8 +    /* All vDCR bits will go to mDCR, except for be/pp/dm bits */
     3.9      mdcr = ia64_get_dcr();
    3.10 -    mask = IA64_DCR_BE | IA64_DCR_PP;
    3.11 +    /* Machine dcr.dm masked to handle guest ld.s on tr mapped page */
    3.12 +    mask = IA64_DCR_BE | IA64_DCR_PP | IA64_DCR_DM;
    3.13      mdcr = ( mdcr & mask ) | ( val & (~mask) );
    3.14      ia64_set_dcr( mdcr);
    3.15 -
    3.16 +    VMX(vcpu, mdcr) = mdcr;
    3.17      return IA64_NO_FAULT;
    3.18  }
    3.19  
     4.1 --- a/xen/include/asm-ia64/vmx_vpd.h	Wed Aug 16 10:40:17 2006 -0600
     4.2 +++ b/xen/include/asm-ia64/vmx_vpd.h	Wed Aug 16 14:28:57 2006 -0600
     4.3 @@ -89,6 +89,7 @@ struct arch_vmx_struct {
     4.4  //    unsigned long   mrr5;
     4.5  //    unsigned long   mrr6;
     4.6  //    unsigned long   mrr7;
     4.7 +    unsigned long   mdcr;
     4.8      unsigned long   mpta;
     4.9  //    unsigned long   rfi_pfs;
    4.10  //    unsigned long   rfi_iip;