ia64/xen-unstable

changeset 5354:86fe63442842

bitkeeper revision 1.1687 (42a54554WlNG2upO1_XkGsTZKFcGnQ)

[PATCH] vmx-pit-reset-vector.patch

If the guest resets irq_base in the PIC, we should reset the vector
in the hypervisor as well.

Signed-off-by: Arun Sharma <arun.sharma@intel.com>
author arun.sharma@intel.com[kaf24]
date Tue Jun 07 06:57:24 2005 +0000 (2005-06-07)
parents 03616508a241
children cc6c1889cdb0
files tools/ioemu/hw/i8254.c tools/ioemu/hw/i8259.c
line diff
     1.1 --- a/tools/ioemu/hw/i8254.c	Mon Jun 06 16:04:03 2005 +0000
     1.2 +++ b/tools/ioemu/hw/i8254.c	Tue Jun 07 06:57:24 2005 +0000
     1.3 @@ -50,6 +50,7 @@ typedef struct PITChannelState {
     1.4      int64_t next_transition_time;
     1.5      QEMUTimer *irq_timer;
     1.6      int irq;
     1.7 +    int vmx_channel; /* Is this accelerated by VMX ? */
     1.8  } PITChannelState;
     1.9  
    1.10  struct PITState {
    1.11 @@ -214,12 +215,47 @@ int pit_get_gate(PITState *pit, int chan
    1.12      return s->gate;
    1.13  }
    1.14  
    1.15 -static inline void pit_load_count(PITChannelState *s, int val)
    1.16 +void pit_reset_vmx_vectors()
    1.17  {
    1.18      extern void *shared_page;
    1.19      ioreq_t *req; 
    1.20 -    int irq;
    1.21 +    int irq, i;
    1.22 +    PITChannelState *s;
    1.23 +
    1.24 +    /* Assumes PIT is wired to IRQ0 and -1 is uninitialized irq base */
    1.25 +    if ((irq = pic_irq2vec(0)) == -1)
    1.26 +        return;
    1.27 +
    1.28 +    for(i = 0; i < 3; i++) {
    1.29 +        if (pit_state.channels[i].vmx_channel)
    1.30 +             break;
    1.31 +    }
    1.32 +    
    1.33 +    if (i == 3)
    1.34 +        return;
    1.35  
    1.36 +    /* Assumes just one VMX accelerated channel */
    1.37 +    vmx_channel = i;
    1.38 +    s = &pit_state.channels[vmx_channel];
    1.39 +    fprintf(logfile,
    1.40 +    	"VMX_PIT:guest init pit channel %d!\n", vmx_channel);
    1.41 +    req = &((vcpu_iodata_t *) shared_page)->vp_ioreq;
    1.42 +
    1.43 +    req->state = STATE_IORESP_HOOK;
    1.44 +    /*
    1.45 +     * info passed to HV as following
    1.46 +     * -- init count:16 bit, timer vec:8 bit,
    1.47 +     * PIT channel(0~2):2 bit, rw mode:2 bit
    1.48 +     */
    1.49 +    req->u.data = s->count;
    1.50 +    req->u.data |= (irq << 16);
    1.51 +    req->u.data |= (vmx_channel << 24);
    1.52 +    req->u.data |= ((s->rw_mode) << 26);
    1.53 +    fprintf(logfile, "VMX_PIT:pass info 0x%llx to HV!\n", req->u.data);
    1.54 +}
    1.55 +
    1.56 +static inline void pit_load_count(PITChannelState *s, int val)
    1.57 +{
    1.58      if (val == 0)
    1.59          val = 0x10000;
    1.60      s->count_load_time = qemu_get_clock(vm_clock);
    1.61 @@ -228,25 +264,8 @@ static inline void pit_load_count(PITCha
    1.62      /* guest init this pit channel for periodic mode. we do not update related
    1.63       * timer so the channel never send intr from device model*/
    1.64      if (vmx_channel != -1 && s->mode == 2) {
    1.65 -	/* get the pit irq(0)'s vector from pic DM */
    1.66 -	if ((irq = pic_irq2vec(0)) >= 0) {
    1.67 -	    fprintf(logfile,
    1.68 -	    	"VMX_PIT:guest init pit channel %d!\n", vmx_channel);
    1.69 -	    req = &((vcpu_iodata_t *) shared_page)->vp_ioreq;
    1.70 -
    1.71 -	    req->state = STATE_IORESP_HOOK;
    1.72 -	    /*
    1.73 -	     * info passed to HV as following
    1.74 -	     * -- init count:16 bit, timer vec:8 bit,
    1.75 -	     * PIT channel(0~2):2 bit, rw mode:2 bit
    1.76 -	     */
    1.77 -	    req->u.data = s->count;
    1.78 -	    req->u.data |= (irq << 16);
    1.79 -	    req->u.data |= (vmx_channel << 24);
    1.80 -	    req->u.data |= ((s->rw_mode) << 26);
    1.81 -	    fprintf(logfile, "VMX_PIT:pass info 0x%llx to HV!\n", req->u.data);
    1.82 -	    vmx_channel = -1;
    1.83 -	}
    1.84 +        pit_reset_vmx_vectors();
    1.85 +        vmx_channel = -1;
    1.86      }
    1.87  
    1.88  /*    pit_irq_timer_update(s, s->count_load_time);*/
    1.89 @@ -306,6 +325,7 @@ static void pit_ioport_write(void *opaqu
    1.90          }
    1.91      } else {
    1.92          s = &pit->channels[addr];
    1.93 +        s->vmx_channel = 1;
    1.94          vmx_channel = addr;
    1.95          switch(s->write_state) {
    1.96          default:
     2.1 --- a/tools/ioemu/hw/i8259.c	Mon Jun 06 16:04:03 2005 +0000
     2.2 +++ b/tools/ioemu/hw/i8259.c	Tue Jun 07 06:57:24 2005 +0000
     2.3 @@ -334,6 +334,7 @@ static void pic_ioport_write(void *opaqu
     2.4          case 1:
     2.5              s->irq_base = val & 0xf8;
     2.6              s->init_state = 2;
     2.7 +            pit_reset_vmx_vectors();
     2.8              break;
     2.9          case 2:
    2.10              if (s->init4) {