ia64/xen-unstable

changeset 15790:86a02b7148fa

x86: Kill Rise iDragon support.

Don't carry dead code needlessly: this is a family 5 CPU, which Xen
doesn't support. Perhaps, other CPUs' files could use some cleanup in
that respect, too, but there it would increase the delta to the Linux
origin of these files, while here the entire file can go away.

Signed-off-by: Jan Beulich <jbeulich@novell.com>
author kfraser@localhost.localdomain
date Wed Aug 29 11:34:01 2007 +0100 (2007-08-29)
parents 8e9ec8711efa
children 79053138b35c
files xen/arch/x86/cpu/Makefile xen/arch/x86/cpu/common.c xen/arch/x86/cpu/rise.c
line diff
     1.1 --- a/xen/arch/x86/cpu/Makefile	Tue Aug 28 16:13:35 2007 +0100
     1.2 +++ b/xen/arch/x86/cpu/Makefile	Wed Aug 29 11:34:01 2007 +0100
     1.3 @@ -8,5 +8,4 @@ obj-y += intel_cacheinfo.o
     1.4  
     1.5  obj-$(x86_32) += centaur.o
     1.6  obj-$(x86_32) += cyrix.o
     1.7 -obj-$(x86_32) += rise.o
     1.8  obj-$(x86_32) += transmeta.o
     2.1 --- a/xen/arch/x86/cpu/common.c	Tue Aug 28 16:13:35 2007 +0100
     2.2 +++ b/xen/arch/x86/cpu/common.c	Wed Aug 29 11:34:01 2007 +0100
     2.3 @@ -524,7 +524,6 @@ extern int nsc_init_cpu(void);
     2.4  extern int amd_init_cpu(void);
     2.5  extern int centaur_init_cpu(void);
     2.6  extern int transmeta_init_cpu(void);
     2.7 -extern int rise_init_cpu(void);
     2.8  
     2.9  void __init early_cpu_init(void)
    2.10  {
    2.11 @@ -535,7 +534,6 @@ void __init early_cpu_init(void)
    2.12  	nsc_init_cpu();
    2.13  	centaur_init_cpu();
    2.14  	transmeta_init_cpu();
    2.15 -	rise_init_cpu();
    2.16  #endif
    2.17  	early_cpu_detect();
    2.18  }
     3.1 --- a/xen/arch/x86/cpu/rise.c	Tue Aug 28 16:13:35 2007 +0100
     3.2 +++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
     3.3 @@ -1,54 +0,0 @@
     3.4 -#include <xen/config.h>
     3.5 -#include <xen/lib.h>
     3.6 -#include <xen/init.h>
     3.7 -#include <xen/bitops.h>
     3.8 -#include <asm/processor.h>
     3.9 -
    3.10 -#include "cpu.h"
    3.11 -
    3.12 -static void __init init_rise(struct cpuinfo_x86 *c)
    3.13 -{
    3.14 -	printk("CPU: Rise iDragon");
    3.15 -	if (c->x86_model > 2)
    3.16 -		printk(" II");
    3.17 -	printk("\n");
    3.18 -
    3.19 -	/* Unhide possibly hidden capability flags
    3.20 -	   The mp6 iDragon family don't have MSRs.
    3.21 -	   We switch on extra features with this cpuid weirdness: */
    3.22 -	__asm__ (
    3.23 -		"movl $0x6363452a, %%eax\n\t"
    3.24 -		"movl $0x3231206c, %%ecx\n\t"
    3.25 -		"movl $0x2a32313a, %%edx\n\t"
    3.26 -		"cpuid\n\t"
    3.27 -		"movl $0x63634523, %%eax\n\t"
    3.28 -		"movl $0x32315f6c, %%ecx\n\t"
    3.29 -		"movl $0x2333313a, %%edx\n\t"
    3.30 -		"cpuid\n\t" : : : "eax", "ebx", "ecx", "edx"
    3.31 -	);
    3.32 -	set_bit(X86_FEATURE_CX8, c->x86_capability);
    3.33 -}
    3.34 -
    3.35 -static struct cpu_dev rise_cpu_dev __initdata = {
    3.36 -	.c_vendor	= "Rise",
    3.37 -	.c_ident	= { "RiseRiseRise" },
    3.38 -	.c_models = {
    3.39 -		{ .vendor = X86_VENDOR_RISE, .family = 5, .model_names = 
    3.40 -		  { 
    3.41 -			  [0] = "iDragon", 
    3.42 -			  [2] = "iDragon", 
    3.43 -			  [8] = "iDragon II", 
    3.44 -			  [9] = "iDragon II"
    3.45 -		  }
    3.46 -		},
    3.47 -	},
    3.48 -	.c_init		= init_rise,
    3.49 -};
    3.50 -
    3.51 -int __init rise_init_cpu(void)
    3.52 -{
    3.53 -	cpu_devs[X86_VENDOR_RISE] = &rise_cpu_dev;
    3.54 -	return 0;
    3.55 -}
    3.56 -
    3.57 -//early_arch_initcall(rise_init_cpu);