ia64/xen-unstable

changeset 15662:85c2f2d754ef

[IA64] Use key in optimzation feature

Added IA64_INST_KEY_MISS_VECTOR and IA64_DATA_KEY_MISS_VECTOR to
ia64_handle_reflection. Added using the key in handling
XEN_IA64_OPTF_IDENT_MAP_REG7 in PV.

Signed-off-by: Dietmar Hahn <dietmar.hahn@fujitsu-siemens.com>
author Alex Williamson <alex.williamson@hp.com>
date Mon Jul 30 16:10:17 2007 -0600 (2007-07-30)
parents 522a1932111f
children 255abff9d1f7
files xen/arch/ia64/xen/faults.c xen/arch/ia64/xen/vcpu.c
line diff
     1.1 --- a/xen/arch/ia64/xen/faults.c	Mon Jul 30 16:07:11 2007 -0600
     1.2 +++ b/xen/arch/ia64/xen/faults.c	Mon Jul 30 16:10:17 2007 -0600
     1.3 @@ -572,6 +572,12 @@ ia64_handle_reflection(unsigned long ifa
     1.4  	BUG_ON(!(psr & IA64_PSR_CPL));
     1.5  
     1.6  	switch (vector) {
     1.7 +	case 6:
     1.8 +		vector = IA64_INST_KEY_MISS_VECTOR;
     1.9 +		break;
    1.10 +	case 7:
    1.11 +		vector = IA64_DATA_KEY_MISS_VECTOR;
    1.12 +		break;
    1.13  	case 8:
    1.14  		vector = IA64_DIRTY_BIT_VECTOR;
    1.15  		break;
     2.1 --- a/xen/arch/ia64/xen/vcpu.c	Mon Jul 30 16:07:11 2007 -0600
     2.2 +++ b/xen/arch/ia64/xen/vcpu.c	Mon Jul 30 16:10:17 2007 -0600
     2.3 @@ -1623,7 +1623,7 @@ IA64FAULT vcpu_translate(VCPU * vcpu, u6
     2.4  			 u64 * pteval, u64 * itir, u64 * iha)
     2.5  {
     2.6  	unsigned long region = address >> 61;
     2.7 -	unsigned long pta, rid, rr;
     2.8 +	unsigned long pta, rid, rr, key = 0;
     2.9  	union pte_flags pte;
    2.10  	TR_ENTRY *trp;
    2.11  
    2.12 @@ -1716,6 +1716,7 @@ IA64FAULT vcpu_translate(VCPU * vcpu, u6
    2.13  		    region == 7 && ia64_psr(regs)->cpl == CONFIG_CPL0_EMUL) {
    2.14  			pte.val = address & _PAGE_PPN_MASK;
    2.15  			pte.val = pte.val | optf->im_reg7.pgprot;
    2.16 +			key = optf->im_reg7.key;
    2.17  			goto out;
    2.18  		}
    2.19  		return is_data ? IA64_ALT_DATA_TLB_VECTOR :
    2.20 @@ -1741,7 +1742,7 @@ IA64FAULT vcpu_translate(VCPU * vcpu, u6
    2.21  
    2.22  	/* found mapping in guest VHPT! */
    2.23  out:
    2.24 -	*itir = rr & RR_PS_MASK;
    2.25 +	*itir = (rr & RR_PS_MASK) | (key << IA64_ITIR_KEY);
    2.26  	*pteval = pte.val;
    2.27  	perfc_incr(vhpt_translate);
    2.28  	return IA64_NO_FAULT;