ia64/xen-unstable
changeset 18102:7f766b4a170b
x86: Remove clocksource=tsc for now.
Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
author | Keir Fraser <keir.fraser@citrix.com> |
---|---|
date | Fri Jul 18 12:26:49 2008 +0100 (2008-07-18) |
parents | b896b39470f0 |
children | 0d88b4b86428 |
files | xen/arch/x86/domain.c xen/arch/x86/time.c |
line diff
1.1 --- a/xen/arch/x86/domain.c Fri Jul 18 11:24:13 2008 +0100 1.2 +++ b/xen/arch/x86/domain.c Fri Jul 18 12:26:49 2008 +0100 1.3 @@ -286,10 +286,6 @@ int vcpu_initialise(struct vcpu *v) 1.4 1.5 v->arch.flags = TF_kernel_mode; 1.6 1.7 - /* Ensure that update_vcpu_system_time() fires at least once. */ 1.8 - if ( !is_idle_domain(d) ) 1.9 - vcpu_info(v, time).tsc_timestamp = ~0ull; 1.10 - 1.11 #if defined(__i386__) 1.12 mapcache_vcpu_init(v); 1.13 #endif
2.1 --- a/xen/arch/x86/time.c Fri Jul 18 11:24:13 2008 +0100 2.2 +++ b/xen/arch/x86/time.c Fri Jul 18 12:26:49 2008 +0100 2.3 @@ -481,46 +481,6 @@ static int init_pmtimer(struct platform_ 2.4 } 2.5 2.6 /************************************************************ 2.7 - * PLATFORM TIMER 5: TSC 2.8 - */ 2.9 - 2.10 -#define platform_timer_is_tsc() (!strcmp(plt_src.name, "TSC")) 2.11 -static u64 tsc_freq; 2.12 - 2.13 -static u64 read_tsc_count(void) 2.14 -{ 2.15 - u64 tsc; 2.16 - rdtscll(tsc); 2.17 - return tsc; 2.18 -} 2.19 - 2.20 -static int init_tsctimer(struct platform_timesource *pts) 2.21 -{ 2.22 - unsigned int cpu; 2.23 - 2.24 - /* 2.25 - * TODO: evaluate stability of TSC here, return 0 if not stable. 2.26 - * For now we assume all TSCs are synchronised and hence can all share 2.27 - * CPU 0's calibration values. 2.28 - */ 2.29 - for_each_cpu ( cpu ) 2.30 - { 2.31 - if ( cpu == 0 ) 2.32 - continue; 2.33 - memcpy(&per_cpu(cpu_time, cpu), 2.34 - &per_cpu(cpu_time, 0), 2.35 - sizeof(struct cpu_time)); 2.36 - } 2.37 - 2.38 - pts->name = "TSC"; 2.39 - pts->frequency = tsc_freq; 2.40 - pts->read_counter = read_tsc_count; 2.41 - pts->counter_bits = 64; 2.42 - 2.43 - return 1; 2.44 -} 2.45 - 2.46 -/************************************************************ 2.47 * GENERIC PLATFORM TIMER INFRASTRUCTURE 2.48 */ 2.49 2.50 @@ -605,8 +565,6 @@ static void init_platform_timer(void) 2.51 rc = init_cyclone(pts); 2.52 else if ( !strcmp(opt_clocksource, "acpi") ) 2.53 rc = init_pmtimer(pts); 2.54 - else if ( !strcmp(opt_clocksource, "tsc") ) 2.55 - rc = init_tsctimer(pts); 2.56 2.57 if ( rc <= 0 ) 2.58 printk("WARNING: %s clocksource '%s'.\n", 2.59 @@ -822,10 +780,6 @@ int cpu_frequency_change(u64 freq) 2.60 struct cpu_time *t = &this_cpu(cpu_time); 2.61 u64 curr_tsc; 2.62 2.63 - /* Nothing to do if TSC is platform timer. Assume it is constant-rate. */ 2.64 - if ( platform_timer_is_tsc() ) 2.65 - return 0; 2.66 - 2.67 /* Sanity check: CPU frequency allegedly dropping below 1MHz? */ 2.68 if ( freq < 1000000u ) 2.69 { 2.70 @@ -1024,12 +978,9 @@ void init_percpu_time(void) 2.71 unsigned long flags; 2.72 s_time_t now; 2.73 2.74 - if ( platform_timer_is_tsc() ) 2.75 - return; 2.76 - 2.77 local_irq_save(flags); 2.78 rdtscll(t->local_tsc_stamp); 2.79 - now = read_platform_stime(); 2.80 + now = !plt_src.read_counter ? 0 : read_platform_stime(); 2.81 local_irq_restore(flags); 2.82 2.83 t->stime_master_stamp = now; 2.84 @@ -1047,11 +998,11 @@ int __init init_xen_time(void) 2.85 2.86 local_irq_disable(); 2.87 2.88 + init_percpu_time(); 2.89 + 2.90 stime_platform_stamp = 0; 2.91 init_platform_timer(); 2.92 2.93 - init_percpu_time(); 2.94 - 2.95 /* check if TSC is invariant during deep C state 2.96 this is a new feature introduced by Nehalem*/ 2.97 if ( cpuid_edx(0x80000007) & (1U<<8) ) 2.98 @@ -1068,7 +1019,6 @@ void __init early_time_init(void) 2.99 { 2.100 u64 tmp = init_pit_and_calibrate_tsc(); 2.101 2.102 - tsc_freq = tmp; 2.103 set_time_scale(&this_cpu(cpu_time).tsc_scale, tmp); 2.104 2.105 do_div(tmp, 1000);