ia64/xen-unstable

changeset 12914:7f3ae39112cd

[XEN][POWERPC] Machine check now inspects the SCOM for more information
Also fixes suggested by <segher@kernel.crashing.org>
Signed-off-by: Jimi Xenidis <jimix@watson.ibm.com>
Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com>
author Jimi Xenidis <jimix@watson.ibm.com>
date Fri Sep 22 11:02:47 2006 -0400 (2006-09-22)
parents 95cead06e4ab
children 4da585fb62f9
files xen/arch/powerpc/powerpc64/ppc970_machinecheck.c xen/arch/powerpc/powerpc64/ppc970_scom.c
line diff
     1.1 --- a/xen/arch/powerpc/powerpc64/ppc970_machinecheck.c	Thu Sep 21 13:48:24 2006 -0400
     1.2 +++ b/xen/arch/powerpc/powerpc64/ppc970_machinecheck.c	Fri Sep 22 11:02:47 2006 -0400
     1.3 @@ -24,6 +24,8 @@
     1.4  #include <public/xen.h>
     1.5  #include <asm/processor.h>
     1.6  #include <asm/percpu.h>
     1.7 +#include <asm/debugger.h>
     1.8 +#include "scom.h"
     1.9  
    1.10  #define MCK_SRR1_INSN_FETCH_UNIT    0x0000000000200000 /* 42 */
    1.11  #define MCK_SRR1_LOAD_STORE         0x0000000000100000 /* 43 */
    1.12 @@ -54,6 +56,8 @@ int cpu_machinecheck(struct cpu_user_reg
    1.13      if (mck_cpu_stats[mfpir()] != 0)
    1.14          printk("While in CI IO\n");
    1.15  
    1.16 +    show_backtrace_regs(regs);
    1.17 +
    1.18      printk("SRR1: 0x%016lx\n", regs->msr);
    1.19      if (regs->msr & MCK_SRR1_INSN_FETCH_UNIT)
    1.20          printk("42: Exception caused by Instruction Fetch Unit (IFU)\n"
    1.21 @@ -67,6 +71,7 @@ int cpu_machinecheck(struct cpu_user_reg
    1.22      case 0:
    1.23          printk("0b00: Likely caused by an asynchronous machine check,\n"
    1.24                 "      see SCOM Asynchronous Machine Check Register\n");
    1.25 +        cpu_scom_AMCR();
    1.26          break;
    1.27      case MCK_SRR1_CAUSE_SLB_PAR:
    1.28          printk("0b01: Exception caused by an SLB parity error detected\n"
    1.29 @@ -116,5 +121,5 @@ int cpu_machinecheck(struct cpu_user_reg
    1.30          dump_segments(0);
    1.31      }
    1.32  
    1.33 -    return 0; /* for now lets not recover; */
    1.34 +    return 0; /* for now lets not recover */
    1.35  }
     2.1 --- a/xen/arch/powerpc/powerpc64/ppc970_scom.c	Thu Sep 21 13:48:24 2006 -0400
     2.2 +++ b/xen/arch/powerpc/powerpc64/ppc970_scom.c	Fri Sep 22 11:02:47 2006 -0400
     2.3 @@ -24,6 +24,7 @@
     2.4  #include <xen/console.h>
     2.5  #include <xen/errno.h>
     2.6  #include <asm/delay.h>
     2.7 +#include "scom.h"
     2.8  
     2.9  #define SPRN_SCOMC 276
    2.10  #define SPRN_SCOMD 277
    2.11 @@ -48,7 +49,7 @@ union scomc {
    2.12  };
    2.13  
    2.14  
    2.15 -static inline int read_scom(uint addr, ulong *d)
    2.16 +int cpu_scom_read(uint addr, ulong *d)
    2.17  {
    2.18      union scomc c;
    2.19      ulong flags;
    2.20 @@ -56,9 +57,9 @@ static inline int read_scom(uint addr, u
    2.21      /* drop the low 8bits (including parity) */
    2.22      addr >>= 8;
    2.23  
    2.24 -    /* these give iface errors because the address is ambiguous after
    2.25 -     * the above bit dropping */
    2.26 -    BUG_ON(addr == 0x8000);
    2.27 +    /* these give iface errors because the addresses are not software
    2.28 +     * accessible */
    2.29 +    BUG_ON(addr & 0x8000);
    2.30  
    2.31      for (;;) {
    2.32          c.word = 0;
    2.33 @@ -100,7 +101,7 @@ static inline int read_scom(uint addr, u
    2.34      }
    2.35  }
    2.36  
    2.37 -static inline int write_scom(uint addr, ulong d)
    2.38 +int cpu_scom_write(uint addr, ulong d)
    2.39  {
    2.40      union scomc c;
    2.41      ulong flags;
    2.42 @@ -108,9 +109,9 @@ static inline int write_scom(uint addr, 
    2.43      /* drop the low 8bits (including parity) */
    2.44      addr >>= 8;
    2.45  
    2.46 -    /* these give iface errors because the address is ambiguous after
    2.47 -     * the above bit dropping */
    2.48 -    BUG_ON(addr == 0x8000);
    2.49 +    /* these give iface errors because the addresses are not software
    2.50 +     * accessible */
    2.51 +    BUG_ON(addr & 0x8000);
    2.52  
    2.53      for (;;) {
    2.54          c.word = 0;
    2.55 @@ -150,25 +151,21 @@ static inline int write_scom(uint addr, 
    2.56      }
    2.57  }
    2.58  
    2.59 -/* SCOMC addresses are 16bit but we are given 24 bits in the
    2.60 - * books. The low oerder 8 bits are some kinda parity thin and should
    2.61 - * be ignored */
    2.62 -#define SCOM_AMCS_REG      0x022601
    2.63 -#define SCOM_AMCS_AND_MASK 0x022700
    2.64 -#define SCOM_AMCS_OR_MASK  0x022800
    2.65 -#define SCOM_CMCE          0x030901
    2.66 -#define SCOM_PMCR          0x400801
    2.67 -#define SCOM_PTSR          0x408001
    2.68 -
    2.69 -/* cannot access these since only top 16bits are considered */
    2.70 -#define SCOM_STATUS        0x800003
    2.71 -
    2.72  void cpu_scom_init(void)
    2.73  {
    2.74      ulong val;
    2.75      console_start_sync();
    2.76 -    if (!read_scom(SCOM_PTSR, &val))
    2.77 +    if (!cpu_scom_read(SCOM_PTSR, &val))
    2.78          printk("SCOM PTSR: 0x%016lx\n", val);
    2.79  
    2.80      console_end_sync();
    2.81  }
    2.82 +
    2.83 +void cpu_scom_AMCR(void)
    2.84 +{
    2.85 +    ulong val;
    2.86 +
    2.87 +    cpu_scom_read(SCOM_AMC_REG, &val);
    2.88 +    printk("SCOM AMCR: 0x%016lx\n", val);
    2.89 +}
    2.90 +