ia64/xen-unstable

changeset 9099:7edd64c8bb36

Fix printing of u64 value 'msr_content' to use PRIx64 format.

Signed-off-by: Keir Fraser <keir@xensource.com>
author kaf24@firebug.cl.cam.ac.uk
date Thu Mar 02 10:59:34 2006 +0100 (2006-03-02)
parents 34b7dd72aa55
children eeac4fdf02ed
files xen/arch/x86/hvm/svm/svm.c xen/arch/x86/hvm/vmx/vmx.c
line diff
     1.1 --- a/xen/arch/x86/hvm/svm/svm.c	Thu Mar 02 03:21:38 2006 +0100
     1.2 +++ b/xen/arch/x86/hvm/svm/svm.c	Thu Mar 02 10:59:34 2006 +0100
     1.3 @@ -298,13 +298,8 @@ static inline int long_mode_do_msr_read(
     1.4          return 0;
     1.5      }
     1.6  
     1.7 -#ifdef __x86_64__
     1.8 -    HVM_DBG_LOG(DBG_LEVEL_2, "mode_do_msr_read: msr_content: %lx\n", 
     1.9 +    HVM_DBG_LOG(DBG_LEVEL_2, "mode_do_msr_read: msr_content: %"PRIx64"\n", 
    1.10              msr_content);
    1.11 -#else
    1.12 -    HVM_DBG_LOG(DBG_LEVEL_2, "mode_do_msr_read: msr_content: %llx\n", 
    1.13 -            msr_content);
    1.14 -#endif
    1.15  
    1.16      regs->eax = msr_content & 0xffffffff;
    1.17      regs->edx = msr_content >> 32;
    1.18 @@ -317,13 +312,9 @@ static inline int long_mode_do_msr_write
    1.19      struct vcpu *vc = current;
    1.20      struct vmcb_struct *vmcb = vc->arch.hvm_svm.vmcb;
    1.21  
    1.22 -#ifdef __x86_64__
    1.23 -    HVM_DBG_LOG(DBG_LEVEL_1, "mode_do_msr_write msr %lx msr_content %lx\n", 
    1.24 -                regs->ecx, msr_content);
    1.25 -#else
    1.26 -    HVM_DBG_LOG(DBG_LEVEL_1, "mode_do_msr_write msr %x msr_content %llx\n", 
    1.27 -                regs->ecx, msr_content);
    1.28 -#endif
    1.29 +    HVM_DBG_LOG(DBG_LEVEL_1, "mode_do_msr_write msr %lx "
    1.30 +                "msr_content %"PRIx64"\n", 
    1.31 +                (unsigned long)regs->ecx, msr_content);
    1.32  
    1.33      switch (regs->ecx)
    1.34      {
     2.1 --- a/xen/arch/x86/hvm/vmx/vmx.c	Thu Mar 02 03:21:38 2006 +0100
     2.2 +++ b/xen/arch/x86/hvm/vmx/vmx.c	Thu Mar 02 10:59:34 2006 +0100
     2.3 @@ -172,7 +172,7 @@ static inline int long_mode_do_msr_read(
     2.4      switch(regs->ecx){
     2.5      case MSR_EFER:
     2.6          msr_content = msr->msr_items[VMX_INDEX_MSR_EFER];
     2.7 -        HVM_DBG_LOG(DBG_LEVEL_2, "EFER msr_content %llx\n", (unsigned long long)msr_content);
     2.8 +        HVM_DBG_LOG(DBG_LEVEL_2, "EFER msr_content %"PRIx64"\n", msr_content);
     2.9          if (test_bit(VMX_CPU_STATE_LME_ENABLED,
    2.10                       &vc->arch.hvm_vmx.cpu_state))
    2.11              msr_content |= 1 << _EFER_LME;
    2.12 @@ -202,7 +202,8 @@ static inline int long_mode_do_msr_read(
    2.13      default:
    2.14          return 0;
    2.15      }
    2.16 -    HVM_DBG_LOG(DBG_LEVEL_2, "mode_do_msr_read: msr_content: %lx\n", msr_content);
    2.17 +    HVM_DBG_LOG(DBG_LEVEL_2, "mode_do_msr_read: msr_content: %"PRIx64"\n",
    2.18 +                msr_content);
    2.19      regs->eax = msr_content & 0xffffffff;
    2.20      regs->edx = msr_content >> 32;
    2.21      return 1;
    2.22 @@ -216,8 +217,9 @@ static inline int long_mode_do_msr_write
    2.23      struct vmx_msr_state * host_state =
    2.24          &percpu_msr[smp_processor_id()];
    2.25  
    2.26 -    HVM_DBG_LOG(DBG_LEVEL_1, " mode_do_msr_write msr %lx msr_content %lx\n",
    2.27 -                regs->ecx, msr_content);
    2.28 +    HVM_DBG_LOG(DBG_LEVEL_1, " mode_do_msr_write msr %lx "
    2.29 +                "msr_content %"PRIx64"\n",
    2.30 +                (unsigned long)regs->ecx, msr_content);
    2.31  
    2.32      switch (regs->ecx){
    2.33      case MSR_EFER: