ia64/xen-unstable

changeset 5811:738ba414ce80

Add xen-shared-info offset generation
Signed-off-by: Eddie Dong <eddie.dong@intel.com>
Signed-off-by: Kevin Tien <kevin.tien@intel.com>
Signed-off-by: Fred Yang <fred.yang@intel.com>
author djm@kirby.fc.hp.com
date Wed Jul 27 12:07:07 2005 -0700 (2005-07-27)
parents 0cc05e9a3482
children db8a7f39df93
files xen/arch/ia64/Makefile xen/arch/ia64/asm-xsi-offsets.c
line diff
     1.1 --- a/xen/arch/ia64/Makefile	Mon Jul 18 17:44:14 2005 -0700
     1.2 +++ b/xen/arch/ia64/Makefile	Wed Jul 27 12:07:07 2005 -0700
     1.3 @@ -34,8 +34,28 @@ default: $(OBJS) head.o ia64lib.o xen.ld
     1.4  		 > $(BASEDIR)/System.map
     1.5  
     1.6  
     1.7 -asm-offsets.s: asm-offsets.c $(BASEDIR)/include/asm-ia64/.offsets.h.stamp
     1.8 +asm-offsets.s: asm-offsets.c $(BASEDIR)/include/asm-ia64/.offsets.h.stamp asm-xsi-offsets.h
     1.9 +	$(CC) $(CFLAGS) -S -o $@ $<
    1.10 +
    1.11 +asm-xsi-offsets.s: asm-xsi-offsets.c 
    1.12  	$(CC) $(CFLAGS) -S -o $@ $<
    1.13 +	
    1.14 +asm-xsi-offsets.h: asm-xsi-offsets.s
    1.15 +	@(set -e; \
    1.16 +	  echo "/*"; \
    1.17 +	  echo " * DO NOT MODIFY."; \
    1.18 +	  echo " *"; \
    1.19 +	  echo " * This file was auto-generated from $<"; \
    1.20 +	  echo " *"; \
    1.21 +	  echo " */"; \
    1.22 +	  echo ""; \
    1.23 +	  echo "#ifndef __ASM_XSI_OFFSETS_H__"; \
    1.24 +	  echo "#define __ASM_XSI_OFFSETS_H__"; \
    1.25 +	  echo ""; \
    1.26 +	  sed -ne "/^->/{s:^->\([^ ]*\) [\$$#]*\([^ ]*\) \(.*\):#define \1 \2 /* \3 */:; s:->::; p;}"; \
    1.27 +	  echo ""; \
    1.28 +	  echo "#endif") <$< >$@
    1.29 +	  mv $@ $(BASEDIR)/include/asm
    1.30  
    1.31  $(BASEDIR)/include/asm-ia64/.offsets.h.stamp:
    1.32  # Need such symbol link to make linux headers available
    1.33 @@ -60,6 +80,7 @@ ia64lib.o:
    1.34  
    1.35  clean:
    1.36  	rm -f *.o *~ core  xen.lds.s $(BASEDIR)/include/asm-ia64/.offsets.h.stamp asm-offsets.s
    1.37 +	rm -f asm-xsi-offsets.s 
    1.38  	rm -f lib/*.o
    1.39  
    1.40  # setup.o contains bits of compile.h so it must be blown away
    1.41 @@ -68,4 +89,3 @@ delete-unfresh-files:
    1.42  #	rm -f setup.o
    1.43  
    1.44  .PHONY: default clean delete-unfresh-files
    1.45 -
     2.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     2.2 +++ b/xen/arch/ia64/asm-xsi-offsets.c	Wed Jul 27 12:07:07 2005 -0700
     2.3 @@ -0,0 +1,114 @@
     2.4 +/* -*-  Mode:C; c-basic-offset:4; tab-width:4; indent-tabs-mode:nil -*- */
     2.5 +/*
     2.6 + * asm-xsi-offsets.c_
     2.7 + * Copyright (c) 2005, Intel Corporation.
     2.8 + *      Kun Tian (Kevin Tian) <kevin.tian@intel.com>
     2.9 + *      Eddie Dong  <eddie.dong@intel.com>
    2.10 + *      Fred Yang <fred.yang@intel.com>
    2.11 + *
    2.12 + * This program is free software; you can redistribute it and/or modify it
    2.13 + * under the terms and conditions of the GNU General Public License,
    2.14 + * version 2, as published by the Free Software Foundation.
    2.15 + *
    2.16 + * This program is distributed in the hope it will be useful, but WITHOUT
    2.17 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
    2.18 + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
    2.19 + * more details.
    2.20 + *
    2.21 + * You should have received a copy of the GNU General Public License along with
    2.22 + * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
    2.23 + * Place - Suite 330, Boston, MA 02111-1307 USA.
    2.24 + *
    2.25 + */
    2.26 +
    2.27 +/*
    2.28 + * Generate definitions needed by assembly language modules.
    2.29 + * This code generates raw asm output which is post-processed
    2.30 + * to extract and format the required data.
    2.31 + */
    2.32 +
    2.33 +#include <xen/config.h>
    2.34 +#include <xen/sched.h>
    2.35 +#include <asm/processor.h>
    2.36 +#include <asm/ptrace.h>
    2.37 +#include <public/xen.h>
    2.38 +#ifdef CONFIG_VTI
    2.39 +#include <asm/tlb.h>
    2.40 +#include <asm/regs.h>
    2.41 +#endif // CONFIG_VTI
    2.42 +
    2.43 +#define task_struct vcpu
    2.44 +
    2.45 +#define DEFINE(sym, val) \
    2.46 +        asm volatile("\n->" #sym " %0 " #val : : "i" (val))
    2.47 +
    2.48 +#define BLANK() asm volatile("\n->" : : )
    2.49 +
    2.50 +#define OFFSET(_sym, _str, _mem) \
    2.51 +    DEFINE(_sym, offsetof(_str, _mem));
    2.52 +
    2.53 +#ifndef CONFIG_VTI
    2.54 +#define SHARED_ARCHINFO_ADDR SHAREDINFO_ADDR
    2.55 +#endif
    2.56 +
    2.57 +void foo(void)
    2.58 +{
    2.59 +
    2.60 +	DEFINE(XSI_BASE, SHARED_ARCHINFO_ADDR);
    2.61 +
    2.62 +	DEFINE(XSI_PSR_I_OFS, offsetof(arch_vcpu_info_t, interrupt_delivery_enabled));
    2.63 +	DEFINE(XSI_PSR_I, (SHARED_ARCHINFO_ADDR+offsetof(arch_vcpu_info_t, interrupt_delivery_enabled)));
    2.64 +	DEFINE(XSI_IPSR, (SHARED_ARCHINFO_ADDR+offsetof(arch_vcpu_info_t, ipsr)));
    2.65 +	DEFINE(XSI_IPSR_OFS, offsetof(arch_vcpu_info_t, ipsr));
    2.66 +	DEFINE(XSI_IIP_OFS, offsetof(arch_vcpu_info_t, iip));
    2.67 +	DEFINE(XSI_IIP, (SHARED_ARCHINFO_ADDR+offsetof(arch_vcpu_info_t, iip)));
    2.68 +	DEFINE(XSI_IFS_OFS, offsetof(arch_vcpu_info_t, ifs));
    2.69 +	DEFINE(XSI_IFS, (SHARED_ARCHINFO_ADDR+offsetof(arch_vcpu_info_t, ifs)));
    2.70 +	DEFINE(XSI_PRECOVER_IFS_OFS, offsetof(arch_vcpu_info_t, precover_ifs));
    2.71 +	DEFINE(XSI_PRECOVER_IFS, (SHARED_ARCHINFO_ADDR+offsetof(arch_vcpu_info_t, precover_ifs)));
    2.72 +	DEFINE(XSI_ISR_OFS, offsetof(arch_vcpu_info_t, isr));
    2.73 +	DEFINE(XSI_ISR, (SHARED_ARCHINFO_ADDR+offsetof(arch_vcpu_info_t, isr)));
    2.74 +	DEFINE(XSI_IFA_OFS, offsetof(arch_vcpu_info_t, ifa));
    2.75 +	DEFINE(XSI_IFA, (SHARED_ARCHINFO_ADDR+offsetof(arch_vcpu_info_t, ifa)));
    2.76 +	DEFINE(XSI_IIPA_OFS, offsetof(arch_vcpu_info_t, iipa));
    2.77 +	DEFINE(XSI_IIPA, (SHARED_ARCHINFO_ADDR+offsetof(arch_vcpu_info_t, iipa)));
    2.78 +	DEFINE(XSI_IIM_OFS, offsetof(arch_vcpu_info_t, iim));
    2.79 +	DEFINE(XSI_IIM, (SHARED_ARCHINFO_ADDR+offsetof(arch_vcpu_info_t, iim)));
    2.80 +	DEFINE(XSI_TPR_OFS, offsetof(arch_vcpu_info_t, tpr));
    2.81 +	DEFINE(XSI_TPR, (SHARED_ARCHINFO_ADDR+offsetof(arch_vcpu_info_t, tpr)));
    2.82 +	DEFINE(XSI_IHA_OFS, offsetof(arch_vcpu_info_t, iha));
    2.83 +	DEFINE(XSI_IHA, (SHARED_ARCHINFO_ADDR+offsetof(arch_vcpu_info_t, iha)));
    2.84 +	DEFINE(XSI_ITIR_OFS, offsetof(arch_vcpu_info_t, itir));
    2.85 +	DEFINE(XSI_ITIR, (SHARED_ARCHINFO_ADDR+offsetof(arch_vcpu_info_t, itir)));
    2.86 +	DEFINE(XSI_ITV_OFS, offsetof(arch_vcpu_info_t, itv));
    2.87 +	DEFINE(XSI_ITV, (SHARED_ARCHINFO_ADDR+offsetof(arch_vcpu_info_t, itv)));
    2.88 +	DEFINE(XSI_PTA_OFS, offsetof(arch_vcpu_info_t, pta));
    2.89 +	DEFINE(XSI_PTA, (SHARED_ARCHINFO_ADDR+offsetof(arch_vcpu_info_t, pta)));
    2.90 +	DEFINE(XSI_PSR_IC_OFS, offsetof(arch_vcpu_info_t, interrupt_collection_enabled));
    2.91 +	DEFINE(XSI_PSR_IC, (SHARED_ARCHINFO_ADDR+offsetof(arch_vcpu_info_t, interrupt_collection_enabled)));
    2.92 +	DEFINE(XSI_PEND_OFS, offsetof(arch_vcpu_info_t, pending_interruption));
    2.93 +	DEFINE(XSI_PEND, (SHARED_ARCHINFO_ADDR+offsetof(arch_vcpu_info_t, pending_interruption)));
    2.94 +	DEFINE(XSI_INCOMPL_REGFR_OFS, offsetof(arch_vcpu_info_t, incomplete_regframe));
    2.95 +	DEFINE(XSI_INCOMPL_REGFR, (SHARED_ARCHINFO_ADDR+offsetof(arch_vcpu_info_t, incomplete_regframe)));
    2.96 +	DEFINE(XSI_DELIV_MASK0_OFS, offsetof(arch_vcpu_info_t, delivery_mask[0]));
    2.97 +	DEFINE(XSI_DELIV_MASK0, (SHARED_ARCHINFO_ADDR+offsetof(arch_vcpu_info_t, delivery_mask[0])));
    2.98 +	DEFINE(XSI_METAPHYS_OFS, offsetof(arch_vcpu_info_t, metaphysical_mode));
    2.99 +	DEFINE(XSI_METAPHYS, (SHARED_ARCHINFO_ADDR+offsetof(arch_vcpu_info_t, metaphysical_mode)));
   2.100 +
   2.101 +	DEFINE(XSI_BANKNUM_OFS, offsetof(arch_vcpu_info_t, banknum));
   2.102 +	DEFINE(XSI_BANKNUM, (SHARED_ARCHINFO_ADDR+offsetof(arch_vcpu_info_t, banknum)));
   2.103 +
   2.104 +	DEFINE(XSI_BANK0_R16_OFS, offsetof(arch_vcpu_info_t, bank0_regs[0]));
   2.105 +	DEFINE(XSI_BANK0_R16, (SHARED_ARCHINFO_ADDR+offsetof(arch_vcpu_info_t, bank0_regs[0])));
   2.106 +	DEFINE(XSI_BANK1_R16_OFS, offsetof(arch_vcpu_info_t, bank1_regs[0]));
   2.107 +	DEFINE(XSI_BANK1_R16, (SHARED_ARCHINFO_ADDR+offsetof(arch_vcpu_info_t, bank1_regs[0])));
   2.108 +	DEFINE(XSI_RR0_OFS, offsetof(arch_vcpu_info_t, rrs[0]));
   2.109 +	DEFINE(XSI_RR0, (SHARED_ARCHINFO_ADDR+offsetof(arch_vcpu_info_t, rrs[0])));
   2.110 +	DEFINE(XSI_KR0_OFS, offsetof(arch_vcpu_info_t, krs[0]));
   2.111 +	DEFINE(XSI_KR0, (SHARED_ARCHINFO_ADDR+offsetof(arch_vcpu_info_t, krs[0])));
   2.112 +	DEFINE(XSI_PKR0_OFS, offsetof(arch_vcpu_info_t, pkrs[0]));
   2.113 +	DEFINE(XSI_PKR0, (SHARED_ARCHINFO_ADDR+offsetof(arch_vcpu_info_t, pkrs[0])));
   2.114 +	DEFINE(XSI_TMP0_OFS, offsetof(arch_vcpu_info_t, tmp[0]));
   2.115 +	DEFINE(XSI_TMP0, (SHARED_ARCHINFO_ADDR+offsetof(arch_vcpu_info_t, tmp[0])));
   2.116 +	
   2.117 +}