ia64/xen-unstable

changeset 19033:73770182aee4

AMD IOMMU: Reset tail and head pointer of cmd buffer and event log

Reset the tail and the head pointers of command buffer and event log
to zero in case that iommu does not reset them after the base
addresses of those buffers are updated.

Signed-off-by: Wei Wang <wei.wang2@amd.com>
author Keir Fraser <keir.fraser@citrix.com>
date Tue Jan 13 15:16:46 2009 +0000 (2009-01-13)
parents 1c6642adaeb2
children d8267d3d2665
files xen/drivers/passthrough/amd/iommu_init.c
line diff
     1.1 --- a/xen/drivers/passthrough/amd/iommu_init.c	Tue Jan 13 15:16:07 2009 +0000
     1.2 +++ b/xen/drivers/passthrough/amd/iommu_init.c	Tue Jan 13 15:16:46 2009 +0000
     1.3 @@ -195,6 +195,10 @@ static void __init set_iommu_command_buf
     1.4                           IOMMU_CONTROL_COMMAND_BUFFER_ENABLE_MASK,
     1.5                           IOMMU_CONTROL_COMMAND_BUFFER_ENABLE_SHIFT, &entry);
     1.6      writel(entry, iommu->mmio_base+IOMMU_CONTROL_MMIO_OFFSET);
     1.7 +
     1.8 +    /*reset head and tail pointer */
     1.9 +    writel(0x0, iommu->mmio_base + IOMMU_CMD_BUFFER_HEAD_OFFSET);
    1.10 +    writel(0x0, iommu->mmio_base + IOMMU_CMD_BUFFER_TAIL_OFFSET);
    1.11  }
    1.12  
    1.13  static void __init register_iommu_exclusion_range(struct amd_iommu *iommu)
    1.14 @@ -259,6 +263,10 @@ static void __init set_iommu_event_log_c
    1.15                           IOMMU_CONTROL_COMP_WAIT_INT_MASK,
    1.16                           IOMMU_CONTROL_COMP_WAIT_INT_SHIFT, &entry);
    1.17      writel(entry, iommu->mmio_base+IOMMU_CONTROL_MMIO_OFFSET);
    1.18 +
    1.19 +    /*reset head and tail pointer */
    1.20 +    writel(0x0, iommu->mmio_base + IOMMU_EVENT_LOG_HEAD_OFFSET);
    1.21 +    writel(0x0, iommu->mmio_base + IOMMU_EVENT_LOG_TAIL_OFFSET);
    1.22  }
    1.23  
    1.24  static int amd_iommu_read_event_log(struct amd_iommu *iommu, u32 event[])