ia64/xen-unstable

changeset 5367:70de9cd5f6b6

bitkeeper revision 1.1691.1.2 (42a6ae59pOLKl7oBFyH6Ukzy7yg3EA)

read/write control-reg macros are now same in xenlinux as native linux.
Signed-oiff-by: Keir Fraser <keir@xensource.com>
author kaf24@firebug.cl.cam.ac.uk
date Wed Jun 08 08:37:45 2005 +0000 (2005-06-08)
parents 13c7fd8311ba
children da4da36bfae8
files linux-2.6.11-xen-sparse/include/asm-xen/asm-i386/system.h linux-2.6.11-xen-sparse/include/asm-xen/asm-x86_64/system.h
line diff
     1.1 --- a/linux-2.6.11-xen-sparse/include/asm-xen/asm-i386/system.h	Wed Jun 08 08:34:43 2005 +0000
     1.2 +++ b/linux-2.6.11-xen-sparse/include/asm-xen/asm-i386/system.h	Wed Jun 08 08:37:45 2005 +0000
     1.3 @@ -107,14 +107,25 @@ static inline unsigned long _get_base(ch
     1.4   * Clear and set 'TS' bit respectively
     1.5   */
     1.6  #define clts() (HYPERVISOR_fpu_taskswitch(0))
     1.7 -#define read_cr0() \
     1.8 -	BUG();
     1.9 +#define read_cr0() ({ \
    1.10 +	unsigned int __dummy; \
    1.11 +	__asm__( \
    1.12 +		"movl %%cr0,%0\n\t" \
    1.13 +		:"=r" (__dummy)); \
    1.14 +	__dummy; \
    1.15 +})
    1.16  #define write_cr0(x) \
    1.17 -	BUG();
    1.18 -#define read_cr4() \
    1.19 -	BUG();
    1.20 +	__asm__("movl %0,%%cr0": :"r" (x));
    1.21 +
    1.22 +#define read_cr4() ({ \
    1.23 +	unsigned int __dummy; \
    1.24 +	__asm__( \
    1.25 +		"movl %%cr4,%0\n\t" \
    1.26 +		:"=r" (__dummy)); \
    1.27 +	__dummy; \
    1.28 +})
    1.29  #define write_cr4(x) \
    1.30 -	BUG();
    1.31 +	__asm__("movl %0,%%cr4": :"r" (x));
    1.32  #define stts() (HYPERVISOR_fpu_taskswitch(1))
    1.33  
    1.34  #endif	/* __KERNEL__ */
     2.1 --- a/linux-2.6.11-xen-sparse/include/asm-xen/asm-x86_64/system.h	Wed Jun 08 08:34:43 2005 +0000
     2.2 +++ b/linux-2.6.11-xen-sparse/include/asm-xen/asm-x86_64/system.h	Wed Jun 08 08:37:45 2005 +0000
     2.3 @@ -145,30 +145,38 @@ struct alt_instr {
     2.4   * Clear and set 'TS' bit respectively
     2.5   */
     2.6  #define clts() (HYPERVISOR_fpu_taskswitch(0))
     2.7 +
     2.8  static inline unsigned long read_cr0(void)
     2.9  { 
    2.10 -	return 0;
    2.11 +	unsigned long cr0;
    2.12 +	asm volatile("movq %%cr0,%0" : "=r" (cr0));
    2.13 +	return cr0;
    2.14  } 
    2.15  
    2.16  static inline void write_cr0(unsigned long val) 
    2.17  { 
    2.18 -	/* Ignore, Linux tries to clear TS and EM */
    2.19 +	asm volatile("movq %0,%%cr0" :: "r" (val));
    2.20  } 
    2.21  
    2.22  static inline unsigned long read_cr3(void)
    2.23  { 
    2.24 -        BUG();
    2.25 +	unsigned long cr3;
    2.26 +	asm("movq %%cr3,%0" : "=r" (cr3));
    2.27 +	return cr3;
    2.28  } 
    2.29  
    2.30  static inline unsigned long read_cr4(void)
    2.31  { 
    2.32 -        BUG();
    2.33 +	unsigned long cr4;
    2.34 +	asm("movq %%cr4,%0" : "=r" (cr4));
    2.35 +	return cr4;
    2.36  } 
    2.37  
    2.38  static inline void write_cr4(unsigned long val)
    2.39  { 
    2.40 -        BUG();
    2.41 +	asm volatile("movq %0,%%cr4" :: "r" (val));
    2.42  } 
    2.43 +
    2.44  #define stts() (HYPERVISOR_fpu_taskswitch(1))
    2.45  
    2.46  #define wbinvd() \