1.1 --- a/xen/arch/x86/memory.c	Tue Sep 07 16:53:50 2004 +0000
     1.2 +++ b/xen/arch/x86/memory.c	Tue Sep 07 16:57:34 2004 +0000
     1.3 @@ -1488,9 +1488,6 @@ ptwr_info_t ptwr_info[NR_CPUS] =
     1.4        {
     1.5            .disconnected = ENTRIES_PER_L2_PAGETABLE,
     1.6            .writable_idx = 0,
     1.7 -#ifdef PTWR_TRACK_DOMAIN
     1.8 -          .domain = 0,
     1.9 -#endif
    1.10        }
    1.11      };
    1.12  
    1.13 @@ -1513,11 +1510,6 @@ void ptwr_reconnect_disconnected(unsigne
    1.14      unsigned long *writable_pte = (unsigned long *)&linear_pg_table
    1.15          [ptwr_info[cpu].writable_l1>>PAGE_SHIFT];
    1.16  
    1.17 -#ifdef PTWR_TRACK_DOMAIN
    1.18 -    if (ptwr_domain[cpu] != current->domain)
    1.19 -        printk("ptwr_reconnect_disconnected domain mismatch %d != %d\n",
    1.20 -               ptwr_domain[cpu], current->domain);
    1.21 -#endif
    1.22      PTWR_PRINTK(("[A] page fault in disconn space: addr %08lx space %08lx\n",
    1.23                   addr, ptwr_info[cpu].disconnected << L2_PAGETABLE_SHIFT));
    1.24      pl2e = &linear_l2_table[ptwr_info[cpu].disconnected];
    1.25 @@ -1594,20 +1586,6 @@ void ptwr_flush_inactive(void)
    1.26      int cpu = smp_processor_id();
    1.27      int i, idx;
    1.28  
    1.29 -#ifdef PTWR_TRACK_DOMAIN
    1.30 -    if (ptwr_info[cpu].domain != current->domain)
    1.31 -        printk("ptwr_flush_inactive domain mismatch %d != %d\n",
    1.32 -               ptwr_info[cpu].domain, current->domain);
    1.33 -#endif
    1.34 -#if 0
    1.35 -    {
    1.36 -        static int maxidx = 0;
    1.37 -        if (ptwr_info[cpu].writable_idx > maxidx) {
    1.38 -            maxidx = ptwr_info[cpu].writable_idx;
    1.39 -            printk("maxidx on cpu %d now %d\n", cpu, maxidx);
    1.40 -        }
    1.41 -    }
    1.42 -#endif
    1.43      for (idx = 0; idx < ptwr_info[cpu].writable_idx; idx++) {
    1.44          unsigned long *writable_pte = (unsigned long *)&linear_pg_table
    1.45              [ptwr_info[cpu].writables[idx]>>PAGE_SHIFT];
    1.46 @@ -1677,11 +1655,6 @@ int ptwr_do_page_fault(unsigned long add
    1.47          page = &frame_table[pfn];
    1.48          if ( (page->u.inuse.type_info & PGT_type_mask) == PGT_l1_page_table )
    1.49          {
    1.50 -#ifdef PTWR_TRACK_DOMAIN
    1.51 -            if ( ptwr_info[cpu].domain != current->domain )
    1.52 -                printk("ptwr_do_page_fault domain mismatch %d != %d\n",
    1.53 -                       ptwr_info[cpu].domain, current->domain);
    1.54 -#endif
    1.55              pl2e = &linear_l2_table[(page->u.inuse.type_info &
    1.56                                       PGT_va_mask) >> PGT_va_shift];
    1.57              PTWR_PRINTK(("page_fault on l1 pt at va %08lx, pt for %08x, "

     2.1 --- a/xen/include/asm-x86/mm.h	Tue Sep 07 16:53:50 2004 +0000
     2.2 +++ b/xen/include/asm-x86/mm.h	Tue Sep 07 16:57:34 2004 +0000
     2.3 @@ -378,9 +378,6 @@ typedef struct {
     2.4      unsigned long writables[PTWR_NR_WRITABLES];
     2.5      int writable_idx;
     2.6      l1_pgentry_t writable_page[PTWR_NR_WRITABLES][ENTRIES_PER_L1_PAGETABLE];
     2.7 -#ifdef PTWR_TRACK_DOMAIN
     2.8 -    domid_t domain;
     2.9 -#endif
    2.10  } __cacheline_aligned ptwr_info_t;
    2.11  
    2.12  extern ptwr_info_t ptwr_info[];