ia64/xen-unstable

changeset 16200:6a9b1626c82a

Add definitions for machine check MSRs introduced in AMD Family 0x10 (Barcelona).
Signed-off-by: Christoph Egger <Christoph.Egger@amd.com>
author Keir Fraser <keir@xensource.com>
date Tue Oct 23 16:12:14 2007 +0100 (2007-10-23)
parents 47ad9f54e74b
children 2ad8550033cb
files xen/include/asm-x86/msr-index.h
line diff
     1.1 --- a/xen/include/asm-x86/msr-index.h	Tue Oct 23 14:42:50 2007 +0100
     1.2 +++ b/xen/include/asm-x86/msr-index.h	Tue Oct 23 16:12:14 2007 +0100
     1.3 @@ -166,13 +166,18 @@
     1.4  #define MSR_K7_FID_VID_CTL		0xc0010041
     1.5  #define MSR_K7_FID_VID_STATUS		0xc0010042
     1.6  #define MSR_K8_ENABLE_C1E		0xc0010055
     1.7 -#define MSR_K8_VM_CR			0xC0010114
     1.8 -#define MSR_K8_VM_HSAVE_PA		0xC0010117
     1.9 +#define MSR_K8_VM_CR			0xc0010114
    1.10 +#define MSR_K8_VM_HSAVE_PA		0xc0010117
    1.11  
    1.12  /* MSR_K8_VM_CR bits: */
    1.13  #define _K8_VMCR_SVME_DISABLE		4
    1.14  #define K8_VMCR_SVME_DISABLE		(1 << _K8_VMCR_SVME_DISABLE)
    1.15  
    1.16 +/* AMD Family10h machine check MSRs */
    1.17 +#define MSR_F10_MC4_MISC1		0xc0000408
    1.18 +#define MSR_F10_MC4_MISC2		0xc0000409
    1.19 +#define MSR_F10_MC4_MISC3		0xc000040A
    1.20 +
    1.21  /* K6 MSRs */
    1.22  #define MSR_K6_EFER			0xc0000080
    1.23  #define MSR_K6_STAR			0xc0000081