1.1 --- a/xen/arch/x86/pci.c	Thu Oct 09 11:17:51 2008 +0100
     1.2 +++ b/xen/arch/x86/pci.c	Thu Oct 09 12:47:31 2008 +0100
     1.3 @@ -1,12 +1,9 @@
     1.4  /******************************************************************************
     1.5   * pci.c
     1.6   * 
     1.7 - * PCI access functions.
     1.8 + * Architecture-dependent PCI access functions.
     1.9   */
    1.10  
    1.11 -#include <xen/config.h>
    1.12 -#include <xen/pci.h>
    1.13 -#include <xen/pci_regs.h>
    1.14  #include <xen/spinlock.h>
    1.15  #include <asm/io.h>
    1.16  
    1.17 @@ -118,59 +115,3 @@ void pci_conf_write32(
    1.18      pci_conf_write(PCI_CONF_ADDRESS(bus, dev, func, reg), 0, 4, data);
    1.19  }
    1.20  
    1.21 -int pci_find_cap_offset(u8 bus, u8 dev, u8 func, u8 cap)
    1.22 -{
    1.23 -    u8 id;
    1.24 -    int max_cap = 48;
    1.25 -    u8 pos = PCI_CAPABILITY_LIST;
    1.26 -    u16 status;
    1.27 -
    1.28 -    status = pci_conf_read16(bus, dev, func, PCI_STATUS);
    1.29 -    if ( (status & PCI_STATUS_CAP_LIST) == 0 )
    1.30 -        return 0;
    1.31 -
    1.32 -    while ( max_cap-- )
    1.33 -    {
    1.34 -        pos = pci_conf_read8(bus, dev, func, pos);
    1.35 -        if ( pos < 0x40 )
    1.36 -            break;
    1.37 -
    1.38 -        pos &= ~3;
    1.39 -        id = pci_conf_read8(bus, dev, func, pos + PCI_CAP_LIST_ID);
    1.40 -
    1.41 -        if ( id == 0xff )
    1.42 -            break;
    1.43 -        else if ( id == cap )
    1.44 -            return pos;
    1.45 -
    1.46 -        pos += PCI_CAP_LIST_NEXT;
    1.47 -    }
    1.48 -
    1.49 -    return 0;
    1.50 -}
    1.51 -
    1.52 -int pci_find_next_cap(u8 bus, unsigned int devfn, u8 pos, int cap)
    1.53 -{
    1.54 -    u8 id;
    1.55 -    int ttl = 48;
    1.56 -
    1.57 -    while ( ttl-- )
    1.58 -    {
    1.59 -        pos = pci_conf_read8(bus, PCI_SLOT(devfn), PCI_FUNC(devfn), pos);
    1.60 -        if ( pos < 0x40 )
    1.61 -            break;
    1.62 -
    1.63 -        pos &= ~3;
    1.64 -        id = pci_conf_read8(bus, PCI_SLOT(devfn), PCI_FUNC(devfn),
    1.65 -                            pos + PCI_CAP_LIST_ID);
    1.66 -
    1.67 -        if ( id == 0xff )
    1.68 -            break;
    1.69 -        if ( id == cap )
    1.70 -            return pos;
    1.71 -
    1.72 -        pos += PCI_CAP_LIST_NEXT;
    1.73 -    }
    1.74 -    return 0;
    1.75 -}
    1.76 -

     2.1 --- a/xen/drivers/Makefile	Thu Oct 09 11:17:51 2008 +0100
     2.2 +++ b/xen/drivers/Makefile	Thu Oct 09 12:47:31 2008 +0100
     2.3 @@ -1,5 +1,6 @@
     2.4  subdir-y += char
     2.5  subdir-y += cpufreq
     2.6 +subdir-y += pci
     2.7  subdir-$(x86) += passthrough
     2.8  subdir-$(HAS_ACPI) += acpi
     2.9  subdir-$(HAS_VGA) += video

     3.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     3.2 +++ b/xen/drivers/pci/Makefile	Thu Oct 09 12:47:31 2008 +0100
     3.3 @@ -0,0 +1,1 @@
     3.4 +obj-y += pci.o

     4.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     4.2 +++ b/xen/drivers/pci/pci.c	Thu Oct 09 12:47:31 2008 +0100
     4.3 @@ -0,0 +1,64 @@
     4.4 +/******************************************************************************
     4.5 + * pci.c
     4.6 + *
     4.7 + * Architecture-independent PCI access functions.
     4.8 + */
     4.9 +
    4.10 +#include <xen/pci.h>
    4.11 +#include <xen/pci_regs.h>
    4.12 +
    4.13 +int pci_find_cap_offset(u8 bus, u8 dev, u8 func, u8 cap)
    4.14 +{
    4.15 +    u8 id;
    4.16 +    int max_cap = 48;
    4.17 +    u8 pos = PCI_CAPABILITY_LIST;
    4.18 +    u16 status;
    4.19 +
    4.20 +    status = pci_conf_read16(bus, dev, func, PCI_STATUS);
    4.21 +    if ( (status & PCI_STATUS_CAP_LIST) == 0 )
    4.22 +        return 0;
    4.23 +
    4.24 +    while ( max_cap-- )
    4.25 +    {
    4.26 +        pos = pci_conf_read8(bus, dev, func, pos);
    4.27 +        if ( pos < 0x40 )
    4.28 +            break;
    4.29 +
    4.30 +        pos &= ~3;
    4.31 +        id = pci_conf_read8(bus, dev, func, pos + PCI_CAP_LIST_ID);
    4.32 +
    4.33 +        if ( id == 0xff )
    4.34 +            break;
    4.35 +        else if ( id == cap )
    4.36 +            return pos;
    4.37 +
    4.38 +        pos += PCI_CAP_LIST_NEXT;
    4.39 +    }
    4.40 +
    4.41 +    return 0;
    4.42 +}
    4.43 +
    4.44 +int pci_find_next_cap(u8 bus, unsigned int devfn, u8 pos, int cap)
    4.45 +{
    4.46 +    u8 id;
    4.47 +    int ttl = 48;
    4.48 +
    4.49 +    while ( ttl-- )
    4.50 +    {
    4.51 +        pos = pci_conf_read8(bus, PCI_SLOT(devfn), PCI_FUNC(devfn), pos);
    4.52 +        if ( pos < 0x40 )
    4.53 +            break;
    4.54 +
    4.55 +        pos &= ~3;
    4.56 +        id = pci_conf_read8(bus, PCI_SLOT(devfn), PCI_FUNC(devfn),
    4.57 +                            pos + PCI_CAP_LIST_ID);
    4.58 +
    4.59 +        if ( id == 0xff )
    4.60 +            break;
    4.61 +        if ( id == cap )
    4.62 +            return pos;
    4.63 +
    4.64 +        pos += PCI_CAP_LIST_NEXT;
    4.65 +    }
    4.66 +    return 0;
    4.67 +}