ia64/xen-unstable

changeset 131:643a74d7c497

bitkeeper revision 1.22.2.8 (3e455b3fL8bm_143DyhEki8VM_GcoQ)

apic.c:
Removed possible early APIC accesses (before a mapping exists).
author kaf24@labyrinth.cl.cam.ac.uk
date Sat Feb 08 19:32:15 2003 +0000 (2003-02-08)
parents dc2f8bc0b538
children c6a174401978
files xen-2.4.16/arch/i386/apic.c
line diff
     1.1 --- a/xen-2.4.16/arch/i386/apic.c	Sat Feb 08 17:39:26 2003 +0000
     1.2 +++ b/xen-2.4.16/arch/i386/apic.c	Sat Feb 08 19:32:15 2003 +0000
     1.3 @@ -204,7 +204,7 @@ extern void __error_in_apic_c (void);
     1.4   */
     1.5  void __init init_bsp_APIC(void)
     1.6  {
     1.7 -    unsigned long value, ver;
     1.8 +    unsigned long l, h;
     1.9  
    1.10      /*
    1.11       * Don't do the setup now if we have a SMP BIOS as the
    1.12 @@ -213,32 +213,22 @@ void __init init_bsp_APIC(void)
    1.13      if (smp_found_config || !cpu_has_apic)
    1.14          return;
    1.15  
    1.16 -    value = apic_read(APIC_LVR);
    1.17 -    ver = GET_APIC_VERSION(value);
    1.18 -
    1.19      /*
    1.20 -     * Do not trust the local APIC being empty at bootup.
    1.21 -     */
    1.22 -    clear_local_APIC();
    1.23 -
    1.24 -    /*
    1.25 -     * Enable APIC.
    1.26 +     * Our best bet here is to disable the APIC. This should be safe, as it
    1.27 +     * ought to be a uniprocessor box (we tested for an SMP configuration
    1.28 +     * already), so we shouldn't be getting interrupt messages in serial-bus
    1.29 +     * form from an IO APIC. The APIC will be enabled again later, so don't
    1.30 +     * worry :-) Doing the easy thing here should make boot-time more reliable.
    1.31       */
    1.32 -    value = apic_read(APIC_SPIV);
    1.33 -    value &= ~APIC_VECTOR_MASK;
    1.34 -    value |= APIC_SPIV_APIC_ENABLED;
    1.35 -    value |= APIC_SPIV_FOCUS_DISABLED;
    1.36 -    value |= SPURIOUS_APIC_VECTOR;
    1.37 -    apic_write_around(APIC_SPIV, value);
    1.38 +    printk("Disabling local APIC during early boot sequence...\n");
    1.39 +    rdmsr(MSR_IA32_APICBASE, l, h);
    1.40 +    l &= ~MSR_IA32_APICBASE_BASE;
    1.41 +    wrmsr(MSR_IA32_APICBASE, l, h);
    1.42  
    1.43 -    /*
    1.44 -     * Set up the virtual wire mode.
    1.45 -     */
    1.46 -    apic_write_around(APIC_LVT0, APIC_DM_EXTINT);
    1.47 -    value = APIC_DM_NMI;
    1.48 -    if (!APIC_INTEGRATED(ver))		/* 82489DX */
    1.49 -        value |= APIC_LVT_LEVEL_TRIGGER;
    1.50 -    apic_write_around(APIC_LVT1, value);
    1.51 +    /* We should now be in non-APIC mode. */
    1.52 +    l = cpuid_edx(1);
    1.53 +    if ( test_bit(X86_FEATURE_APIC, &l) ) BUG();
    1.54 +    clear_bit(X86_FEATURE_APIC, &boot_cpu_data.x86_capability);
    1.55  }
    1.56  
    1.57  void __init setup_local_APIC (void)
    1.58 @@ -401,10 +391,8 @@ static int __init detect_init_APIC (void
    1.59              wrmsr(MSR_IA32_APICBASE, l, h);
    1.60          }
    1.61      }
    1.62 -    /*
    1.63 -     * The APIC feature bit should now be enabled
    1.64 -     * in `cpuid'
    1.65 -     */
    1.66 +
    1.67 +    /* The APIC feature bit should now be enabled in `cpuid' */
    1.68      features = cpuid_edx(1);
    1.69      if (!(features & (1 << X86_FEATURE_APIC))) {
    1.70          printk("Could not enable APIC!\n");