ia64/xen-unstable

changeset 7661:63aeaa2152d8

This patch remove the obsolete ioapic code on qemu device model side.

Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com>
author kaf24@firebug.cl.cam.ac.uk
date Mon Nov 07 16:37:58 2005 +0100 (2005-11-07)
parents 9bb7a75f120f
children 25599e222c33 188fc4838586
files
line diff
     1.1 --- a/tools/ioemu/hw/ioapic.c	Mon Nov 07 16:36:27 2005 +0100
     1.2 +++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
     1.3 @@ -1,704 +0,0 @@
     1.4 -/////////////////////////////////////////////////////////////////////////
     1.5 -//
     1.6 -//  Copyright (C) 2001  MandrakeSoft S.A.
     1.7 -//
     1.8 -//    MandrakeSoft S.A.
     1.9 -//    43, rue d'Aboukir
    1.10 -//    75002 Paris - France
    1.11 -//    http://www.linux-mandrake.com/
    1.12 -//    http://www.mandrakesoft.com/
    1.13 -//
    1.14 -//  This library is free software; you can redistribute it and/or
    1.15 -//  modify it under the terms of the GNU Lesser General Public
    1.16 -//  License as published by the Free Software Foundation; either
    1.17 -//  version 2 of the License, or (at your option) any later version.
    1.18 -//
    1.19 -//  This library is distributed in the hope that it will be useful,
    1.20 -//  but WITHOUT ANY WARRANTY; without even the implied warranty of
    1.21 -//  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
    1.22 -//  Lesser General Public License for more details.
    1.23 -//
    1.24 -//  You should have received a copy of the GNU Lesser General Public
    1.25 -//  License along with this library; if not, write to the Free Software
    1.26 -//  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
    1.27 -//
    1.28 -
    1.29 -#include "vl.h"
    1.30 -#include "ioapic.h"
    1.31 -
    1.32 -#ifdef __OS
    1.33 -#undef __OS
    1.34 -#endif
    1.35 -#ifdef __i386__
    1.36 -#define __OS	"l"
    1.37 -#else
    1.38 -#define __OS "q"
    1.39 -#endif
    1.40 -#define ADDR (*(volatile long *) addr)
    1.41 -
    1.42 -#ifdef IOAPIC_DEBUG
    1.43 -#define IOAPIC_LOG(a...) fprintf(logfile, ##a)
    1.44 -#else
    1.45 -#define IOAPIC_LOG(a...)
    1.46 -#endif
    1.47 -
    1.48 -static IOAPICState *ioapic;
    1.49 -
    1.50 -#define IOAPIC_ERR(a...) fprintf(logfile, ##a)
    1.51 -static __inline__ int test_and_set_bit(long nr, volatile void * addr)
    1.52 -{
    1.53 -	long oldbit;
    1.54 -
    1.55 -	__asm__ __volatile__( 
    1.56 -		"bts"__OS" %2,%1\n\tsbb"__OS" %0,%0"
    1.57 -		:"=r" (oldbit),"=m" (ADDR)
    1.58 -		:"Ir" (nr) : "memory");
    1.59 -	return oldbit;
    1.60 -}
    1.61 -
    1.62 -static __inline__ int test_and_clear_bit(long nr, volatile void * addr)
    1.63 -{
    1.64 -	long oldbit;
    1.65 -
    1.66 -	__asm__ __volatile__( LOCK_PREFIX
    1.67 -		"btr"__OS" %2,%1\n\tsbb"__OS" %0,%0"
    1.68 -		:"=r" (oldbit),"=m" (ADDR)
    1.69 -		:"dIr" (nr) : "memory");
    1.70 -	return oldbit;
    1.71 -}
    1.72 -
    1.73 -static __inline__ void clear_bit(long nr, volatile void * addr)
    1.74 -{
    1.75 -	__asm__ __volatile__( 
    1.76 -		"btr"__OS" %1,%0"
    1.77 -		:"=m" (ADDR)
    1.78 -		:"Ir" (nr));
    1.79 -}
    1.80 -
    1.81 -static inline
    1.82 -void get_shareinfo_apic_msg(vlapic_info *share_info){
    1.83 -    while(test_and_set_bit(VL_STATE_MSG_LOCK, &share_info->vl_state)){};
    1.84 -}
    1.85 -
    1.86 -static inline
    1.87 -void put_shareinfo_apic_msg(vlapic_info *share_info){
    1.88 -    clear_bit(VL_STATE_MSG_LOCK, &share_info->vl_state);
    1.89 -}
    1.90 -static inline
    1.91 -void get_shareinfo_eoi(vlapic_info *share_info){
    1.92 -    while(test_and_set_bit(VL_STATE_EOI_LOCK, &share_info->vl_state)){};
    1.93 -}
    1.94 -
    1.95 -static inline
    1.96 -void put_shareinfo_eoi(vlapic_info *share_info){
    1.97 -    clear_bit(VL_STATE_EOI_LOCK, &share_info->vl_state);
    1.98 -}
    1.99 -
   1.100 -
   1.101 -static inline
   1.102 -void get_shareinfo_ext(vlapic_info *share_info){
   1.103 -    while(test_and_set_bit(VL_STATE_EXT_LOCK, &share_info->vl_state));
   1.104 -}
   1.105 -
   1.106 -static inline
   1.107 -void put_shareinfo_ext(vlapic_info *share_info){
   1.108 -    clear_bit(VL_STATE_EXT_LOCK, &share_info->vl_state);
   1.109 -}
   1.110 -
   1.111 -
   1.112 -static __inline__ int test_bit(int nr, uint32_t value){
   1.113 -    return value & (1 << nr);
   1.114 -}
   1.115 -
   1.116 -static void ioapic_enable(IOAPICState *s, uint8_t enable)
   1.117 -{
   1.118 -    if (!enable ^ IOAPICEnabled(s)) return;
   1.119 -    if(enable)
   1.120 -        s->flags |= IOAPIC_ENABLE_FLAG;
   1.121 -    else
   1.122 -        s->flags &= ~IOAPIC_ENABLE_FLAG;
   1.123 -}
   1.124 -
   1.125 -#ifdef IOAPIC_DEBUG
   1.126 -static void
   1.127 -ioapic_dump_redir(IOAPICState *s, uint8_t entry)
   1.128 -{
   1.129 -    if (!s)
   1.130 -        return;
   1.131 -
   1.132 -    RedirStatus redir = s->redirtbl[entry];
   1.133 -
   1.134 -    fprintf(logfile, "entry %x: "
   1.135 -      "vector %x deliver_mod %x destmode %x delivestatus %x "
   1.136 -      "polarity %x remote_irr %x trigmod %x mask %x dest_id %x\n",
   1.137 -      entry,
   1.138 -      redir.RedirForm.vector, redir.RedirForm.deliver_mode,
   1.139 -      redir.RedirForm.destmode, redir.RedirForm.delivestatus,
   1.140 -      redir.RedirForm.polarity, redir.RedirForm.remoteirr,
   1.141 -      redir.RedirForm.trigmod, redir.RedirForm.mask,
   1.142 -      redir.RedirForm.dest_id);
   1.143 -}
   1.144 -
   1.145 -static void
   1.146 -ioapic_dump_shareinfo(IOAPICState *s , int number)
   1.147 -{
   1.148 -    if (!s || !s->lapic_info[number])
   1.149 -        return;
   1.150 -    vlapic_info *m = s->lapic_info[number];
   1.151 -    IOAPIC_LOG("lapic_info %x : "
   1.152 -      "vl_lapic_id %x vl_logical_dest %x vl_dest_format %x vl_arb_id %x\n",
   1.153 -      number, m->vl_lapic_id, m->vl_logical_dest, m->vl_dest_format, m->vl_arb_id );
   1.154 -}
   1.155 -#endif
   1.156 -
   1.157 -static void
   1.158 -ioapic_save(QEMUFile* f,void* opaque)
   1.159 -{
   1.160 -    IOAPIC_ERR("no implementation for ioapic_save\n");
   1.161 -}
   1.162 -
   1.163 -static
   1.164 -int ioapic_load(QEMUFile* f,void* opaque,int version_id)
   1.165 -{
   1.166 -    IOAPIC_ERR("no implementation for ioapic_load\n");
   1.167 -    return 0;
   1.168 -}
   1.169 -
   1.170 -uint32_t
   1.171 -ioapic_mem_readb(void *opaque, target_phys_addr_t addr)
   1.172 -{
   1.173 -    IOAPIC_ERR("ioapic_mem_readb\n");
   1.174 -    return 0;
   1.175 -}
   1.176 -
   1.177 -uint32_t
   1.178 -ioapic_mem_readw(void *opaque, target_phys_addr_t addr)
   1.179 -{
   1.180 -    IOAPIC_ERR("ioapic_mem_readw\n");
   1.181 -    return 0;
   1.182 -}
   1.183 -
   1.184 -static
   1.185 -void ioapic_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
   1.186 -{
   1.187 -    IOAPIC_ERR("ioapic_mem_writeb\n");
   1.188 -}
   1.189 -
   1.190 -static
   1.191 -void ioapic_mem_writew(void *opaque, target_phys_addr_t addr, uint32_t val)
   1.192 -{
   1.193 -    IOAPIC_ERR("ioapic_mem_writew\n");
   1.194 -}
   1.195 -
   1.196 -static
   1.197 -uint32_t ioapic_mem_readl(void *opaque, target_phys_addr_t addr)
   1.198 -{
   1.199 -    unsigned short ioregsel;
   1.200 -    IOAPICState *s = opaque;
   1.201 -    uint32_t    result = 0;
   1.202 -    uint32_t    redir_index = 0;
   1.203 -    uint64_t    redir_content = 0;
   1.204 -
   1.205 -    IOAPIC_LOG("apic_mem_readl addr %x\n", addr);
   1.206 -    if (!s){
   1.207 -        IOAPIC_ERR("null pointer for apic_mem_readl\n");
   1.208 -        return result;
   1.209 -    }
   1.210 -
   1.211 -    addr &= 0xff;
   1.212 -    if(addr == 0x00){
   1.213 -        result = s->ioregsel;
   1.214 -        return result;
   1.215 -    }else if (addr != 0x10){
   1.216 -        IOAPIC_ERR("apic_mem_readl address error\n");
   1.217 -        return result;
   1.218 -    }
   1.219 -
   1.220 -    ioregsel = s->ioregsel;
   1.221 -
   1.222 -    switch (ioregsel){
   1.223 -        case IOAPIC_REG_APIC_ID:
   1.224 -            result = ((s->id & 0xf) << 24);
   1.225 -            break;
   1.226 -        case IOAPIC_REG_VERSION:
   1.227 -            result = ((((IOAPIC_NUM_PINS-1) & 0xff) << 16)  
   1.228 -                     | (IOAPIC_VERSION_ID & 0x0f));
   1.229 -            break;
   1.230 -        case IOAPIC_REG_ARB_ID:
   1.231 -            //FIXME
   1.232 -            result = ((s->id & 0xf) << 24);
   1.233 -            break;
   1.234 -        default:
   1.235 -            redir_index = (ioregsel - 0x10) >> 1;
   1.236 -            if (redir_index >= 0 && redir_index < IOAPIC_NUM_PINS){
   1.237 -               redir_content = s->redirtbl[redir_index].value;
   1.238 -               result = (ioregsel & 0x1)?
   1.239 -                        (redir_content >> 32) & 0xffffffff :
   1.240 -                        redir_content & 0xffffffff;
   1.241 -            }else{
   1.242 -                IOAPIC_ERR(
   1.243 -                  "upic_mem_readl:undefined ioregsel %x\n",
   1.244 -                  ioregsel);
   1.245 -            }
   1.246 -    }
   1.247 -    return result;
   1.248 -}
   1.249 -
   1.250 -static
   1.251 -void ioapic_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
   1.252 -{
   1.253 -    IOAPICState *s = opaque;
   1.254 -    uint32_t redir_index = 0;
   1.255 -    uint64_t redir_content;
   1.256 -
   1.257 -    IOAPIC_LOG("apic_mem_writel addr %x val %x\n", addr, val);
   1.258 -
   1.259 -    if (!s){
   1.260 -        IOAPIC_ERR("apic_mem_writel: null opaque\n");
   1.261 -        return;
   1.262 -    }
   1.263 -
   1.264 -    addr &= 0xff;
   1.265 -    if (addr == 0x00){
   1.266 -        s->ioregsel = val;
   1.267 -        return;
   1.268 -    }else if (addr != 0x10){
   1.269 -        IOAPIC_ERR("apic_mem_writel: unsupported address\n");
   1.270 -    }
   1.271 -
   1.272 -    switch (s->ioregsel){
   1.273 -        case IOAPIC_REG_APIC_ID:
   1.274 -            s->id = (val >> 24) & 0xf;
   1.275 -            break;
   1.276 -        case IOAPIC_REG_VERSION:
   1.277 -            IOAPIC_ERR("apic_mem_writel: version register read only\n");
   1.278 -            break;
   1.279 -        case IOAPIC_REG_ARB_ID:
   1.280 -            s->arb_id = val;
   1.281 -            break;
   1.282 -        default:
   1.283 -            redir_index = (s->ioregsel - 0x10) >> 1;
   1.284 -//            IOAPIC_LOG("apic_mem_write: change redir :index %x before %lx, val %x\n", redir_index, s->redirtbl[redir_index].value, val);
   1.285 -            if (redir_index >= 0 && redir_index < IOAPIC_NUM_PINS){
   1.286 -                redir_content = s->redirtbl[redir_index].value;
   1.287 -                if (s->ioregsel & 0x1)
   1.288 -                   redir_content = (((uint64_t)val & 0xffffffff) << 32) | (redir_content & 0xffffffff);
   1.289 -                else
   1.290 -                    redir_content = ((redir_content >> 32) << 32) | (val & 0xffffffff);
   1.291 -                s->redirtbl[redir_index].value = redir_content;
   1.292 -            }else {
   1.293 -                IOAPIC_ERR("apic_mem_writel: error register\n");
   1.294 -            }
   1.295 -            //IOAPIC_LOG("after value is %lx\n",  s->redirtbl[redir_index].value);
   1.296 -    }
   1.297 -}
   1.298 -
   1.299 -static CPUReadMemoryFunc *ioapic_mem_read[3] = {
   1.300 -    ioapic_mem_readb,
   1.301 -    ioapic_mem_readw,
   1.302 -    ioapic_mem_readl,
   1.303 -};
   1.304 -
   1.305 -static CPUWriteMemoryFunc *ioapic_mem_write[3] = {
   1.306 -    ioapic_mem_writeb,
   1.307 -    ioapic_mem_writew,
   1.308 -    ioapic_mem_writel,
   1.309 -};
   1.310 -
   1.311 -void
   1.312 -IOAPICReset(IOAPICState *s)
   1.313 -{
   1.314 -    int i;
   1.315 -    if (!s)
   1.316 -        return ;
   1.317 -
   1.318 -    memset(s, 0, sizeof(IOAPICState));
   1.319 -
   1.320 -    for (i = 0; i < IOAPIC_NUM_PINS; i++)
   1.321 -        s->redirtbl[i].RedirForm.mask = 0x1;
   1.322 -//    IOAPIC_LOG("after Reset %lx\n",  s->redirtbl[0].value);
   1.323 -}
   1.324 -
   1.325 -void
   1.326 -ioapic_update_config(IOAPICState *s, unsigned long address, uint8_t enable)
   1.327 -{
   1.328 -    int ioapic_mem;
   1.329 -    if (!s)
   1.330 -       return;
   1.331 -
   1.332 -    ioapic_enable(s, enable);
   1.333 -
   1.334 -    if (address != s->base_address){
   1.335 -        ioapic_mem = cpu_register_io_memory(0, ioapic_mem_read, ioapic_mem_write, s);
   1.336 -        cpu_register_physical_memory(address, IOAPIC_MEM_LENGTH, ioapic_mem);
   1.337 -        s->base_address = ioapic_mem;
   1.338 -    }
   1.339 -}
   1.340 -
   1.341 -#define direct_intr(mode)   \
   1.342 -  (mode == VLAPIC_DELIV_MODE_SMI || \
   1.343 -   mode == VLAPIC_DELIV_MODE_NMI || \
   1.344 -   mode == VLAPIC_DELIV_MODE_INIT ||\
   1.345 -   mode == VLAPIC_DELIV_MODE_STARTUP)
   1.346 -
   1.347 -int
   1.348 -ioapic_inj_irq(IOAPICState *s, uint8_t dest, uint8_t vector, uint8_t trig_mode, uint8_t delivery_mode)
   1.349 -{
   1.350 -    int msg_count;
   1.351 -    if (!s || !s->lapic_info[dest]){
   1.352 -        IOAPIC_ERR("ioapic_inj_irq NULL parameter\n");
   1.353 -        return 0;
   1.354 -    }
   1.355 -    IOAPIC_LOG("ioapic_inj_irq %d , trig %d delive mode %d\n",
   1.356 -      vector, trig_mode, delivery_mode);
   1.357 -    switch(delivery_mode){
   1.358 -        case VLAPIC_DELIV_MODE_FIXED:
   1.359 -        case VLAPIC_DELIV_MODE_LPRI:
   1.360 -            get_shareinfo_apic_msg(s->lapic_info[dest]);
   1.361 -            msg_count = s->lapic_info[dest]->apic_msg_count;
   1.362 -            s->lapic_info[dest]->vl_apic_msg[msg_count].deliv_mode = delivery_mode;
   1.363 -            s->lapic_info[dest]->vl_apic_msg[msg_count].level = trig_mode;
   1.364 -            s->lapic_info[dest]->vl_apic_msg[msg_count].vector = vector;
   1.365 -            s->lapic_info[dest]->vl_apic_msg[msg_count].vector = vector;
   1.366 -            s->lapic_info[dest]->apic_msg_count ++;
   1.367 -            put_shareinfo_apic_msg(s->lapic_info[dest]);
   1.368 -            break;
   1.369 -        case VLAPIC_DELIV_MODE_EXT:
   1.370 -/*            get_shareinfo_ext(s->lapic_info[dest]);
   1.371 -            test_and_set_bit(vector, &s->lapic_info[dest]->vl_ext_intr[0]);
   1.372 -            put_shareinfo_ext(s->lapic_info[dest]);*/
   1.373 -            IOAPIC_ERR("<ioapic_inj_irq> Ext interrupt\n");
   1.374 -            return 0;
   1.375 -        default:
   1.376 -            IOAPIC_ERR("<ioapic_inj_irq> error delivery mode\n");
   1.377 -            break;
   1.378 -    }
   1.379 -    return 1;
   1.380 -}
   1.381 -
   1.382 -int
   1.383 -ioapic_match_logical_addr(IOAPICState *s, int number, uint8_t address)
   1.384 -{
   1.385 -    if(!s || !s->lapic_info[number]){
   1.386 -        IOAPIC_ERR("ioapic_match_logical_addr NULL parameter: "
   1.387 -          "number: %i s %p address %x\n",
   1.388 -          number, s, address);
   1.389 -        return 0;
   1.390 -    }
   1.391 -    IOAPIC_LOG("ioapic_match_logical_addr number %i address %x\n",
   1.392 -      number, address);
   1.393 -
   1.394 -    if (((s->lapic_info[number]->vl_dest_format >> 28 ) & 0xf) != 0xf) {
   1.395 -        IOAPIC_ERR("ioapic_match_logical_addr: cluster model not implemented still%x"
   1.396 -          ,s->lapic_info[number]->vl_dest_format);
   1.397 -#ifdef IOAPIC_DEBUG
   1.398 -        ioapic_dump_shareinfo(s, number);
   1.399 -#endif
   1.400 -        return 0;
   1.401 -    }
   1.402 -    return ((address & ((s->lapic_info[number]->vl_logical_dest >> 24) & 0xff)) != 0);
   1.403 -}
   1.404 -
   1.405 -int
   1.406 -ioapic_get_apr_lowpri(IOAPICState *s, int number)
   1.407 -{
   1.408 -    if(!s || !s->lapic_info[number]){
   1.409 -        IOAPIC_ERR("ioapic_get_apr_lowpri NULL parameter\n");
   1.410 -        return 0;
   1.411 -    }
   1.412 -    return s->lapic_info[number]->vl_arb_id;
   1.413 -}
   1.414 -
   1.415 -uint32_t
   1.416 -ioapic_get_delivery_bitmask(IOAPICState *s,
   1.417 -uint8_t dest, uint8_t dest_mode, uint8_t vector, uint8_t delivery_mode)
   1.418 -{
   1.419 -    uint32_t mask = 0;
   1.420 -    int low_priority = 256, selected = -1, i;
   1.421 -    fprintf(logfile, "<ioapic_get_delivery_bitmask>: dest %d dest_mode %d"
   1.422 -      "vector %d del_mode %d, lapic_count %d\n",
   1.423 -      dest, dest_mode, vector, delivery_mode, s->lapic_count);
   1.424 -    if (!s) return mask;
   1.425 -    if (dest_mode == 0) { //Physical mode
   1.426 -        if ((dest < s->lapic_count) && s->lapic_info[dest])
   1.427 -            mask = 1 << dest;
   1.428 -    }
   1.429 -    else {
   1.430 -        /* logical destination. call match_logical_addr for each APIC. */
   1.431 -        if (dest == 0) return 0;
   1.432 -        for (i=0; i< s->lapic_count; i++) {
   1.433 -            //FIXME focus one, since no such issue on IPF, shoudl we add it?
   1.434 -            if ( s->lapic_info[i] && ioapic_match_logical_addr(s, i, dest)){
   1.435 -                if (delivery_mode != APIC_DM_LOWPRI)
   1.436 -                    mask |= (1<<i);
   1.437 -                else {
   1.438 -                    if (low_priority > ioapic_get_apr_lowpri(s, i)){
   1.439 -                        low_priority = ioapic_get_apr_lowpri(s, i);
   1.440 -                        selected = i;
   1.441 -                    }
   1.442 -                    fprintf(logfile, "%d low_priority %d apr %d select %d\n",
   1.443 -                      i, low_priority, ioapic_get_apr_lowpri(s, i), selected);
   1.444 -                }
   1.445 -            }
   1.446 -        }
   1.447 -        if (delivery_mode == APIC_DM_LOWPRI && (selected != -1)) 
   1.448 -            mask |= (1<< selected);
   1.449 -    }
   1.450 -  return mask;
   1.451 -}
   1.452 -
   1.453 -void
   1.454 -ioapic_deliver(IOAPICState *s, int irqno){
   1.455 -    uint8_t dest = s->redirtbl[irqno].RedirForm.dest_id;
   1.456 -    uint8_t dest_mode = s->redirtbl[irqno].RedirForm.destmode;
   1.457 -    uint8_t delivery_mode = s->redirtbl[irqno].RedirForm.deliver_mode;
   1.458 -    uint8_t vector = s->redirtbl[irqno].RedirForm.vector;
   1.459 -    uint8_t trig_mode = s->redirtbl[irqno].RedirForm.trigmod;
   1.460 -    uint8_t bit;
   1.461 -    uint32_t deliver_bitmask; 
   1.462 -
   1.463 -    IOAPIC_LOG("IOAPIC deliver: "
   1.464 -      "dest %x dest_mode %x delivery_mode %x vector %x trig_mode %x\n",
   1.465 -      dest, dest_mode, delivery_mode, vector, trig_mode);
   1.466 -
   1.467 -    deliver_bitmask =
   1.468 -      ioapic_get_delivery_bitmask(s, dest, dest_mode, vector, delivery_mode);
   1.469 -
   1.470 -      IOAPIC_LOG("ioapic_get_delivery_bitmask return %x\n", deliver_bitmask);
   1.471 -    if (!deliver_bitmask){
   1.472 -        IOAPIC_ERR("Ioapic deliver, no target on destination\n");
   1.473 -        return ;
   1.474 -    }
   1.475 -
   1.476 -    switch (delivery_mode){
   1.477 -        case VLAPIC_DELIV_MODE_FIXED:
   1.478 -        case VLAPIC_DELIV_MODE_LPRI:
   1.479 -        case VLAPIC_DELIV_MODE_EXT:
   1.480 -            break;
   1.481 -        case VLAPIC_DELIV_MODE_SMI:
   1.482 -        case VLAPIC_DELIV_MODE_NMI:
   1.483 -        case VLAPIC_DELIV_MODE_INIT:
   1.484 -        case VLAPIC_DELIV_MODE_STARTUP:
   1.485 -        default:
   1.486 -            IOAPIC_ERR("Not support delivey mode %d\n", delivery_mode);
   1.487 -            return ;
   1.488 -    }
   1.489 -
   1.490 -    for (bit = 0; bit < s->lapic_count; bit++){
   1.491 -        if (deliver_bitmask & (1 << bit)){
   1.492 -            if (s->lapic_info[bit]){
   1.493 -                ioapic_inj_irq(s, bit, vector, trig_mode, delivery_mode);
   1.494 -            }
   1.495 -        }
   1.496 -    }
   1.497 -}
   1.498 -
   1.499 -static inline int __fls(uint32_t word)
   1.500 -{
   1.501 -    int bit;
   1.502 -    __asm__("bsrl %1,%0"
   1.503 -      :"=r" (bit)
   1.504 -      :"rm" (word));
   1.505 -    return word ? bit : -1;
   1.506 -}
   1.507 -
   1.508 -#if 0
   1.509 -static __inline__ int find_highest_bit(unsigned long *data, int length){
   1.510 -    while(length && !data[--length]);
   1.511 -    return __fls(data[length]) +  32 * length;
   1.512 -}
   1.513 -#endif
   1.514 -int
   1.515 -ioapic_get_highest_irq(IOAPICState *s){
   1.516 -    uint32_t irqs;
   1.517 -    if (!s)
   1.518 -        return -1;
   1.519 -    irqs = s->irr & ~s->isr;
   1.520 -    return __fls(irqs);
   1.521 -}
   1.522 -
   1.523 -
   1.524 -void
   1.525 -service_ioapic(IOAPICState *s){
   1.526 -    int irqno;
   1.527 -
   1.528 -    while((irqno = ioapic_get_highest_irq(s)) != -1){
   1.529 -        IOAPIC_LOG("service_ioapic: highest irqno %x\n", irqno);
   1.530 -
   1.531 -        if (!s->redirtbl[irqno].RedirForm.mask)
   1.532 -            ioapic_deliver(s, irqno);
   1.533 -
   1.534 -        if (s->redirtbl[irqno].RedirForm.trigmod == IOAPIC_LEVEL_TRIGGER){
   1.535 -            s->isr |= (1 << irqno);
   1.536 -        }
   1.537 - //       clear_bit(irqno, &s->irr);
   1.538 -        s->irr &= ~(1 << irqno);
   1.539 -    }
   1.540 -}
   1.541 -
   1.542 -void
   1.543 -ioapic_update_irq(IOAPICState *s)
   1.544 -{
   1.545 -    s->INTR = 1;
   1.546 -}
   1.547 -
   1.548 -void
   1.549 -ioapic_set_irq(IOAPICState *s, int irq, int level)
   1.550 -{
   1.551 -    IOAPIC_LOG("ioapic_set_irq %x %x\n", irq, level);
   1.552 -
   1.553 -    /* Timer interrupt implemented on HV side */
   1.554 -    if(irq == 0x0) return;
   1.555 -    if (!s){
   1.556 -        fprintf(logfile, "ioapic_set_irq null parameter\n");
   1.557 -        return;
   1.558 -    }
   1.559 -    if (!IOAPICEnabled(s) || s->redirtbl[irq].RedirForm.mask)
   1.560 -        return;
   1.561 -#ifdef IOAPIC_DEBUG
   1.562 -    ioapic_dump_redir(s, irq);
   1.563 -#endif
   1.564 -    if (irq >= 0 && irq < IOAPIC_NUM_PINS){
   1.565 -        uint32_t bit = 1 << irq;
   1.566 -        if (s->redirtbl[irq].RedirForm.trigmod == IOAPIC_LEVEL_TRIGGER){
   1.567 -            if(level)
   1.568 -                s->irr |= bit;
   1.569 -            else
   1.570 -                s->irr &= ~bit;
   1.571 -        }else{
   1.572 -            if(level)
   1.573 -                /* XXX No irr clear for edge interrupt */
   1.574 -                s->irr |= bit;
   1.575 -        }
   1.576 -    }
   1.577 -
   1.578 -    ioapic_update_irq(s);
   1.579 -}
   1.580 -
   1.581 -void
   1.582 -ioapic_legacy_irq(int irq, int level)
   1.583 -{
   1.584 -    ioapic_set_irq(ioapic, irq, level);
   1.585 -}
   1.586 -
   1.587 -static inline int find_highest_bit(uint32_t *data, int length){
   1.588 -        while(length && !data[--length]);
   1.589 -            return __fls(data[length]) +  32 * length;
   1.590 -}
   1.591 -
   1.592 -int
   1.593 -get_redir_num(IOAPICState *s, int vector){
   1.594 -    int i = 0;
   1.595 -    if(!s){
   1.596 -        IOAPIC_ERR("Null parameter for get_redir_num\n");
   1.597 -        return -1;
   1.598 -    }
   1.599 -    for(; i < IOAPIC_NUM_PINS-1; i++){
   1.600 -        if (s->redirtbl[i].RedirForm.vector == vector)
   1.601 -            return i;
   1.602 -    }
   1.603 -    return -1;
   1.604 -}
   1.605 -
   1.606 -void
   1.607 -ioapic_update_EOI()
   1.608 -{
   1.609 -    int i = 0;
   1.610 -    uint32_t isr_info ;
   1.611 -    uint32_t vector;
   1.612 -    IOAPICState *s = ioapic;
   1.613 -
   1.614 -    isr_info = s->isr;
   1.615 -
   1.616 -    for (i = 0; i < s->lapic_count; i++){
   1.617 -        if (!s->lapic_info[i] ||
   1.618 -          !test_bit(VL_STATE_EOI, s->lapic_info[i]->vl_state))
   1.619 -            continue;
   1.620 -        get_shareinfo_eoi(s->lapic_info[i]);
   1.621 -        while((vector = find_highest_bit((unsigned int *)&s->lapic_info[i]->vl_eoi[0],VLAPIC_INT_COUNT_32)) != -1){
   1.622 -            int redir_num;
   1.623 -            if ((redir_num = get_redir_num(s, vector)) == -1){
   1.624 -                IOAPIC_ERR("Can't find redir item for %d EOI \n", vector);
   1.625 -                continue;
   1.626 -            }
   1.627 -            if (!test_and_clear_bit(redir_num, &s->isr)){
   1.628 -                IOAPIC_ERR("redir %d not set for %d  EOI\n", redir_num, vector);
   1.629 -                continue;
   1.630 -            }
   1.631 -            clear_bit(vector, &s->lapic_info[i]->vl_eoi[0]); 
   1.632 -        }
   1.633 -        clear_bit(VL_STATE_EOI, &s->lapic_info[i]->vl_state);
   1.634 -        put_shareinfo_eoi(s->lapic_info[i]);
   1.635 -    }
   1.636 -}
   1.637 -
   1.638 -
   1.639 -void
   1.640 -ioapic_init_apic_info(IOAPICState *s)
   1.641 -{
   1.642 -#ifdef IOAPIC_DEBUG
   1.643 -    fprintf(logfile, "ioapic_init_apic_info\n");
   1.644 -    if (!s)
   1.645 -        return;
   1.646 -#endif
   1.647 -
   1.648 -#if 0
   1.649 -    if (!vio || !(vio->vl_number)){
   1.650 -        fprintf(logfile, "null vio or o vl number\n");
   1.651 -        return;
   1.652 -    }
   1.653 -
   1.654 -    for (i = 0; i < MAX_LAPIC_NUM; i++) s->lapic_info[i] = NULL;
   1.655 -
   1.656 -    s->lapic_count = vio->vl_number;
   1.657 -    for (i = 0; i < vio->vl_number; i++)
   1.658 -        s->lapic_info[i] = vio->vl_info + i;
   1.659 -#endif
   1.660 -
   1.661 -}
   1.662 -
   1.663 -void
   1.664 -ioapic_intack(IOAPICState *s)
   1.665 -{
   1.666 -#ifdef IOAPIC_DEBUG
   1.667 -    if (!s){
   1.668 -        fprintf(logfile, "ioapic_intack null parameter\n");
   1.669 -        return;
   1.670 -    }
   1.671 -#endif
   1.672 -    if (!s) s->INTR = 0;
   1.673 -}
   1.674 -
   1.675 -int
   1.676 -ioapic_has_intr()
   1.677 -{
   1.678 -    return ioapic->INTR;
   1.679 -}
   1.680 -
   1.681 -void
   1.682 -do_ioapic()
   1.683 -{
   1.684 -    service_ioapic(ioapic);
   1.685 -    ioapic_intack(ioapic);
   1.686 -}
   1.687 -
   1.688 -IOAPICState *
   1.689 -IOAPICInit( )
   1.690 -{
   1.691 -    IOAPICState *s;
   1.692 -
   1.693 -    s = qemu_mallocz(sizeof(IOAPICState));
   1.694 -    if (!s){
   1.695 -        fprintf(logfile, "IOAPICInit: malloc failed\n");
   1.696 -        return NULL;
   1.697 -    }
   1.698 -
   1.699 -    IOAPICReset(s);
   1.700 -    ioapic_init_apic_info(s);
   1.701 -    register_savevm("ioapic", 0, 1, ioapic_save, ioapic_load, s);
   1.702 -    /* Remove after GFW ready */
   1.703 -    ioapic_update_config(s, 0xfec00000, 1);
   1.704 -
   1.705 -    ioapic = s;
   1.706 -    return s;
   1.707 -}
     2.1 --- a/tools/ioemu/hw/ioapic.h	Mon Nov 07 16:36:27 2005 +0100
     2.2 +++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
     2.3 @@ -1,128 +0,0 @@
     2.4 -/////////////////////////////////////////////////////////////////////////
     2.5 -//
     2.6 -//  Copyright (C) 2001  MandrakeSoft S.A.
     2.7 -//
     2.8 -//    MandrakeSoft S.A.
     2.9 -//    43, rue d'Aboukir
    2.10 -//    75002 Paris - France
    2.11 -//    http://www.linux-mandrake.com/
    2.12 -//    http://www.mandrakesoft.com/
    2.13 -//
    2.14 -//  This library is free software; you can redistribute it and/or
    2.15 -//  modify it under the terms of the GNU Lesser General Public
    2.16 -//  License as published by the Free Software Foundation; either
    2.17 -//  version 2 of the License, or (at your option) any later version.
    2.18 -//
    2.19 -//  This library is distributed in the hope that it will be useful,
    2.20 -//  but WITHOUT ANY WARRANTY; without even the implied warranty of
    2.21 -//  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
    2.22 -//  Lesser General Public License for more details.
    2.23 -//
    2.24 -//  You should have received a copy of the GNU Lesser General Public
    2.25 -//  License along with this library; if not, write to the Free Software
    2.26 -//  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
    2.27 -//
    2.28 -
    2.29 -#ifndef __IOAPIC_H
    2.30 -#define __IOAPIC_H
    2.31 -
    2.32 -#include <xenctrl.h>
    2.33 -#include <xen/io/ioreq.h>
    2.34 -#include <xen/io/vmx_vlapic.h>
    2.35 -
    2.36 -#define IOAPIC_NUM_PINS 24
    2.37 -#define IOAPIC_VERSION_ID 0x11
    2.38 -#define IOAPIC_LEVEL_TRIGGER 1
    2.39 -#define APIC_DM_FIXED	0
    2.40 -#define APIC_DM_LOWPRI	1
    2.41 -
    2.42 -
    2.43 -
    2.44 -#ifdef CONFIG_SMP
    2.45 -#define LOCK_PREFIX "lock ; "
    2.46 -#else
    2.47 -#define LOCK_PREFIX ""
    2.48 -#endif
    2.49 -
    2.50 -#ifdef __I386__
    2.51 -#define __OS "q" 
    2.52 -#define __OP "r" 
    2.53 -#else
    2.54 -#define __OS "l"  /* Operation Suffix */
    2.55 -#define __OP "e"  /* Operand Prefix */
    2.56 -#endif
    2.57 -
    2.58 -#define ADDR (*(volatile long *) addr)
    2.59 -#if 0
    2.60 -#endif
    2.61 -extern void *shared_page;
    2.62 -extern FILE *logfile;
    2.63 -#ifdef __BIGENDIAN__
    2.64 -typedef union RedirStatus
    2.65 -{
    2.66 -    uint64_t value;
    2.67 -    struct {
    2.68 -        uint8_t dest_id;
    2.69 -        uint8_t reserved[4];
    2.70 -        uint8_t reserve:7;
    2.71 -        uint8_t mask:1;         /* interrupt mask*/
    2.72 -        uint8_t trigmod:1;
    2.73 -        uint8_t remoteirr:1;
    2.74 -        uint8_t polarity:1;
    2.75 -        uint8_t delivestatus:1;
    2.76 -        uint8_t destmode:1;
    2.77 -        uint8_t deliver_mode:3;
    2.78 -        uint8_t vector;
    2.79 -    }RedirForm;
    2.80 -}RedirStatus;
    2.81 -#else
    2.82 -typedef union RedirStatus
    2.83 -{
    2.84 -    uint64_t value;
    2.85 -    struct {
    2.86 -        uint8_t vector;
    2.87 -        uint8_t deliver_mode:3;
    2.88 -        uint8_t destmode:1;
    2.89 -        uint8_t delivestatus:1;
    2.90 -        uint8_t polarity:1;
    2.91 -        uint8_t remoteirr:1;
    2.92 -        uint8_t trigmod:1;
    2.93 -        uint8_t mask:1;         /* interrupt mask*/
    2.94 -        uint8_t reserve:7;
    2.95 -        uint8_t reserved[4];
    2.96 -        uint8_t dest_id;
    2.97 -    }RedirForm;
    2.98 -}RedirStatus;
    2.99 -#endif
   2.100 -/*
   2.101 - * IOAPICState stands for a instance of a IOAPIC
   2.102 - */
   2.103 -
   2.104 -/* FIXME tmp before working with Local APIC */
   2.105 -#define IOAPIC_MEM_LENGTH 0x100
   2.106 -#define IOAPIC_ENABLE_MASK 0x0
   2.107 -#define IOAPIC_ENABLE_FLAG (1 << IOAPIC_ENABLE_MASK)
   2.108 -#define MAX_LAPIC_NUM 32
   2.109 -
   2.110 -struct IOAPICState{
   2.111 -    uint32_t INTR;
   2.112 -    uint32_t id;
   2.113 -    uint32_t arb_id;
   2.114 -    uint32_t  flags;
   2.115 -    unsigned long base_address;
   2.116 -    uint32_t irr;
   2.117 -    uint32_t isr;           /* This is used for level trigger */
   2.118 -    uint8_t  vector_irr[256];
   2.119 -    RedirStatus redirtbl[IOAPIC_NUM_PINS];
   2.120 -    uint32_t ioregsel;
   2.121 -    uint32_t lapic_count;
   2.122 -    vlapic_info *lapic_info[MAX_LAPIC_NUM];
   2.123 -};
   2.124 -#define IOAPIC_REG_APIC_ID 0x0
   2.125 -#define IOAPIC_REG_VERSION 0x1
   2.126 -#define IOAPIC_REG_ARB_ID  0x2
   2.127 -#define IOAPICEnabled(s) (s->flags & IOAPIC_ENABLE_FLAG)
   2.128 -
   2.129 -typedef struct IOAPICState IOAPICState;
   2.130 -
   2.131 -#endif