ia64/xen-unstable

changeset 19100:5f03de1c2fe4

x86: clean up comments in mce_intel.c

Signed-off-by: Jan Beulich <jbeulich@novell.com>
author Keir Fraser <keir.fraser@citrix.com>
date Tue Jan 27 11:24:24 2009 +0000 (2009-01-27)
parents 89dd2bd6031b
children 7b56dbd1b439
files xen/arch/x86/cpu/mcheck/mce_intel.c
line diff
     1.1 --- a/xen/arch/x86/cpu/mcheck/mce_intel.c	Tue Jan 27 11:23:56 2009 +0000
     1.2 +++ b/xen/arch/x86/cpu/mcheck/mce_intel.c	Tue Jan 27 11:24:24 2009 +0000
     1.3 @@ -14,7 +14,6 @@ DEFINE_PER_CPU(cpu_banks_t, mce_banks_ow
     1.4  
     1.5  static int nr_intel_ext_msrs = 0;
     1.6  static int cmci_support = 0;
     1.7 -extern int firstbank;
     1.8  
     1.9  #ifdef CONFIG_X86_MCE_THERMAL
    1.10  static void unexpected_thermal_interrupt(struct cpu_user_regs *regs)
    1.11 @@ -121,7 +120,7 @@ static inline void intel_get_extended_ms
    1.12      if (nr_intel_ext_msrs == 0)
    1.13          return;
    1.14  
    1.15 -    /*this function will called when CAP(9).MCG_EXT_P = 1*/
    1.16 +    /* this function will called when CAP(9).MCG_EXT_P = 1 */
    1.17      memset(mc_ext, 0, sizeof(struct mcinfo_extended));
    1.18      mc_ext->common.type = MC_TYPE_EXTENDED;
    1.19      mc_ext->common.size = sizeof(mc_ext);
    1.20 @@ -157,7 +156,7 @@ static inline void intel_get_extended_ms
    1.21   * 3. called in polling handler
    1.22   * It will generate a new mc_info item if found CE/UC errors. DOM0 is the 
    1.23   * consumer.
    1.24 -*/
    1.25 + */
    1.26  static struct mc_info *machine_check_poll(int calltype)
    1.27  {
    1.28      struct mc_info *mi = NULL;
    1.29 @@ -174,9 +173,9 @@ static struct mc_info *machine_check_pol
    1.30      memset(&mcg, 0, sizeof(mcg));
    1.31      mcg.common.type = MC_TYPE_GLOBAL;
    1.32      mcg.common.size = sizeof(mcg);
    1.33 -    /*If called from cpu-reset check, don't need to fill them.
    1.34 -     *If called from cmci context, we'll try to fill domid by memory addr
    1.35 -    */
    1.36 +    /* If called from cpu-reset check, don't need to fill them.
    1.37 +     * If called from cmci context, we'll try to fill domid by memory addr
    1.38 +     */
    1.39      mcg.mc_domid = -1;
    1.40      mcg.mc_vcpuid = -1;
    1.41      if (calltype == MC_FLAG_POLLED || calltype == MC_FLAG_RESET)
    1.42 @@ -192,7 +191,7 @@ static struct mc_info *machine_check_pol
    1.43  
    1.44      for ( i = 0; i < nr_mce_banks; i++ ) {
    1.45          struct mcinfo_bank mcb;
    1.46 -        /*For CMCI, only owners checks the owned MSRs*/
    1.47 +        /* For CMCI, only owners checks the owned MSRs */
    1.48          if ( !test_bit(i, __get_cpu_var(mce_banks_owned)) &&
    1.49               (calltype & MC_FLAG_CMCI) )
    1.50              continue;
    1.51 @@ -241,7 +240,7 @@ static struct mc_info *machine_check_pol
    1.52          x86_mcinfo_add(mi, &mcb);
    1.53          nr_unit++;
    1.54          add_taint(TAINT_MACHINE_CHECK);
    1.55 -        /*Clear state for this bank */
    1.56 +        /* Clear state for this bank */
    1.57          wrmsrl(MSR_IA32_MC0_STATUS + 4 * i, 0);
    1.58          printk(KERN_DEBUG "mcheck_poll: bank%i CPU%d status[%"PRIx64"]\n", 
    1.59                  i, cpu, status);
    1.60 @@ -250,12 +249,12 @@ static struct mc_info *machine_check_pol
    1.61                  mcg.mc_coreid, mcg.mc_apicid, mcg.mc_core_threadid);
    1.62   
    1.63      }
    1.64 -    /*if pcc = 1, uc must be 1*/
    1.65 +    /* if pcc = 1, uc must be 1 */
    1.66      if (pcc)
    1.67          mcg.mc_flags |= MC_FLAG_UNCORRECTABLE;
    1.68      else if (uc)
    1.69          mcg.mc_flags |= MC_FLAG_RECOVERABLE;
    1.70 -    else /*correctable*/
    1.71 +    else /* correctable */
    1.72          mcg.mc_flags |= MC_FLAG_CORRECTABLE;
    1.73  
    1.74      if (nr_unit && nr_intel_ext_msrs && 
    1.75 @@ -265,7 +264,7 @@ static struct mc_info *machine_check_pol
    1.76      }
    1.77      if (nr_unit) 
    1.78          x86_mcinfo_add(mi, &mcg);
    1.79 -    /*Clear global state*/
    1.80 +    /* Clear global state */
    1.81      return mi;
    1.82  }
    1.83  
    1.84 @@ -542,8 +541,7 @@ static void mce_init(void)
    1.85       * This also clears all registers*/
    1.86  
    1.87      mi = machine_check_poll(MC_FLAG_RESET);
    1.88 -    /*in the boot up stage, not expect inject to DOM0, but go print out
    1.89 -    */
    1.90 +    /* in the boot up stage, don't inject to DOM0, but print out */
    1.91      if (mi)
    1.92          x86_mcinfo_dump(mi);
    1.93  
    1.94 @@ -554,22 +552,22 @@ static void mce_init(void)
    1.95  
    1.96      for (i = firstbank; i < nr_mce_banks; i++)
    1.97      {
    1.98 -        /*Some banks are shared across cores, use MCi_CTRL to judge whether
    1.99 -         * this bank has been initialized by other cores already.*/
   1.100 +        /* Some banks are shared across cores, use MCi_CTRL to judge whether
   1.101 +         * this bank has been initialized by other cores already. */
   1.102          rdmsr(MSR_IA32_MC0_CTL + 4*i, l, h);
   1.103 -        if (!l & !h)
   1.104 +        if (!(l | h))
   1.105          {
   1.106 -            /*if ctl is 0, this bank is never initialized*/
   1.107 +            /* if ctl is 0, this bank is never initialized */
   1.108              printk(KERN_DEBUG "mce_init: init bank%d\n", i);
   1.109              wrmsr (MSR_IA32_MC0_CTL + 4*i, 0xffffffff, 0xffffffff);
   1.110              wrmsr (MSR_IA32_MC0_STATUS + 4*i, 0x0, 0x0);
   1.111 -       }
   1.112 +        }
   1.113      }
   1.114 -    if (firstbank) /*if cmci enabled, firstbank = 0*/
   1.115 +    if (firstbank) /* if cmci enabled, firstbank = 0 */
   1.116          wrmsr (MSR_IA32_MC0_STATUS, 0x0, 0x0);
   1.117  }
   1.118  
   1.119 -/*p4/p6 faimily has similar MCA initialization process*/
   1.120 +/* p4/p6 family have similar MCA initialization process */
   1.121  void intel_mcheck_init(struct cpuinfo_x86 *c)
   1.122  {
   1.123      mce_cap_init(c);