ia64/xen-unstable

changeset 5178:5d02e3d0e0f6

bitkeeper revision 1.1564.1.4 (42963f87PlLeO796F6JRyyuat1UQ4Q)

Restructure metaphysical mode rid management to ensure easy
accessibility from rsm/ssm psr.dt hyperprivops.

Signed-off by: Dan Magenheimer <dan.magenheimer@hp.com>
author djm@kirby.fc.hp.com
date Thu May 26 21:28:39 2005 +0000 (2005-05-26)
parents 44a4da6bfe52
children 8356773d6de6
files xen/arch/ia64/asm-offsets.c xen/arch/ia64/domain.c xen/arch/ia64/regionreg.c xen/arch/ia64/vcpu.c xen/include/asm-ia64/domain.h
line diff
     1.1 --- a/xen/arch/ia64/asm-offsets.c	Thu May 26 16:02:35 2005 +0000
     1.2 +++ b/xen/arch/ia64/asm-offsets.c	Thu May 26 21:28:39 2005 +0000
     1.3 @@ -51,6 +51,7 @@ void foo(void)
     1.4  	DEFINE(XSI_METAPHYS_OFS, offsetof(vcpu_info_t, arch.metaphysical_mode));
     1.5  	DEFINE(XSI_INCOMPL_REG_OFS, offsetof(vcpu_info_t, arch.incomplete_regframe));
     1.6  	DEFINE(XSI_PEND_OFS, offsetof(vcpu_info_t, arch.pending_interruption));
     1.7 +	DEFINE(XSI_RR0_OFS, offsetof(vcpu_info_t, arch.rrs[0]));
     1.8  	//DEFINE(IA64_TASK_BLOCKED_OFFSET,offsetof (struct task_struct, blocked));
     1.9  	//DEFINE(IA64_TASK_CLEAR_CHILD_TID_OFFSET,offsetof (struct task_struct, clear_child_tid));
    1.10  	//DEFINE(IA64_TASK_GROUP_LEADER_OFFSET, offsetof (struct task_struct, group_leader));
    1.11 @@ -63,6 +64,9 @@ void foo(void)
    1.12  	DEFINE(IA64_TASK_THREAD_KSP_OFFSET, offsetof (struct exec_domain, arch._thread.ksp));
    1.13  	DEFINE(IA64_TASK_THREAD_ON_USTACK_OFFSET, offsetof (struct exec_domain, arch._thread.on_ustack));
    1.14  
    1.15 +	DEFINE(IA64_VCPU_META_RR0_OFFSET, offsetof (struct exec_domain, arch.metaphysical_rr0));
    1.16 +	DEFINE(IA64_VCPU_META_SAVED_RR0_OFFSET, offsetof (struct exec_domain, arch.metaphysical_saved_rr0));
    1.17 +
    1.18  	BLANK();
    1.19  
    1.20  	//DEFINE(IA64_SIGHAND_SIGLOCK_OFFSET,offsetof (struct sighand_struct, siglock));
     2.1 --- a/xen/arch/ia64/domain.c	Thu May 26 16:02:35 2005 +0000
     2.2 +++ b/xen/arch/ia64/domain.c	Thu May 26 21:28:39 2005 +0000
     2.3 @@ -244,9 +244,11 @@ void arch_do_createdomain(struct exec_do
     2.4  	}
     2.5  #endif
     2.6  	d->max_pages = (128*1024*1024)/PAGE_SIZE; // 128MB default // FIXME
     2.7 -	if ((d->metaphysical_rid = allocate_metaphysical_rid()) == -1UL)
     2.8 +	if ((d->arch.metaphysical_rr0 = allocate_metaphysical_rr0()) == -1UL)
     2.9  		BUG();
    2.10  	ed->vcpu_info->arch.metaphysical_mode = 1;
    2.11 +	ed->arch.metaphysical_rr0 = d->arch.metaphysical_rr0;
    2.12 +	ed->arch.metaphysical_saved_rr0 = d->arch.metaphysical_rr0;
    2.13  #define DOMAIN_RID_BITS_DEFAULT 18
    2.14  	if (!allocate_rid_range(d,DOMAIN_RID_BITS_DEFAULT)) // FIXME
    2.15  		BUG();
     3.1 --- a/xen/arch/ia64/regionreg.c	Thu May 26 16:02:35 2005 +0000
     3.2 +++ b/xen/arch/ia64/regionreg.c	Thu May 26 21:28:39 2005 +0000
     3.3 @@ -63,9 +63,14 @@ unsigned long allocate_reserved_rid(void
     3.4  
     3.5  
     3.6  // returns -1 if none available
     3.7 -unsigned long allocate_metaphysical_rid(void)
     3.8 +unsigned long allocate_metaphysical_rr0(void)
     3.9  {
    3.10 -	unsigned long rid = allocate_reserved_rid();
    3.11 +	ia64_rr rrv;
    3.12 +
    3.13 +	rrv.rid = allocate_reserved_rid();
    3.14 +	rrv.ps = PAGE_SHIFT;
    3.15 +	rrv.ve = 0;
    3.16 +	return rrv.rrval;
    3.17  }
    3.18  
    3.19  int deallocate_metaphysical_rid(unsigned long rid)
    3.20 @@ -282,22 +287,20 @@ int set_one_rr(unsigned long rr, unsigne
    3.21  		if (rreg == 6) newrrv.ve = VHPT_ENABLED_REGION_7;
    3.22  		else newrrv.ve = VHPT_ENABLED_REGION_0_TO_6;
    3.23  		newrrv.ps = PAGE_SHIFT;
    3.24 +		if (rreg == 0) ed->arch.metaphysical_saved_rr0 = newrrv.rrval;
    3.25  		set_rr(rr,newrrv.rrval);
    3.26  	}
    3.27  	return 1;
    3.28  }
    3.29  
    3.30  // set rr0 to the passed rid (for metaphysical mode so don't use domain offset
    3.31 -int set_metaphysical_rr(unsigned long rr, unsigned long rid)
    3.32 +int set_metaphysical_rr0(void)
    3.33  {
    3.34 +	struct exec_domain *ed = current;
    3.35  	ia64_rr rrv;
    3.36  	
    3.37 -	rrv.rrval = 0;
    3.38 -	rrv.rid = rid;
    3.39 -	rrv.ps = PAGE_SHIFT;
    3.40  //	rrv.ve = 1; 	FIXME: TURN ME BACK ON WHEN VHPT IS WORKING
    3.41 -	rrv.ve = 0;
    3.42 -	set_rr(rr,rrv.rrval);
    3.43 +	set_rr(0,ed->arch.metaphysical_rr0);
    3.44  }
    3.45  
    3.46  // validates/changes region registers 0-6 in the currently executing domain
    3.47 @@ -321,8 +324,7 @@ void init_all_rr(struct exec_domain *ed)
    3.48  {
    3.49  	ia64_rr rrv;
    3.50  
    3.51 -	rrv.rrval = 0;
    3.52 -	rrv.rid = ed->domain->metaphysical_rid;
    3.53 +	rrv.rrval = ed->domain->arch.metaphysical_rr0;
    3.54  	rrv.ps = PAGE_SHIFT;
    3.55  	rrv.ve = 1;
    3.56  if (!ed->vcpu_info) { printf("Stopping in init_all_rr\n"); dummy(); }
    3.57 @@ -375,9 +377,7 @@ unsigned long load_region_regs(struct ex
    3.58  	if (ed->vcpu_info->arch.metaphysical_mode) {
    3.59  		ia64_rr rrv;
    3.60  
    3.61 -		rrv.rrval = 0;
    3.62 -		rrv.rid = ed->domain->metaphysical_rid;
    3.63 -		rrv.ps = PAGE_SHIFT;
    3.64 +		rrv.rrval = ed->domain->arch.metaphysical_rr0;
    3.65  		rrv.ve = 1;
    3.66  		rr0 = rrv.rrval;
    3.67  		set_rr_no_srlz(0x0000000000000000L, rr0);
     4.1 --- a/xen/arch/ia64/vcpu.c	Thu May 26 16:02:35 2005 +0000
     4.2 +++ b/xen/arch/ia64/vcpu.c	Thu May 26 21:28:39 2005 +0000
     4.3 @@ -117,7 +117,7 @@ void vcpu_set_metaphysical_mode(VCPU *vc
     4.4  {
     4.5  	/* only do something if mode changes */
     4.6  	if (!!newmode ^ !!PSCB(vcpu,metaphysical_mode)) {
     4.7 -		if (newmode) set_metaphysical_rr(0,vcpu->domain->metaphysical_rid);
     4.8 +		if (newmode) set_metaphysical_rr0();
     4.9  		else if (PSCB(vcpu,rrs[0]) != -1)
    4.10  			set_one_rr(0, PSCB(vcpu,rrs[0]));
    4.11  		PSCB(vcpu,metaphysical_mode) = newmode;
    4.12 @@ -170,6 +170,12 @@ IA64FAULT vcpu_set_psr_dt(VCPU *vcpu)
    4.13  	return IA64_NO_FAULT;
    4.14  }
    4.15  
    4.16 +IA64FAULT vcpu_set_psr_i(VCPU *vcpu)
    4.17 +{
    4.18 +	PSCB(vcpu,interrupt_delivery_enabled) = 1;
    4.19 +	return IA64_NO_FAULT;
    4.20 +}
    4.21 +
    4.22  IA64FAULT vcpu_set_psr_sm(VCPU *vcpu, UINT64 imm24)
    4.23  {
    4.24  	struct ia64_psr psr, imm, *ipsr;
     5.1 --- a/xen/include/asm-ia64/domain.h	Thu May 26 16:02:35 2005 +0000
     5.2 +++ b/xen/include/asm-ia64/domain.h	Thu May 26 21:28:39 2005 +0000
     5.3 @@ -26,7 +26,7 @@ struct trap_bounce {
     5.4  struct arch_domain {
     5.5      struct mm_struct *active_mm;
     5.6      struct mm_struct *mm;
     5.7 -    int metaphysical_rid;
     5.8 +    int metaphysical_rr0;
     5.9      int starting_rid;		/* first RID assigned to domain */
    5.10      int ending_rid;		/* one beyond highest RID assigned to domain */
    5.11      int rid_bits;		/* number of virtual rid bits (default: 18) */
    5.12 @@ -46,7 +46,6 @@ struct arch_domain {
    5.13      u64 entry;
    5.14  #endif
    5.15  };
    5.16 -#define metaphysical_rid arch.metaphysical_rid
    5.17  #define starting_rid arch.starting_rid
    5.18  #define ending_rid arch.ending_rid
    5.19  #define rid_bits arch.rid_bits
    5.20 @@ -74,6 +73,8 @@ struct arch_exec_domain {
    5.21  	unsigned long xen_timer_interval;
    5.22  #endif
    5.23      void *regs;	/* temporary until find a better way to do privops */
    5.24 +    int metaphysical_rr0;		// from arch_domain (so is pinned)
    5.25 +    int metaphysical_saved_rr0;		// from arch_domain (so is pinned)
    5.26      struct mm_struct *active_mm;
    5.27      struct thread_struct _thread;	// this must be last
    5.28  #ifdef CONFIG_VTI