ia64/xen-unstable
changeset 11331:5ad72f9e639c
merge with xen-unstable.hg
author | awilliam@xenbuild.aw |
---|---|
date | Tue Aug 29 08:28:38 2006 -0600 (2006-08-29) |
parents | e317ad162eba 8273f730371b |
children | 003fdc4f0a7c |
files |
line diff
1.1 --- a/buildconfigs/Rules.mk Tue Aug 29 08:09:28 2006 -0600 1.2 +++ b/buildconfigs/Rules.mk Tue Aug 29 08:28:38 2006 -0600 1.3 @@ -19,7 +19,7 @@ endif 1.4 1.5 # Expand Linux series to Linux version 1.6 LINUX_SERIES ?= 2.6 1.7 -LINUX_VER ?= $(shell grep "^LINUX_VER" buildconfigs/mk.linux-2.6-xen | sed -e 's/.*=[ ]*//') 1.8 +LINUX_VER ?= $(shell grep "^LINUX_VER " buildconfigs/mk.linux-2.6-xen | sed -e 's/.*=[ ]*//') 1.9 1.10 # Setup Linux search path 1.11 LINUX_SRC_PATH ?= .:..
2.1 --- a/tools/ioemu/hw/pci.c Tue Aug 29 08:09:28 2006 -0600 2.2 +++ b/tools/ioemu/hw/pci.c Tue Aug 29 08:28:38 2006 -0600 2.3 @@ -286,6 +286,7 @@ void pci_default_write_config(PCIDevice 2.4 case 0x0b: 2.5 case 0x0e: 2.6 case 0x10 ... 0x27: /* base */ 2.7 + case 0x2c ... 0x2f: /* subsystem vendor id, subsystem id */ 2.8 case 0x30 ... 0x33: /* rom */ 2.9 case 0x3d: 2.10 can_write = 0; 2.11 @@ -318,6 +319,18 @@ void pci_default_write_config(PCIDevice 2.12 break; 2.13 } 2.14 if (can_write) { 2.15 + if( addr == 0x05 ) { 2.16 + /* In Command Register, bits 15:11 are reserved */ 2.17 + val &= 0x07; 2.18 + } else if ( addr == 0x06 ) { 2.19 + /* In Status Register, bits 6, 2:0 are reserved, */ 2.20 + /* and bits 7,5,4,3 are read only */ 2.21 + val = d->config[addr]; 2.22 + } else if ( addr == 0x07 ) { 2.23 + /* In Status Register, bits 10,9 are reserved, */ 2.24 + val = (val & ~0x06) | (d->config[addr] & 0x06); 2.25 + } 2.26 + 2.27 d->config[addr] = val; 2.28 } 2.29 addr++;
3.1 --- a/tools/ioemu/hw/rtl8139.c Tue Aug 29 08:09:28 2006 -0600 3.2 +++ b/tools/ioemu/hw/rtl8139.c Tue Aug 29 08:28:38 2006 -0600 3.3 @@ -3423,6 +3423,8 @@ void pci_rtl8139_init(PCIBus *bus, NICIn 3.4 pci_conf[0x0e] = 0x00; /* header_type */ 3.5 pci_conf[0x3d] = 1; /* interrupt pin 0 */ 3.6 pci_conf[0x34] = 0xdc; 3.7 + pci_conf[0x2c] = pci_conf[0x00]; // same as Vendor ID 3.8 + pci_conf[0x2d] = pci_conf[0x01]; 3.9 3.10 s = &d->rtl8139; 3.11
4.1 --- a/tools/ioemu/hw/usb-uhci.c Tue Aug 29 08:09:28 2006 -0600 4.2 +++ b/tools/ioemu/hw/usb-uhci.c Tue Aug 29 08:28:38 2006 -0600 4.3 @@ -659,6 +659,8 @@ void usb_uhci_init(PCIBus *bus, int devf 4.4 pci_conf[0x0e] = 0x00; // header_type 4.5 pci_conf[0x3d] = 4; // interrupt pin 3 4.6 pci_conf[0x60] = 0x10; // release number 4.7 + pci_conf[0x2c] = pci_conf[0x00]; // same as Vendor ID 4.8 + pci_conf[0x2d] = pci_conf[0x01]; 4.9 4.10 for(i = 0; i < NB_PORTS; i++) { 4.11 qemu_register_usb_port(&s->ports[i].port, s, i, uhci_attach);
5.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000 5.2 +++ b/tools/ioemu/patches/qemu-pci Tue Aug 29 08:28:38 2006 -0600 5.3 @@ -0,0 +1,54 @@ 5.4 +diff -r d5eb5205ff35 tools/ioemu/hw/pci.c 5.5 +--- a/tools/ioemu/hw/pci.c Thu Aug 24 16:25:49 2006 +0100 5.6 ++++ b/tools/ioemu/hw/pci.c Fri Aug 25 11:00:03 2006 +0800 5.7 +@@ -286,6 +286,7 @@ void pci_default_write_config(PCIDevice 5.8 + case 0x0b: 5.9 + case 0x0e: 5.10 + case 0x10 ... 0x27: /* base */ 5.11 ++ case 0x2c ... 0x2f: /* subsystem vendor id, subsystem id */ 5.12 + case 0x30 ... 0x33: /* rom */ 5.13 + case 0x3d: 5.14 + can_write = 0; 5.15 +@@ -318,6 +319,18 @@ void pci_default_write_config(PCIDevice 5.16 + break; 5.17 + } 5.18 + if (can_write) { 5.19 ++ if( addr == 0x05 ) { 5.20 ++ /* In Command Register, bits 15:11 are reserved */ 5.21 ++ val &= 0x07; 5.22 ++ } else if ( addr == 0x06 ) { 5.23 ++ /* In Status Register, bits 6, 2:0 are reserved, */ 5.24 ++ /* and bits 7,5,4,3 are read only */ 5.25 ++ val = d->config[addr]; 5.26 ++ } else if ( addr == 0x07 ) { 5.27 ++ /* In Status Register, bits 10,9 are reserved, */ 5.28 ++ val = (val & ~0x06) | (d->config[addr] & 0x06); 5.29 ++ } 5.30 ++ 5.31 + d->config[addr] = val; 5.32 + } 5.33 + addr++; 5.34 +diff -r d5eb5205ff35 tools/ioemu/hw/rtl8139.c 5.35 +--- a/tools/ioemu/hw/rtl8139.c Thu Aug 24 16:25:49 2006 +0100 5.36 ++++ b/tools/ioemu/hw/rtl8139.c Fri Aug 25 11:00:03 2006 +0800 5.37 +@@ -3423,6 +3423,8 @@ void pci_rtl8139_init(PCIBus *bus, NICIn 5.38 + pci_conf[0x0e] = 0x00; /* header_type */ 5.39 + pci_conf[0x3d] = 1; /* interrupt pin 0 */ 5.40 + pci_conf[0x34] = 0xdc; 5.41 ++ pci_conf[0x2c] = pci_conf[0x00]; // same as Vendor ID 5.42 ++ pci_conf[0x2d] = pci_conf[0x01]; 5.43 + 5.44 + s = &d->rtl8139; 5.45 + 5.46 +diff -r d5eb5205ff35 tools/ioemu/hw/usb-uhci.c 5.47 +--- a/tools/ioemu/hw/usb-uhci.c Thu Aug 24 16:25:49 2006 +0100 5.48 ++++ b/tools/ioemu/hw/usb-uhci.c Fri Aug 25 11:00:03 2006 +0800 5.49 +@@ -659,6 +659,8 @@ void usb_uhci_init(PCIBus *bus, int devf 5.50 + pci_conf[0x0e] = 0x00; // header_type 5.51 + pci_conf[0x3d] = 4; // interrupt pin 3 5.52 + pci_conf[0x60] = 0x10; // release number 5.53 ++ pci_conf[0x2c] = pci_conf[0x00]; // same as Vendor ID 5.54 ++ pci_conf[0x2d] = pci_conf[0x01]; 5.55 + 5.56 + for(i = 0; i < NB_PORTS; i++) { 5.57 + qemu_register_usb_port(&s->ports[i].port, s, i, uhci_attach);
6.1 --- a/tools/ioemu/patches/series Tue Aug 29 08:09:28 2006 -0600 6.2 +++ b/tools/ioemu/patches/series Tue Aug 29 08:28:38 2006 -0600 6.3 @@ -44,3 +44,4 @@ qemu-daemonize 6.4 xen-platform-device 6.5 qemu-bootorder 6.6 qemu-tunable-ide-write-cache 6.7 +qemu-pci -p3
7.1 --- a/xen/arch/x86/mm/shadow/common.c Tue Aug 29 08:09:28 2006 -0600 7.2 +++ b/xen/arch/x86/mm/shadow/common.c Tue Aug 29 08:28:38 2006 -0600 7.3 @@ -397,22 +397,14 @@ shadow_validate_guest_pt_write(struct vc 7.4 ASSERT(shadow_lock_is_acquired(v->domain)); 7.5 rc = __shadow_validate_guest_entry(v, gmfn, entry, size); 7.6 if ( rc & SHADOW_SET_FLUSH ) 7.7 - { 7.8 - // Flush everyone except the local processor, which will flush when it 7.9 - // re-enters the HVM guest. 7.10 - // 7.11 - cpumask_t mask = d->domain_dirty_cpumask; 7.12 - cpu_clear(v->processor, mask); 7.13 - flush_tlb_mask(mask); 7.14 - } 7.15 + /* Need to flush TLBs to pick up shadow PT changes */ 7.16 + flush_tlb_mask(d->domain_dirty_cpumask); 7.17 if ( rc & SHADOW_SET_ERROR ) 7.18 { 7.19 /* This page is probably not a pagetable any more: tear it out of the 7.20 * shadows, along with any tables that reference it */ 7.21 shadow_remove_all_shadows_and_parents(v, gmfn); 7.22 } 7.23 - /* We ignore the other bits: since we are about to change CR3 on 7.24 - * VMENTER we don't need to do any extra TLB flushes. */ 7.25 } 7.26 7.27 7.28 @@ -1129,7 +1121,7 @@ sh_gfn_to_mfn_foreign(struct domain *d, 7.29 7.30 7.31 #if CONFIG_PAGING_LEVELS > 2 7.32 - if ( gpfn > (RO_MPT_VIRT_END - RO_MPT_VIRT_START) / sizeof(l1_pgentry_t) ) 7.33 + if ( gpfn >= (RO_MPT_VIRT_END-RO_MPT_VIRT_START) / sizeof(l1_pgentry_t) ) 7.34 /* This pfn is higher than the p2m map can hold */ 7.35 return _mfn(INVALID_MFN); 7.36 #endif 7.37 @@ -1898,16 +1890,16 @@ int shadow_remove_write_access(struct vc 7.38 } while (0) 7.39 7.40 7.41 - /* Linux lowmem: first 1GB is mapped 1-to-1 above 0xC0000000 */ 7.42 - if ( v == current 7.43 - && (gfn = sh_mfn_to_gfn(v->domain, gmfn)) < 0x40000000 ) 7.44 - GUESS(0xC0000000 + (gfn << PAGE_SHIFT), 4); 7.45 - 7.46 if ( v->arch.shadow.mode->guest_levels == 2 ) 7.47 { 7.48 if ( level == 1 ) 7.49 /* 32bit non-PAE w2k3: linear map at 0xC0000000 */ 7.50 GUESS(0xC0000000UL + (fault_addr >> 10), 1); 7.51 + 7.52 + /* Linux lowmem: first 896MB is mapped 1-to-1 above 0xC0000000 */ 7.53 + if ((gfn = sh_mfn_to_gfn(v->domain, gmfn)) < 0x38000 ) 7.54 + GUESS(0xC0000000UL + (gfn << PAGE_SHIFT), 4); 7.55 + 7.56 } 7.57 #if CONFIG_PAGING_LEVELS >= 3 7.58 else if ( v->arch.shadow.mode->guest_levels == 3 ) 7.59 @@ -1918,6 +1910,10 @@ int shadow_remove_write_access(struct vc 7.60 case 1: GUESS(0xC0000000UL + (fault_addr >> 9), 2); break; 7.61 case 2: GUESS(0xC0600000UL + (fault_addr >> 18), 2); break; 7.62 } 7.63 + 7.64 + /* Linux lowmem: first 896MB is mapped 1-to-1 above 0xC0000000 */ 7.65 + if ((gfn = sh_mfn_to_gfn(v->domain, gmfn)) < 0x38000 ) 7.66 + GUESS(0xC0000000UL + (gfn << PAGE_SHIFT), 4); 7.67 } 7.68 #if CONFIG_PAGING_LEVELS >= 4 7.69 else if ( v->arch.shadow.mode->guest_levels == 4 ) 7.70 @@ -1929,6 +1925,10 @@ int shadow_remove_write_access(struct vc 7.71 case 2: GUESS(0x70380000000UL + (fault_addr >> 18), 3); break; 7.72 case 3: GUESS(0x70381C00000UL + (fault_addr >> 27), 3); break; 7.73 } 7.74 + 7.75 + /* Linux direct map at 0xffff810000000000 */ 7.76 + gfn = sh_mfn_to_gfn(v->domain, gmfn); 7.77 + GUESS(0xffff810000000000UL + (gfn << PAGE_SHIFT), 4); 7.78 } 7.79 #endif /* CONFIG_PAGING_LEVELS >= 4 */ 7.80 #endif /* CONFIG_PAGING_LEVELS >= 3 */ 7.81 @@ -2185,7 +2185,7 @@ void sh_remove_shadows(struct vcpu *v, m 7.82 7.83 pg = mfn_to_page(gmfn); 7.84 7.85 - /* Bale out now if the page is not shadowed */ 7.86 + /* Bail out now if the page is not shadowed */ 7.87 if ( (pg->count_info & PGC_page_table) == 0 ) 7.88 return; 7.89
8.1 --- a/xen/arch/x86/mm/shadow/multi.c Tue Aug 29 08:09:28 2006 -0600 8.2 +++ b/xen/arch/x86/mm/shadow/multi.c Tue Aug 29 08:28:38 2006 -0600 8.3 @@ -2543,6 +2543,16 @@ static int validate_gl3e(struct vcpu *v, 8.4 8.5 perfc_incrc(shadow_validate_gl3e_calls); 8.6 8.7 +#if (SHADOW_PAGING_LEVELS == 3) && (GUEST_PAGING_LEVELS == 3) 8.8 + { 8.9 + /* If we've updated a subshadow which is unreferenced then 8.10 + we don't care what value is being written - bail. */ 8.11 + struct pae_l3_bookkeeping *info = sl3p_to_info(se); 8.12 + if(!info->refcount) 8.13 + return result; 8.14 + } 8.15 +#endif 8.16 + 8.17 if ( guest_l3e_get_flags(*new_gl3e) & _PAGE_PRESENT ) 8.18 { 8.19 gfn_t gl2gfn = guest_l3e_get_gfn(*new_gl3e); 8.20 @@ -2634,7 +2644,7 @@ static int validate_gl1e(struct vcpu *v, 8.21 8.22 8.23 /**************************************************************************/ 8.24 -/* Functions which translate and install a the shadows of arbitrary guest 8.25 +/* Functions which translate and install the shadows of arbitrary guest 8.26 * entries that we have just seen the guest write. */ 8.27 8.28 8.29 @@ -2934,7 +2944,7 @@ static int sh_page_fault(struct vcpu *v, 8.30 && shadow_vcpu_mode_translate(v) 8.31 && mmio_space(gfn_to_paddr(gfn)) ); 8.32 8.33 - /* For MMIO, the shadow holds the *gfn*; for normal accesses, if holds 8.34 + /* For MMIO, the shadow holds the *gfn*; for normal accesses, it holds 8.35 * the equivalent mfn. */ 8.36 if ( mmio ) 8.37 gmfn = _mfn(gfn_x(gfn));
9.1 --- a/xen/arch/x86/mm/shadow/private.h Tue Aug 29 08:09:28 2006 -0600 9.2 +++ b/xen/arch/x86/mm/shadow/private.h Tue Aug 29 08:28:38 2006 -0600 9.3 @@ -555,7 +555,7 @@ vcpu_gfn_to_mfn_nofault(struct vcpu *v, 9.4 return _mfn(gfn); 9.5 9.6 #if CONFIG_PAGING_LEVELS > 2 9.7 - if ( gfn > (RO_MPT_VIRT_END - RO_MPT_VIRT_START) / sizeof(l1_pgentry_t) ) 9.8 + if ( gfn >= (RO_MPT_VIRT_END - RO_MPT_VIRT_START) / sizeof(l1_pgentry_t) ) 9.9 /* This pfn is higher than the p2m map can hold */ 9.10 return _mfn(INVALID_MFN); 9.11 #endif
10.1 --- a/xen/common/perfc.c Tue Aug 29 08:09:28 2006 -0600 10.2 +++ b/xen/common/perfc.c Tue Aug 29 08:28:38 2006 -0600 10.3 @@ -7,6 +7,7 @@ 10.4 #include <xen/spinlock.h> 10.5 #include <xen/mm.h> 10.6 #include <xen/guest_access.h> 10.7 +#include <public/sysctl.h> 10.8 #include <asm/perfc.h> 10.9 10.10 #undef PERFCOUNTER 10.11 @@ -131,12 +132,12 @@ void perfc_reset(unsigned char key) 10.12 arch_perfc_reset (); 10.13 } 10.14 10.15 -static dom0_perfc_desc_t perfc_d[NR_PERFCTRS]; 10.16 -static dom0_perfc_val_t *perfc_vals; 10.17 +static xen_sysctl_perfc_desc_t perfc_d[NR_PERFCTRS]; 10.18 +static xen_sysctl_perfc_val_t *perfc_vals; 10.19 static int perfc_nbr_vals; 10.20 static int perfc_init = 0; 10.21 -static int perfc_copy_info(XEN_GUEST_HANDLE(dom0_perfc_desc_t) desc, 10.22 - XEN_GUEST_HANDLE(dom0_perfc_val_t) val) 10.23 +static int perfc_copy_info(XEN_GUEST_HANDLE_64(xen_sysctl_perfc_desc_t) desc, 10.24 + XEN_GUEST_HANDLE_64(xen_sysctl_perfc_val_t) val) 10.25 { 10.26 unsigned int i, j; 10.27 unsigned int v = 0; 10.28 @@ -171,7 +172,7 @@ static int perfc_copy_info(XEN_GUEST_HAN 10.29 } 10.30 perfc_nbr_vals += perfc_d[i].nr_vals; 10.31 } 10.32 - perfc_vals = xmalloc_array(dom0_perfc_val_t, perfc_nbr_vals); 10.33 + perfc_vals = xmalloc_array(xen_sysctl_perfc_val_t, perfc_nbr_vals); 10.34 perfc_init = 1; 10.35 } 10.36 if (perfc_vals == NULL) 10.37 @@ -206,7 +207,7 @@ static int perfc_copy_info(XEN_GUEST_HAN 10.38 } 10.39 BUG_ON(v != perfc_nbr_vals); 10.40 10.41 - if (copy_to_guest(desc, (dom0_perfc_desc_t *)perfc_d, NR_PERFCTRS)) 10.42 + if (copy_to_guest(desc, (xen_sysctl_perfc_desc_t *)perfc_d, NR_PERFCTRS)) 10.43 return -EFAULT; 10.44 if (copy_to_guest(val, perfc_vals, perfc_nbr_vals)) 10.45 return -EFAULT; 10.46 @@ -214,7 +215,7 @@ static int perfc_copy_info(XEN_GUEST_HAN 10.47 } 10.48 10.49 /* Dom0 control of perf counters */ 10.50 -int perfc_control(dom0_perfccontrol_t *pc) 10.51 +int perfc_control(xen_sysctl_perfc_op_t *pc) 10.52 { 10.53 static DEFINE_SPINLOCK(lock); 10.54 int rc;
11.1 --- a/xen/common/sysctl.c Tue Aug 29 08:09:28 2006 -0600 11.2 +++ b/xen/common/sysctl.c Tue Aug 29 08:28:38 2006 -0600 11.3 @@ -121,10 +121,10 @@ long do_sysctl(XEN_GUEST_HANDLE(xen_sysc 11.4 break; 11.5 11.6 #ifdef PERF_COUNTERS 11.7 - case XEN_SYSCTL_perfccontrol: 11.8 + case XEN_SYSCTL_perfc_op: 11.9 { 11.10 - extern int perfc_control(xen_sysctl_perfccontrol_t *); 11.11 - ret = perfc_control(&op->u.perfccontrol); 11.12 + extern int perfc_control(xen_sysctl_perfc_op_t *); 11.13 + ret = perfc_control(&op->u.perfc_op); 11.14 if ( copy_to_guest(u_sysctl, op, 1) ) 11.15 ret = -EFAULT; 11.16 }
12.1 --- a/xen/include/asm-x86/mm.h Tue Aug 29 08:09:28 2006 -0600 12.2 +++ b/xen/include/asm-x86/mm.h Tue Aug 29 08:28:38 2006 -0600 12.3 @@ -368,7 +368,7 @@ static inline unsigned long get_mfn_from 12.4 int ret; 12.5 12.6 #if CONFIG_PAGING_LEVELS > 2 12.7 - if ( pfn > (RO_MPT_VIRT_END - RO_MPT_VIRT_START) / sizeof (l1_pgentry_t) ) 12.8 + if ( pfn >= (RO_MPT_VIRT_END - RO_MPT_VIRT_START) / sizeof(l1_pgentry_t) ) 12.9 /* This pfn is higher than the p2m map can hold */ 12.10 return INVALID_MFN; 12.11 #endif