ia64/xen-unstable

changeset 16594:5a451d2c36bc

hvm: MTRR MSRs save/restore support.
Signed-off-by: Disheng Su <disheng.su@intel.com>
author Keir Fraser <keir.fraser@citrix.com>
date Wed Dec 12 10:25:18 2007 +0000 (2007-12-12)
parents 8ae3f083490a
children ef83b50fc4a4
files xen/arch/x86/hvm/mtrr.c xen/include/asm-x86/mtrr.h xen/include/public/arch-x86/hvm/save.h
line diff
     1.1 --- a/xen/arch/x86/hvm/mtrr.c	Wed Dec 12 10:22:39 2007 +0000
     1.2 +++ b/xen/arch/x86/hvm/mtrr.c	Wed Dec 12 10:25:18 2007 +0000
     1.3 @@ -769,3 +769,83 @@ int32_t hvm_set_mem_pinned_cacheattr(
     1.4  
     1.5      return 0;
     1.6  }
     1.7 +
     1.8 +static int hvm_save_mtrr_msr(struct domain *d, hvm_domain_context_t *h)
     1.9 +{
    1.10 +    int i;
    1.11 +    struct vcpu *v;
    1.12 +    struct hvm_hw_mtrr hw_mtrr;
    1.13 +    struct mtrr_state *mtrr_state;
    1.14 +    /* save mtrr&pat */
    1.15 +    for_each_vcpu(d, v)
    1.16 +    {
    1.17 +        mtrr_state = &v->arch.hvm_vcpu.mtrr;
    1.18 +
    1.19 +        hw_mtrr.msr_pat_cr = v->arch.hvm_vcpu.pat_cr;
    1.20 +
    1.21 +        hw_mtrr.msr_mtrr_def_type = mtrr_state->def_type
    1.22 +                                | (mtrr_state->enabled << 10);
    1.23 +        hw_mtrr.msr_mtrr_cap = mtrr_state->mtrr_cap;
    1.24 +
    1.25 +        for ( i = 0; i < MTRR_VCNT; i++ )
    1.26 +        {
    1.27 +            /* save physbase */
    1.28 +            hw_mtrr.msr_mtrr_var[i*2] =
    1.29 +                ((uint64_t*)mtrr_state->var_ranges)[i*2];
    1.30 +            /* save physmask */
    1.31 +            hw_mtrr.msr_mtrr_var[i*2+1] =
    1.32 +                ((uint64_t*)mtrr_state->var_ranges)[i*2+1];
    1.33 +        }
    1.34 +
    1.35 +        for ( i = 0; i < NUM_FIXED_MSR; i++ )
    1.36 +            hw_mtrr.msr_mtrr_fixed[i] =
    1.37 +                ((uint64_t*)mtrr_state->fixed_ranges)[i];
    1.38 +
    1.39 +        if ( hvm_save_entry(MTRR, v->vcpu_id, h, &hw_mtrr) != 0 )
    1.40 +            return 1;
    1.41 +    }
    1.42 +    return 0;
    1.43 +}
    1.44 +
    1.45 +static int hvm_load_mtrr_msr(struct domain *d, hvm_domain_context_t *h)
    1.46 +{
    1.47 +    int vcpuid, i;
    1.48 +    struct vcpu *v;
    1.49 +    struct mtrr_state *mtrr_state;
    1.50 +    struct hvm_hw_mtrr hw_mtrr;
    1.51 +
    1.52 +    vcpuid = hvm_load_instance(h);
    1.53 +    if ( vcpuid > MAX_VIRT_CPUS || (v = d->vcpu[vcpuid]) == NULL )
    1.54 +    {
    1.55 +        gdprintk(XENLOG_ERR, "HVM restore: domain has no vcpu %u\n", vcpuid);
    1.56 +        return -EINVAL;
    1.57 +    }
    1.58 +
    1.59 +    if ( hvm_load_entry(MTRR, h, &hw_mtrr) != 0 )
    1.60 +        return -EINVAL;
    1.61 +
    1.62 +    mtrr_state = &v->arch.hvm_vcpu.mtrr;
    1.63 +
    1.64 +    pat_msr_set(&v->arch.hvm_vcpu.pat_cr, hw_mtrr.msr_pat_cr);
    1.65 +
    1.66 +    mtrr_state->mtrr_cap = hw_mtrr.msr_mtrr_cap;
    1.67 +
    1.68 +    for ( i = 0; i < NUM_FIXED_MSR; i++ )
    1.69 +        mtrr_fix_range_msr_set(mtrr_state, i, hw_mtrr.msr_mtrr_fixed[i]);
    1.70 +
    1.71 +    for ( i = 0; i < MTRR_VCNT; i++ )
    1.72 +    {
    1.73 +        mtrr_var_range_msr_set(mtrr_state,
    1.74 +                MTRRphysBase_MSR(i), hw_mtrr.msr_mtrr_var[i*2]);
    1.75 +        mtrr_var_range_msr_set(mtrr_state,
    1.76 +                MTRRphysMask_MSR(i), hw_mtrr.msr_mtrr_var[i*2+1]);
    1.77 +    }
    1.78 +
    1.79 +    mtrr_def_type_msr_set(mtrr_state, hw_mtrr.msr_mtrr_def_type);
    1.80 +
    1.81 +    v->arch.hvm_vcpu.mtrr.is_initialized = 1;
    1.82 +    return 0;
    1.83 +}
    1.84 +
    1.85 +HVM_REGISTER_SAVE_RESTORE(MTRR, hvm_save_mtrr_msr, hvm_load_mtrr_msr,
    1.86 +                          1, HVMSR_PER_VCPU);
     2.1 --- a/xen/include/asm-x86/mtrr.h	Wed Dec 12 10:22:39 2007 +0000
     2.2 +++ b/xen/include/asm-x86/mtrr.h	Wed Dec 12 10:25:18 2007 +0000
     2.3 @@ -47,6 +47,7 @@ struct mtrr_var_range {
     2.4  };
     2.5  
     2.6  #define NUM_FIXED_RANGES 88
     2.7 +#define NUM_FIXED_MSR 11
     2.8  struct mtrr_state {
     2.9  	struct mtrr_var_range *var_ranges;
    2.10  	mtrr_type fixed_ranges[NUM_FIXED_RANGES];
     3.1 --- a/xen/include/public/arch-x86/hvm/save.h	Wed Dec 12 10:22:39 2007 +0000
     3.2 +++ b/xen/include/public/arch-x86/hvm/save.h	Wed Dec 12 10:25:18 2007 +0000
     3.3 @@ -405,9 +405,26 @@ struct hvm_hw_pmtimer {
     3.4  
     3.5  DECLARE_HVM_SAVE_TYPE(PMTIMER, 13, struct hvm_hw_pmtimer);
     3.6  
     3.7 +/*
     3.8 + * MTRR MSRs
     3.9 + */
    3.10 +
    3.11 +struct hvm_hw_mtrr {
    3.12 +#define MTRR_VCNT 8
    3.13 +#define NUM_FIXED_MSR 11
    3.14 +    uint64_t msr_pat_cr;
    3.15 +    /* mtrr physbase & physmask msr pair*/
    3.16 +    uint64_t msr_mtrr_var[MTRR_VCNT*2];
    3.17 +    uint64_t msr_mtrr_fixed[NUM_FIXED_MSR];
    3.18 +    uint64_t msr_mtrr_cap;
    3.19 +    uint64_t msr_mtrr_def_type;
    3.20 +};
    3.21 +
    3.22 +DECLARE_HVM_SAVE_TYPE(MTRR, 14, struct hvm_hw_mtrr);
    3.23 +
    3.24  /* 
    3.25   * Largest type-code in use
    3.26   */
    3.27 -#define HVM_SAVE_CODE_MAX 13
    3.28 +#define HVM_SAVE_CODE_MAX 14
    3.29  
    3.30  #endif /* __XEN_PUBLIC_HVM_SAVE_X86_H__ */