ia64/xen-unstable

changeset 14943:59ea9dadfd07

hvm vmx: Only use TPR_SHADOW feature if supported.
Signed-off-by: Keir Fraser <keir@xensource.com>
author Keir Fraser <keir@xensource.com>
date Wed Apr 25 22:06:13 2007 +0100 (2007-04-25)
parents 2b09108f365e
children 55d0a5c70986
files xen/arch/x86/hvm/vmx/vmcs.c xen/include/asm-x86/hvm/vmx/vmcs.h
line diff
     1.1 --- a/xen/arch/x86/hvm/vmx/vmcs.c	Wed Apr 25 18:12:03 2007 +0100
     1.2 +++ b/xen/arch/x86/hvm/vmx/vmcs.c	Wed Apr 25 22:06:13 2007 +0100
     1.3 @@ -45,9 +45,9 @@ u32 vmx_vmentry_control;
     1.4  
     1.5  static u32 vmcs_revision_id;
     1.6  
     1.7 -static u32 adjust_vmx_controls(u32 ctl_min, u32 ctl_max, u32 msr)
     1.8 +static u32 adjust_vmx_controls(u32 ctl_min, u32 ctl_opt, u32 msr)
     1.9  {
    1.10 -    u32 vmx_msr_low, vmx_msr_high, ctl = ctl_max;
    1.11 +    u32 vmx_msr_low, vmx_msr_high, ctl = ctl_min | ctl_opt;
    1.12  
    1.13      rdmsr(msr, vmx_msr_low, vmx_msr_high);
    1.14  
    1.15 @@ -56,46 +56,55 @@ static u32 adjust_vmx_controls(u32 ctl_m
    1.16  
    1.17      /* Ensure minimum (required) set of control bits are supported. */
    1.18      BUG_ON(ctl_min & ~ctl);
    1.19 -    BUG_ON(ctl_min & ~ctl_max);
    1.20  
    1.21      return ctl;
    1.22  }
    1.23  
    1.24  void vmx_init_vmcs_config(void)
    1.25  {
    1.26 -    u32 vmx_msr_low, vmx_msr_high, min, max;
    1.27 +    u32 vmx_msr_low, vmx_msr_high, min, opt;
    1.28      u32 _vmx_pin_based_exec_control;
    1.29      u32 _vmx_cpu_based_exec_control;
    1.30      u32 _vmx_vmexit_control;
    1.31      u32 _vmx_vmentry_control;
    1.32  
    1.33 -    min = max = PIN_BASED_EXT_INTR_MASK | PIN_BASED_NMI_EXITING;
    1.34 +    min = PIN_BASED_EXT_INTR_MASK | PIN_BASED_NMI_EXITING;
    1.35 +    opt = 0;
    1.36      _vmx_pin_based_exec_control = adjust_vmx_controls(
    1.37 -        min, max, MSR_IA32_VMX_PINBASED_CTLS_MSR);
    1.38 +        min, opt, MSR_IA32_VMX_PINBASED_CTLS_MSR);
    1.39  
    1.40 -    min = max = (CPU_BASED_HLT_EXITING |
    1.41 -                 CPU_BASED_INVDPG_EXITING |
    1.42 -                 CPU_BASED_MWAIT_EXITING |
    1.43 -                 CPU_BASED_MOV_DR_EXITING |
    1.44 -                 CPU_BASED_ACTIVATE_IO_BITMAP |
    1.45 -                 CPU_BASED_USE_TSC_OFFSETING);
    1.46 +    min = (CPU_BASED_HLT_EXITING |
    1.47 +           CPU_BASED_INVDPG_EXITING |
    1.48 +           CPU_BASED_MWAIT_EXITING |
    1.49 +           CPU_BASED_MOV_DR_EXITING |
    1.50 +           CPU_BASED_ACTIVATE_IO_BITMAP |
    1.51 +           CPU_BASED_USE_TSC_OFFSETING);
    1.52 +    opt = CPU_BASED_ACTIVATE_MSR_BITMAP;
    1.53 +#ifdef __x86_64__
    1.54 +    opt |= CPU_BASED_TPR_SHADOW;
    1.55 +#endif
    1.56 +    _vmx_cpu_based_exec_control = adjust_vmx_controls(
    1.57 +        min, opt, MSR_IA32_VMX_PROCBASED_CTLS_MSR);
    1.58  #ifdef __x86_64__
    1.59 -    min = max |= CPU_BASED_CR8_LOAD_EXITING | CPU_BASED_CR8_STORE_EXITING;
    1.60 +    if ( !(_vmx_cpu_based_exec_control & CPU_BASED_TPR_SHADOW) )
    1.61 +    {
    1.62 +        min |= CPU_BASED_CR8_LOAD_EXITING | CPU_BASED_CR8_STORE_EXITING;
    1.63 +        _vmx_cpu_based_exec_control = adjust_vmx_controls(
    1.64 +            min, opt, MSR_IA32_VMX_PROCBASED_CTLS_MSR);
    1.65 +    }
    1.66  #endif
    1.67 -    max |= CPU_BASED_ACTIVATE_MSR_BITMAP;
    1.68 -    _vmx_cpu_based_exec_control = adjust_vmx_controls(
    1.69 -        min, max, MSR_IA32_VMX_PROCBASED_CTLS_MSR);
    1.70  
    1.71 -    min = max = VM_EXIT_ACK_INTR_ON_EXIT;
    1.72 +    min = VM_EXIT_ACK_INTR_ON_EXIT;
    1.73 +    opt = 0;
    1.74  #ifdef __x86_64__
    1.75 -    min = max |= VM_EXIT_IA32E_MODE;
    1.76 +    min |= VM_EXIT_IA32E_MODE;
    1.77  #endif
    1.78      _vmx_vmexit_control = adjust_vmx_controls(
    1.79 -        min, max, MSR_IA32_VMX_EXIT_CTLS_MSR);
    1.80 +        min, opt, MSR_IA32_VMX_EXIT_CTLS_MSR);
    1.81  
    1.82 -    min = max = 0;
    1.83 +    min = opt = 0;
    1.84      _vmx_vmentry_control = adjust_vmx_controls(
    1.85 -        min, max, MSR_IA32_VMX_ENTRY_CTLS_MSR);
    1.86 +        min, opt, MSR_IA32_VMX_ENTRY_CTLS_MSR);
    1.87  
    1.88      rdmsr(MSR_IA32_VMX_BASIC_MSR, vmx_msr_low, vmx_msr_high);
    1.89  
    1.90 @@ -414,13 +423,12 @@ static void construct_vmcs(struct vcpu *
    1.91  
    1.92  #ifdef __x86_64__ 
    1.93      /* VLAPIC TPR optimisation. */
    1.94 -    v->arch.hvm_vcpu.u.vmx.exec_control |= CPU_BASED_TPR_SHADOW;
    1.95 -    v->arch.hvm_vcpu.u.vmx.exec_control &=
    1.96 -        ~(CPU_BASED_CR8_STORE_EXITING | CPU_BASED_CR8_LOAD_EXITING);
    1.97 -    __vmwrite(CPU_BASED_VM_EXEC_CONTROL, v->arch.hvm_vcpu.u.vmx.exec_control);
    1.98 -    __vmwrite(VIRTUAL_APIC_PAGE_ADDR,
    1.99 -              page_to_maddr(vcpu_vlapic(v)->regs_page));
   1.100 -    __vmwrite(TPR_THRESHOLD, 0);
   1.101 +    if ( cpu_has_vmx_tpr_shadow )
   1.102 +    {
   1.103 +        __vmwrite(VIRTUAL_APIC_PAGE_ADDR,
   1.104 +                  page_to_maddr(vcpu_vlapic(v)->regs_page));
   1.105 +        __vmwrite(TPR_THRESHOLD, 0);
   1.106 +    }
   1.107  #endif
   1.108  
   1.109      __vmwrite(GUEST_LDTR_SELECTOR, 0);
     2.1 --- a/xen/include/asm-x86/hvm/vmx/vmcs.h	Wed Apr 25 18:12:03 2007 +0100
     2.2 +++ b/xen/include/asm-x86/hvm/vmx/vmcs.h	Wed Apr 25 22:06:13 2007 +0100
     2.3 @@ -119,6 +119,8 @@ extern u32 vmx_vmexit_control;
     2.4  #define VM_ENTRY_DEACT_DUAL_MONITOR     0x00000800
     2.5  extern u32 vmx_vmentry_control;
     2.6  
     2.7 +#define cpu_has_vmx_tpr_shadow \
     2.8 +    (vmx_cpu_based_exec_control & CPU_BASED_TPR_SHADOW)
     2.9  #define cpu_has_vmx_msr_bitmap \
    2.10      (vmx_cpu_based_exec_control & CPU_BASED_ACTIVATE_MSR_BITMAP)
    2.11  extern char *vmx_msr_bitmap;