ia64/xen-unstable

changeset 17959:57f309919832

ioemu: Explicitly define certain PCI/MSI macros.
From: Haitao Shan <haitao.shan@intel.com>
Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
author Keir Fraser <keir.fraser@citrix.com>
date Thu Jul 03 10:59:43 2008 +0100 (2008-07-03)
parents 3f3510b35268
children bad432c58f03
files tools/ioemu/hw/pt-msi.h
line diff
     1.1 --- a/tools/ioemu/hw/pt-msi.h	Thu Jul 03 10:57:51 2008 +0100
     1.2 +++ b/tools/ioemu/hw/pt-msi.h	Thu Jul 03 10:59:43 2008 +0100
     1.3 @@ -2,10 +2,32 @@
     1.4  #define _PT_MSI_H
     1.5  
     1.6  #include "vl.h"
     1.7 -#include "pci/header.h"
     1.8  #include "pci/pci.h"
     1.9  #include "pass-through.h"
    1.10  
    1.11 +#define  PCI_CAP_ID_MSI     0x05    /* Message Signalled Interrupts */
    1.12 +#define  PCI_CAP_ID_MSIX    0x11    /* MSI-X */
    1.13 +
    1.14 +/* Message Signalled Interrupts registers */
    1.15 +#define PCI_MSI_FLAGS       2   /* Various flags */
    1.16 +#define  PCI_MSI_FLAGS_64BIT    0x80    /* 64-bit addresses allowed */
    1.17 +#define  PCI_MSI_FLAGS_QSIZE    0x70    /* Message queue size configured */
    1.18 +#define  PCI_MSI_FLAGS_QMASK    0x0e    /* Maximum queue size available */
    1.19 +#define  PCI_MSI_FLAGS_ENABLE   0x01    /* MSI feature enabled */
    1.20 +#define PCI_MSI_RFU         3   /* Rest of capability flags */
    1.21 +#define PCI_MSI_ADDRESS_LO  4   /* Lower 32 bits */
    1.22 +#define PCI_MSI_ADDRESS_HI  8   /* Upper 32 bits (if PCI_MSI_FLAGS_64BIT set) */
    1.23 +#define PCI_MSI_DATA_32     8   /* 16 bits of data for 32-bit devices */
    1.24 +#define PCI_MSI_DATA_64     12  /* 16 bits of data for 64-bit devices */
    1.25 +
    1.26 +/* MSI-X */
    1.27 +#define  PCI_MSIX_ENABLE    0x8000
    1.28 +#define  PCI_MSIX_MASK      0x4000
    1.29 +#define  PCI_MSIX_TABSIZE   0x03ff
    1.30 +#define PCI_MSIX_TABLE      4
    1.31 +#define PCI_MSIX_PBA        8
    1.32 +#define  PCI_MSIX_BIR       0x7
    1.33 +
    1.34  #define MSI_FLAG_UNINIT 0x1000
    1.35  #define PT_MSI_MAPPED   0x2000
    1.36  
    1.37 @@ -29,7 +51,7 @@
    1.38     + */
    1.39  
    1.40  #define MSI_ADDR_HEADER                0xfee00000
    1.41 -#define MSI_TARGET_CPU_SHIFT   	       12
    1.42 +#define MSI_TARGET_CPU_SHIFT           12
    1.43  
    1.44  #define MSI_ADDR_DESTID_MASK           0xfff0000f
    1.45  #define     MSI_ADDR_DESTID_CPU(cpu)   ((cpu) << MSI_TARGET_CPU_SHIFT)