ia64/xen-unstable

changeset 15708:52e5c110aadb

[HVM] Yet another MCA/MCE MSR.
Signed-off-by: Tim Deegan <Tim.Deegan@xensource.com>
author Tim Deegan <Tim.Deegan@xensource.com>
date Fri Aug 03 12:10:35 2007 +0100 (2007-08-03)
parents a451b0ab40d9
children cb3e6fcb7f34
files xen/arch/x86/hvm/svm/svm.c xen/arch/x86/hvm/vmx/vmx.c xen/include/asm-x86/msr.h
line diff
     1.1 --- a/xen/arch/x86/hvm/svm/svm.c	Fri Aug 03 09:04:29 2007 +0100
     1.2 +++ b/xen/arch/x86/hvm/svm/svm.c	Fri Aug 03 12:10:35 2007 +0100
     1.3 @@ -2159,6 +2159,7 @@ static void svm_do_msr_access(
     1.4          case MSR_K8_MC2_STATUS:
     1.5          case MSR_K8_MC3_STATUS:
     1.6          case MSR_K8_MC4_STATUS:
     1.7 +        case MSR_K8_MC5_STATUS:
     1.8              /* No point in letting the guest see real MCEs */
     1.9              msr_content = 0;
    1.10              break;
     2.1 --- a/xen/arch/x86/hvm/vmx/vmx.c	Fri Aug 03 09:04:29 2007 +0100
     2.2 +++ b/xen/arch/x86/hvm/vmx/vmx.c	Fri Aug 03 12:10:35 2007 +0100
     2.3 @@ -2596,6 +2596,7 @@ static int vmx_do_msr_read(struct cpu_us
     2.4      case MSR_K8_MC2_STATUS:
     2.5      case MSR_K8_MC3_STATUS:
     2.6      case MSR_K8_MC4_STATUS:
     2.7 +    case MSR_K8_MC5_STATUS:
     2.8          /* No point in letting the guest see real MCEs */
     2.9          msr_content = 0;
    2.10          break;
     3.1 --- a/xen/include/asm-x86/msr.h	Fri Aug 03 09:04:29 2007 +0100
     3.2 +++ b/xen/include/asm-x86/msr.h	Fri Aug 03 12:10:35 2007 +0100
     3.3 @@ -240,6 +240,11 @@ static inline void write_efer(__u64 val)
     3.4  #define MSR_K8_MC4_ADDR			0x412
     3.5  #define MSR_K8_MC4_MISC			0x413
     3.6  
     3.7 +#define MSR_K8_MC5_CTL			0x414
     3.8 +#define MSR_K8_MC5_STATUS		0x415
     3.9 +#define MSR_K8_MC5_ADDR			0x416
    3.10 +#define MSR_K8_MC5_MISC			0x417
    3.11 +
    3.12  /* Pentium IV performance counter MSRs */
    3.13  #define MSR_P4_BPU_PERFCTR0 		0x300
    3.14  #define MSR_P4_BPU_PERFCTR1 		0x301