ia64/xen-unstable

changeset 1463:50df23f1e00d

bitkeeper revision 1.955.1.4 (40ca25caD-WBu24eVfed1yswCl7JeQ)

Many files:
More x86_64 stuff.
pda.h:
Rename: xen/include/asm-x86/x86_64/pda.h -> xen/include/asm-x86/pda.h
.del-config.h~ab742eeb14ad808f:
Delete: xen/include/asm-x86/x86_64/config.h
arch-x86_32.h:
Rename: xen/include/hypervisor-ifs/arch_x86_32.h -> xen/include/hypervisor-ifs/arch-x86_32.h
arch-x86_64.h:
Rename: xen/include/hypervisor-ifs/arch_x86_64.h -> xen/include/hypervisor-ifs/arch-x86_64.h
arch_x86_32.h:
Rename: xen/include/hypervisor-ifs/arch-x86/hypervisor-if.h -> xen/include/hypervisor-ifs/arch_x86_32.h
arch_x86_64.h:
Rename: xen/include/hypervisor-ifs/arch-x86_64/hypervisor-if.h -> xen/include/hypervisor-ifs/arch_x86_64.h
author kaf24@scramble.cl.cam.ac.uk
date Fri Jun 11 21:36:10 2004 +0000 (2004-06-11)
parents 6f83c243b6fb
children 2c6f86e0083e
files .rootkeys linux-2.4.26-xen-sparse/arch/xen/Makefile xen/Makefile xen/arch/x86/Rules.mk xen/arch/x86/mm.c xen/common/domain.c xen/include/asm-x86/config.h xen/include/asm-x86/msr.h xen/include/asm-x86/pda.h xen/include/asm-x86/smp.h xen/include/asm-x86/string.h xen/include/asm-x86/system.h xen/include/asm-x86/types.h xen/include/asm-x86/x86_64/config.h xen/include/asm-x86/x86_64/pda.h xen/include/hypervisor-ifs/arch-x86/hypervisor-if.h xen/include/hypervisor-ifs/arch-x86_32.h xen/include/hypervisor-ifs/arch-x86_64.h xen/include/hypervisor-ifs/arch-x86_64/hypervisor-if.h xen/include/hypervisor-ifs/hypervisor-if.h
line diff
     1.1 --- a/.rootkeys	Fri Jun 11 18:32:46 2004 +0000
     1.2 +++ b/.rootkeys	Fri Jun 11 21:36:10 2004 +0000
     1.3 @@ -425,6 +425,7 @@ 3ddb79c2wa0dA_LGigxOelSGbJ284Q xen/inclu
     1.4  3ddb79c3xjYnrv5t3VqYlR4tNEOl4Q xen/include/asm-x86/page.h
     1.5  3e450943kzme29HPCtq5HNOVQkddfw xen/include/asm-x86/param.h
     1.6  3ddb79c3ysKUbxZuwKBRK3WXU2TlEg xen/include/asm-x86/pci.h
     1.7 +404f1bb41Yl-5ZjIWnG66HDCj6OIWA xen/include/asm-x86/pda.h
     1.8  4022a73diKn2Ax4-R4gzk59lm1YdDg xen/include/asm-x86/pdb.h
     1.9  3ddb79c2QF5-pZGzuX4QukPCDAl59A xen/include/asm-x86/processor.h
    1.10  3ddb79c3mbqEM7QQr3zVq7NiBNhouA xen/include/asm-x86/ptrace.h
    1.11 @@ -440,18 +441,16 @@ 3e450943TfE-iovQIY_tMO_VdGsPhA xen/inclu
    1.12  3ddb79c4HugMq7IYGxcQKFBpKwKhzA xen/include/asm-x86/types.h
    1.13  3ddb79c3M2n1ROZH6xk3HbyN4CPDqg xen/include/asm-x86/uaccess.h
    1.14  3ddb79c3uPGcP_l_2xyGgBSWd5aC-Q xen/include/asm-x86/unaligned.h
    1.15 -404f1b9b_phpQlRnyiWqP6RodfZDpg xen/include/asm-x86/x86_64/config.h
    1.16  404f1b9ceJeGVaPNIENm2FkK0AgEOQ xen/include/asm-x86/x86_64/current.h
    1.17  404f1b9fl6AQ_a-T1TDK3fuwTPXmHw xen/include/asm-x86/x86_64/desc.h
    1.18  404f1badfXZJZ2sU8sh9PS2EZvd19Q xen/include/asm-x86/x86_64/ldt.h
    1.19  404f1bb1LSCqrMDSfRAti5NdMQPJBQ xen/include/asm-x86/x86_64/page.h
    1.20 -404f1bb41Yl-5ZjIWnG66HDCj6OIWA xen/include/asm-x86/x86_64/pda.h
    1.21  404f1bb756fZfxk5HDx7J7BW3R-1jQ xen/include/asm-x86/x86_64/processor.h
    1.22  404f1bb86rAXB3aLS1vYdcqpJiEcyg xen/include/asm-x86/x86_64/ptrace.h
    1.23  404f1bc4tWkB9Qr8RkKtZGW5eMQzhw xen/include/asm-x86/x86_64/uaccess.h
    1.24  400304fcmRQmDdFYEzDh0wcBba9alg xen/include/hypervisor-ifs/COPYING
    1.25 -404f1bc68SXxmv0zQpXBWGrCzSyp8w xen/include/hypervisor-ifs/arch-x86/hypervisor-if.h
    1.26 -404f1bc7IwU-qnH8mJeVu0YsNGMrcw xen/include/hypervisor-ifs/arch-x86_64/hypervisor-if.h
    1.27 +404f1bc68SXxmv0zQpXBWGrCzSyp8w xen/include/hypervisor-ifs/arch-x86_32.h
    1.28 +404f1bc7IwU-qnH8mJeVu0YsNGMrcw xen/include/hypervisor-ifs/arch-x86_64.h
    1.29  3ddb79c2PMeWTK86y4C3F4MzHw4A1g xen/include/hypervisor-ifs/dom0_ops.h
    1.30  403cd194j2pyLqXD8FJ-ukvZzkPenw xen/include/hypervisor-ifs/event_channel.h
    1.31  3ddb79c25UE59iu4JJcbRalx95mvcg xen/include/hypervisor-ifs/hypervisor-if.h
     2.1 --- a/linux-2.4.26-xen-sparse/arch/xen/Makefile	Fri Jun 11 18:32:46 2004 +0000
     2.2 +++ b/linux-2.4.26-xen-sparse/arch/xen/Makefile	Fri Jun 11 21:36:10 2004 +0000
     2.3 @@ -115,9 +115,6 @@ archclean:
     2.4  	@$(MAKEBOOT) clean
     2.5  
     2.6  archmrproper:
     2.7 -	rm -f include/asm-xen/hypervisor-ifs/arch
     2.8  
     2.9  archdep:
    2.10 -	rm -f include/asm-xen/hypervisor-ifs/arch
    2.11 -	( cd include/asm-xen/hypervisor-ifs ; rm -rf arch ; ln -sf arch-x86 arch)
    2.12  	@$(MAKEBOOT) dep
     3.1 --- a/xen/Makefile	Fri Jun 11 18:32:46 2004 +0000
     3.2 +++ b/xen/Makefile	Fri Jun 11 21:36:10 2004 +0000
     3.3 @@ -41,10 +41,9 @@ clean: delete-links
     3.4  
     3.5  make-links: delete-links
     3.6  	ln -sf asm-$(TARGET_ARCH) include/asm
     3.7 -	ln -sf arch-$(TARGET_ARCH) include/hypervisor-ifs/arch
     3.8  
     3.9  delete-links:
    3.10 -	rm -f include/asm include/hypervisor-ifs/arch
    3.11 +	rm -f include/asm
    3.12  
    3.13  # Blow away kernel.o because build info is stored statically within it.
    3.14  delete-unfresh-files:
     4.1 --- a/xen/arch/x86/Rules.mk	Fri Jun 11 18:32:46 2004 +0000
     4.2 +++ b/xen/arch/x86/Rules.mk	Fri Jun 11 21:36:10 2004 +0000
     4.3 @@ -13,7 +13,7 @@ LOAD_BASE    := 0x00100000
     4.4  CFLAGS  := -nostdinc -fno-builtin -fno-common -fno-strict-aliasing -O3
     4.5  CFLAGS  += -iwithprefix include -Wall -Werror -DMONITOR_BASE=$(MONITOR_BASE)
     4.6  CFLAGS  += -fomit-frame-pointer -I$(BASEDIR)/include -D__KERNEL__
     4.7 -CFLAGS  += -Wno-pointer-arith -Wredundant-decls -D$(TARGET_SUBARCH)
     4.8 +CFLAGS  += -Wno-pointer-arith -Wredundant-decls
     4.9  
    4.10  LDFLAGS := -T xen.lds -N 
    4.11  
    4.12 @@ -24,5 +24,5 @@ endif
    4.13  
    4.14  ifeq ($(TARGET_SUBARCH),x86_64)
    4.15  CFLAGS += -m64
    4.16 -LDARCHFLAGS :=
    4.17 +LDARCHFLAGS := --oformat elf64-x86-64
    4.18  endif
     5.1 --- a/xen/arch/x86/mm.c	Fri Jun 11 18:32:46 2004 +0000
     5.2 +++ b/xen/arch/x86/mm.c	Fri Jun 11 21:36:10 2004 +0000
     5.3 @@ -103,10 +103,10 @@ void __init paging_init(void)
     5.4          mk_l2_pgentry(__pa(ioremap_pt) | __PAGE_HYPERVISOR);
     5.5  
     5.6      /* Create read-only mapping of MPT for guest-OS use. */
     5.7 -    idle_pg_table[READONLY_MPT_VIRT_START >> L2_PAGETABLE_SHIFT] =
     5.8 +    idle_pg_table[RO_MPT_VIRT_START >> L2_PAGETABLE_SHIFT] =
     5.9          idle_pg_table[RDWR_MPT_VIRT_START >> L2_PAGETABLE_SHIFT];
    5.10      mk_l2_readonly(idle_pg_table + 
    5.11 -                   (READONLY_MPT_VIRT_START >> L2_PAGETABLE_SHIFT));
    5.12 +                   (RO_MPT_VIRT_START >> L2_PAGETABLE_SHIFT));
    5.13  
    5.14      /* Set up mapping cache for domain pages. */
    5.15      mapcache = (unsigned long *)get_free_page(GFP_KERNEL);
     6.1 --- a/xen/common/domain.c	Fri Jun 11 18:32:46 2004 +0000
     6.2 +++ b/xen/common/domain.c	Fri Jun 11 21:36:10 2004 +0000
     6.3 @@ -19,7 +19,7 @@
     6.4  #include <asm/i387.h>
     6.5  #include <xen/shadow.h>
     6.6  
     6.7 -#ifdef CONFIG_X86_64BITMODE
     6.8 +#if defined(__x86_64__)
     6.9  #define ELFSIZE 64
    6.10  #else
    6.11  #define ELFSIZE 32
     7.1 --- a/xen/include/asm-x86/config.h	Fri Jun 11 18:32:46 2004 +0000
     7.2 +++ b/xen/include/asm-x86/config.h	Fri Jun 11 21:36:10 2004 +0000
     7.3 @@ -43,29 +43,131 @@
     7.4  
     7.5  #define CONFIG_XEN_ATTENTION_KEY 1
     7.6  
     7.7 -
     7.8  #define HZ 100
     7.9  
    7.10  /*
    7.11   * Just to keep compiler happy.
    7.12   * NB. DO NOT CHANGE SMP_CACHE_BYTES WITHOUT FIXING arch/i386/entry.S!!!
    7.13   * It depends on size of irq_cpustat_t, for example, being 64 bytes. :-)
    7.14 - * Mmmm... so niiiiiice....
    7.15   */
    7.16  #define SMP_CACHE_BYTES 64
    7.17  #define NR_CPUS 16
    7.18  #define __cacheline_aligned __attribute__((__aligned__(SMP_CACHE_BYTES)))
    7.19  #define ____cacheline_aligned __cacheline_aligned
    7.20  
    7.21 -/*** Hypervisor owns top 64MB of virtual address space. ***/
    7.22 +/*
    7.23 + * Amount of slack domain memory to leave in system, in megabytes.
    7.24 + * Prevents a hard out-of-memory crunch for things like network receive.
    7.25 + */
    7.26 +#define SLACK_DOMAIN_MEM_KILOBYTES 2048
    7.27 +
    7.28 +/* Linkage for x86 */
    7.29 +#define FASTCALL(x)     x __attribute__((regparm(3)))
    7.30 +#define asmlinkage        __attribute__((regparm(0)))
    7.31 +#define __ALIGN .align 16,0x90
    7.32 +#define __ALIGN_STR ".align 16,0x90"
    7.33 +#define SYMBOL_NAME_STR(X) #X
    7.34 +#define SYMBOL_NAME(X) X
    7.35 +#define SYMBOL_NAME_LABEL(X) X##:
    7.36 +#ifdef __ASSEMBLY__
    7.37 +#define ALIGN __ALIGN
    7.38 +#define ALIGN_STR __ALIGN_STR
    7.39 +#define ENTRY(name) \
    7.40 +  .globl SYMBOL_NAME(name); \
    7.41 +  ALIGN; \
    7.42 +  SYMBOL_NAME_LABEL(name)
    7.43 +#endif
    7.44 +
    7.45 +#define barrier() __asm__ __volatile__("": : :"memory")
    7.46 +
    7.47 +#define NR_syscalls 256
    7.48 +
    7.49 +#ifndef NDEBUG
    7.50 +#define MEMORY_GUARD
    7.51 +#endif
    7.52 +
    7.53 +#ifndef __ASSEMBLY__
    7.54 +extern unsigned long _end; /* standard ELF symbol */
    7.55 +extern void __out_of_line_bug(int line) __attribute__((noreturn));
    7.56 +#define out_of_line_bug() __out_of_line_bug(__LINE__)
    7.57 +#endif /* __ASSEMBLY__ */
    7.58 +
    7.59 +#if defined(__x86_64__)
    7.60 +
    7.61 +#define PML4_ENTRY_BITS  39
    7.62 +#define PML4_ENTRY_BYTES (1<<PML4_ENTRY_BITS)
    7.63 +
    7.64 +/*
    7.65 + * Memory layout:
    7.66 + *  0x0000000000000000 - 0x00007fffffffffff [128TB, 2^47 bytes, PML4:0-255]
    7.67 + *    Guest-defined use.
    7.68 + *  0x0000800000000000 - 0xffff7fffffffffff [16EB]
    7.69 + *    Inaccessible: current arch only supports 48-bit sign-extended VAs.
    7.70 + *  0xffff800000000000 - 0xffff803fffffffff [256GB, 2^38 bytes, PML4:256]
    7.71 + *    Read-only machine-to-phys translation table (GUEST ACCESSIBLE).
    7.72 + *  0xffff804000000000 - 0xffff807fffffffff [256GB, 2^38 bytes, PML4:256]
    7.73 + *    Reserved for future shared info with the guest OS (GUEST ACCESSIBLE).
    7.74 + *  0xffff808000000000 - 0xffff80ffffffffff [512GB, 2^39 bytes, PML4:257]
    7.75 + *    Read-only guest linear page table (GUEST ACCESSIBLE).
    7.76 + *  0xffff810000000000 - 0xffff817fffffffff [512GB, 2^39 bytes, PML4:258]
    7.77 + *    Guest linear page table.
    7.78 + *  0xffff818000000000 - 0xffff81ffffffffff [512GB, 2^39 bytes, PML4:259]
    7.79 + *    Shadow linear page table.
    7.80 + *  0xffff820000000000 - 0xffff827fffffffff [512GB, 2^39 bytes, PML4:260]
    7.81 + *    Per-domain mappings (e.g., GDT, LDT).
    7.82 + *  0xffff828000000000 - 0xffff8287ffffffff [512GB, 2^39 bytes, PML4:261]
    7.83 + *    Reserved for future use.
    7.84 + *  0xffff830000000000 - 0xffff83ffffffffff [1TB,   2^40 bytes, PML4:262-263]
    7.85 + *    1:1 direct mapping of all physical memory. Xen and its heap live here.
    7.86 + *  0xffff840000000000 - 0xffff87ffffffffff [4TB,   2^42 bytes, PML4:264-271]
    7.87 + *    Reserved for future use.
    7.88 + *  0xffff880000000000 - 0xffffffffffffffff [120TB, PML4:272-511]
    7.89 + *    Guest-defined use.
    7.90 + */
    7.91 +
    7.92 +/* Hypervisor reserves PML4 slots 256 to 271 inclusive. */
    7.93 +#define HYPERVISOR_VIRT_START   (0xFFFF800000000000UL)
    7.94 +#define HYPERVISOR_VIRT_END     (0xFFFF880000000000UL)
    7.95 +/* Slot 256: read-only guest-accessible machine-to-phys translation table. */
    7.96 +#define RO_MPT_VIRT_START       (HYPERVISOR_VIRT_START)
    7.97 +#define RO_MPT_VIRT_END         (RO_MPT_VIRT_START + PML4_ENTRY_BYTES/2)
    7.98 +/* Slot 257: read-only guest-accessible linear page table. */
    7.99 +#define RO_LINEAR_PT_VIRT_START (RO_MPT_VIRT_END + PML4_ENTRY_BYTES/2)
   7.100 +#define RO_LINEAR_PT_VIRT_END   (RO_LINEAR_PT_VIRT_START + PML4_ENTRY_BYTES)
   7.101 +/* Slot 258: linear page table (guest table). */
   7.102 +#define LINEAR_PT_VIRT_START    (RO_LINEAR_PT_VIRT_END)
   7.103 +#define LINEAR_PT_VIRT_END      (LINEAR_PT_VIRT_START + PML4_ENTRY_BYTES)
   7.104 +/* Slot 259: linear page table (shadow table). */
   7.105 +#define SH_LINEAR_PT_VIRT_START (LINEAR_PT_VIRT_END)
   7.106 +#define SH_LINEAR_PT_VIRT_END   (SH_LINEAR_PT_VIRT_START + PML4_ENTRY_BYTES)
   7.107 +/* Slot 260: per-domain mappings. */
   7.108 +#define PERDOMAIN_VIRT_START    (SH_LINEAR_PT_VIRT_END)
   7.109 +#define PERDOMAIN_VIRT_END      (PERDOMAIN_VIRT_START + PML4_ENTRY_BYTES)
   7.110 +/* Slot 262-263: A direct 1:1 mapping of all of physical memory. */
   7.111 +#define DIRECTMAP_VIRT_START    (PERDOMAIN_VIRT_END + PML4_ENTRY_BYTES)
   7.112 +#define DIRECTMAP_VIRT_END      (DIRECTMAP_VIRT_START + PML4_ENTRY_BYTES*2)
   7.113 +
   7.114 +#define PGT_base_page_table PGT_l4_page_table
   7.115 +
   7.116 +#define __HYPERVISOR_CS64 0x0810
   7.117 +#define __HYPERVISOR_CS32 0x0808
   7.118 +#define __HYPERVISOR_DS 0x0818
   7.119 +
   7.120 +/* For generic assembly code: use macros to define operation/operand sizes. */
   7.121 +#define __OS "q"  /* Operation Suffix */
   7.122 +#define __OP "r"  /* Operand Prefix */
   7.123 +
   7.124 +#elif defined(__i386__)
   7.125 +
   7.126 +/* Hypervisor owns top 64MB of virtual address space. */
   7.127  #define HYPERVISOR_VIRT_START (0xFC000000UL)
   7.128  
   7.129  /*
   7.130   * First 4MB are mapped read-only for all. It's for the machine->physical
   7.131   * mapping table (MPT table). The following are virtual addresses.
   7.132   */
   7.133 -#define READONLY_MPT_VIRT_START (HYPERVISOR_VIRT_START)
   7.134 -#define READONLY_MPT_VIRT_END   (READONLY_MPT_VIRT_START + (4*1024*1024))
   7.135 +#define RO_MPT_VIRT_START     (HYPERVISOR_VIRT_START)
   7.136 +#define RO_MPT_VIRT_END       (RO_MPT_VIRT_START + (4*1024*1024))
   7.137  /*
   7.138   * Next 12MB is fixed monitor space, which is part of a 40MB direct-mapped
   7.139   * memory region. The following are machine addresses.
   7.140 @@ -73,7 +175,7 @@
   7.141  #define MAX_MONITOR_ADDRESS   (12*1024*1024)
   7.142  #define MAX_DIRECTMAP_ADDRESS (40*1024*1024)
   7.143  /* And the virtual addresses for the direct-map region... */
   7.144 -#define DIRECTMAP_VIRT_START  (READONLY_MPT_VIRT_END)
   7.145 +#define DIRECTMAP_VIRT_START  (RO_MPT_VIRT_END)
   7.146  #define DIRECTMAP_VIRT_END    (DIRECTMAP_VIRT_START + MAX_DIRECTMAP_ADDRESS)
   7.147  #define MONITOR_VIRT_START    (DIRECTMAP_VIRT_START)
   7.148  #define MONITOR_VIRT_END      (MONITOR_VIRT_START + MAX_MONITOR_ADDRESS)
   7.149 @@ -101,50 +203,15 @@
   7.150  #define IOREMAP_VIRT_START    (MAPCACHE_VIRT_END)
   7.151  #define IOREMAP_VIRT_END      (IOREMAP_VIRT_START + (4*1024*1024))
   7.152  
   7.153 -/*
   7.154 - * Amount of slack domain memory to leave in system, in megabytes.
   7.155 - * Prevents a hard out-of-memory crunch for thinsg like network receive.
   7.156 - */
   7.157 -#define SLACK_DOMAIN_MEM_KILOBYTES 2048
   7.158 -
   7.159 -/* Linkage for x86 */
   7.160 -#define FASTCALL(x)     x __attribute__((regparm(3)))
   7.161 -#define asmlinkage        __attribute__((regparm(0)))
   7.162 -#define __ALIGN .align 16,0x90
   7.163 -#define __ALIGN_STR ".align 16,0x90"
   7.164 -#define SYMBOL_NAME_STR(X) #X
   7.165 -#define SYMBOL_NAME(X) X
   7.166 -#define SYMBOL_NAME_LABEL(X) X##:
   7.167 -#ifdef __ASSEMBLY__
   7.168 -#define ALIGN __ALIGN
   7.169 -#define ALIGN_STR __ALIGN_STR
   7.170 -#define ENTRY(name) \
   7.171 -  .globl SYMBOL_NAME(name); \
   7.172 -  ALIGN; \
   7.173 -  SYMBOL_NAME_LABEL(name)
   7.174 -#endif
   7.175 -
   7.176  #define PGT_base_page_table PGT_l2_page_table
   7.177  
   7.178 -#define barrier() __asm__ __volatile__("": : :"memory")
   7.179 -
   7.180  #define __HYPERVISOR_CS 0x0808
   7.181  #define __HYPERVISOR_DS 0x0810
   7.182  
   7.183 -#define NR_syscalls 256
   7.184 -
   7.185 -#ifndef NDEBUG
   7.186 -#define MEMORY_GUARD
   7.187 -#endif
   7.188 -
   7.189 -#ifndef __ASSEMBLY__
   7.190 -extern unsigned long _end; /* standard ELF symbol */
   7.191 -extern void __out_of_line_bug(int line) __attribute__((noreturn));
   7.192 -#define out_of_line_bug() __out_of_line_bug(__LINE__)
   7.193 -#endif /* __ASSEMBLY__ */
   7.194 -
   7.195  /* For generic assembly code: use macros to define operation/operand sizes. */
   7.196  #define __OS "l"  /* Operation Suffix */
   7.197  #define __OP "e"  /* Operand Prefix */
   7.198  
   7.199 +#endif /* __i386__ */
   7.200 +
   7.201  #endif /* __XEN_I386_CONFIG_H__ */
     8.1 --- a/xen/include/asm-x86/msr.h	Fri Jun 11 18:32:46 2004 +0000
     8.2 +++ b/xen/include/asm-x86/msr.h	Fri Jun 11 21:36:10 2004 +0000
     8.3 @@ -30,10 +30,10 @@
     8.4  #define rdtscl(low) \
     8.5       __asm__ __volatile__("rdtsc" : "=a" (low) : : "edx")
     8.6  
     8.7 -#ifdef x86_32
     8.8 +#if defined(__i386__)
     8.9  #define rdtscll(val) \
    8.10       __asm__ __volatile__("rdtsc" : "=A" (val))
    8.11 -#else
    8.12 +#elif defined(__x86_64__)
    8.13  #define rdtscll(val) do { \
    8.14       unsigned int a,d; \
    8.15       asm volatile("rdtsc" : "=a" (a), "=d" (d)); \
     9.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     9.2 +++ b/xen/include/asm-x86/pda.h	Fri Jun 11 21:36:10 2004 +0000
     9.3 @@ -0,0 +1,68 @@
     9.4 +#ifndef X86_64_PDA_H
     9.5 +#define X86_64_PDA_H
     9.6 +
     9.7 +#include <xen/cache.h>
     9.8 +
     9.9 +/* Per processor datastructure. %gs points to it while the kernel runs */ 
    9.10 +/* To use a new field with the *_pda macros it needs to be added to tools/offset.c */
    9.11 +struct x8664_pda {
    9.12 +	unsigned long kernelstack;  /* TOS for current process */ 
    9.13 +	unsigned long oldrsp; 	    /* user rsp for system call */
    9.14 +	unsigned long irqrsp;	    /* Old rsp for interrupts. */ 
    9.15 +	struct task_struct *pcurrent;	/* Current process */
    9.16 +        int irqcount;		    /* Irq nesting counter. Starts with -1 */  	
    9.17 +	int cpunumber;		    /* Logical CPU number */
    9.18 +	/* XXX: could be a single list */
    9.19 +	unsigned long *pgd_quick;
    9.20 +	unsigned long *pmd_quick;
    9.21 +	unsigned long *pte_quick;
    9.22 +	unsigned long pgtable_cache_sz;
    9.23 +	char *irqstackptr;	/* top of irqstack */
    9.24 +	unsigned long volatile *level4_pgt; 
    9.25 +} ____cacheline_aligned;
    9.26 +
    9.27 +#define PDA_STACKOFFSET (5*8)
    9.28 +
    9.29 +#define IRQSTACK_ORDER 2
    9.30 +#define IRQSTACKSIZE (PAGE_SIZE << IRQSTACK_ORDER) 
    9.31 +
    9.32 +extern struct x8664_pda cpu_pda[];
    9.33 +
    9.34 +/* 
    9.35 + * There is no fast way to get the base address of the PDA, all the accesses
    9.36 + * have to mention %fs/%gs.  So it needs to be done this Torvaldian way.
    9.37 + */ 
    9.38 +#define sizeof_field(type,field)  (sizeof(((type *)0)->field))
    9.39 +#define typeof_field(type,field)  typeof(((type *)0)->field)
    9.40 +
    9.41 +extern void __bad_pda_field(void);
    9.42 +/* Don't use offsetof because it requires too much infrastructure */
    9.43 +#define pda_offset(field) ((unsigned long)&((struct x8664_pda *)0)->field)
    9.44 +
    9.45 +#define pda_to_op(op,field,val) do { \
    9.46 +       switch (sizeof_field(struct x8664_pda, field)) { 		\
    9.47 +       case 2: asm volatile(op "w %0,%%gs:%P1" :: "r" (val), "i"(pda_offset(field)):"memory"); break;	\
    9.48 +       case 4: asm volatile(op "l %0,%%gs:%P1" :: "r" (val), "i"(pda_offset(field)):"memory"); break;	\
    9.49 +       case 8: asm volatile(op "q %0,%%gs:%P1" :: "r" (val), "i"(pda_offset(field)):"memory"); break;	\
    9.50 +       default: __bad_pda_field(); 					\
    9.51 +       } \
    9.52 +       } while (0)
    9.53 +
    9.54 +
    9.55 +#define pda_from_op(op,field) ({ \
    9.56 +       typedef typeof_field(struct x8664_pda, field) T__; T__ ret__; \
    9.57 +       switch (sizeof_field(struct x8664_pda, field)) { 		\
    9.58 +       case 2: asm volatile(op "w %%gs:%P1,%0":"=r" (ret__): "i" (pda_offset(field)):"memory"); break;	\
    9.59 +       case 4: asm volatile(op "l %%gs:%P1,%0":"=r" (ret__): "i" (pda_offset(field)):"memory"); break;	\
    9.60 +       case 8: asm volatile(op "q %%gs:%P1,%0":"=r" (ret__): "i" (pda_offset(field)):"memory"); break;	\
    9.61 +       default: __bad_pda_field(); 					\
    9.62 +       } \
    9.63 +       ret__; })
    9.64 +
    9.65 +
    9.66 +#define read_pda(field) pda_from_op("mov",field)
    9.67 +#define write_pda(field,val) pda_to_op("mov",field,val)
    9.68 +#define add_pda(field,val) pda_to_op("add",field,val)
    9.69 +#define sub_pda(field,val) pda_to_op("sub",field,val)
    9.70 +
    9.71 +#endif
    10.1 --- a/xen/include/asm-x86/smp.h	Fri Jun 11 18:32:46 2004 +0000
    10.2 +++ b/xen/include/asm-x86/smp.h	Fri Jun 11 21:36:10 2004 +0000
    10.3 @@ -81,9 +81,9 @@ extern void smp_store_cpu_info(int id);	
    10.4   * so this is correct in the x86 case.
    10.5   */
    10.6  
    10.7 -#ifdef x86_32
    10.8 +#if defined(__i386__)
    10.9  #define smp_processor_id() (current->processor)
   10.10 -#else
   10.11 +#elif defined(__x86_64__)
   10.12  #include <asm/pda.h>
   10.13  #define smp_processor_id() read_pda(cpunumber)
   10.14  #endif
    11.1 --- a/xen/include/asm-x86/string.h	Fri Jun 11 18:32:46 2004 +0000
    11.2 +++ b/xen/include/asm-x86/string.h	Fri Jun 11 21:36:10 2004 +0000
    11.3 @@ -335,6 +335,7 @@ else
    11.4  return dest;
    11.5  }
    11.6  
    11.7 +#define __HAVE_ARCH_MEMCMP
    11.8  #define memcmp __builtin_memcmp
    11.9  
   11.10  #define __HAVE_ARCH_MEMCHR
    12.1 --- a/xen/include/asm-x86/system.h	Fri Jun 11 18:32:46 2004 +0000
    12.2 +++ b/xen/include/asm-x86/system.h	Fri Jun 11 21:36:10 2004 +0000
    12.3 @@ -47,14 +47,14 @@ static inline unsigned long __xchg(unsig
    12.4  				:"m" (*__xg(ptr)), "0" (x)
    12.5  				:"memory");
    12.6  			break;
    12.7 -#ifdef x86_32
    12.8 +#if defined(__i386__)
    12.9  		case 4:
   12.10  			__asm__ __volatile__("xchgl %0,%1"
   12.11  				:"=r" (x)
   12.12  				:"m" (*__xg(ptr)), "0" (x)
   12.13  				:"memory");
   12.14  			break;
   12.15 -#else
   12.16 +#elif defined(__x86_64__)
   12.17  		case 4:
   12.18  			__asm__ __volatile__("xchgl %k0,%1"
   12.19  				:"=r" (x)
   12.20 @@ -95,14 +95,14 @@ static inline unsigned long __cmpxchg(vo
   12.21  				     : "q"(new), "m"(*__xg(ptr)), "0"(old)
   12.22  				     : "memory");
   12.23  		return prev;
   12.24 -#ifdef x86_32
   12.25 +#if defined(__i386__)
   12.26  	case 4:
   12.27  		__asm__ __volatile__(LOCK_PREFIX "cmpxchgl %1,%2"
   12.28  				     : "=a"(prev)
   12.29  				     : "q"(new), "m"(*__xg(ptr)), "0"(old)
   12.30  				     : "memory");
   12.31  		return prev;
   12.32 -#else
   12.33 +#elif defined(__x86_64__)
   12.34  	case 4:
   12.35  		__asm__ __volatile__(LOCK_PREFIX "cmpxchgl %k1,%2"
   12.36  				     : "=a"(prev)
   12.37 @@ -192,12 +192,12 @@ static inline unsigned long __cmpxchg(vo
   12.38  #define set_wmb(var, value) do { var = value; wmb(); } while (0)
   12.39  
   12.40  /* interrupt control.. */
   12.41 -#ifdef x86_64
   12.42 -#define __save_flags(x)		do { warn_if_not_ulong(x); __asm__ __volatile__("# save_flags \n\t pushfq ; popq %q0":"=g" (x): /* no input */ :"memory"); } while (0)
   12.43 -#define __restore_flags(x) 	__asm__ __volatile__("# restore_flags \n\t pushq %0 ; popfq": /* no output */ :"g" (x):"memory", "cc")
   12.44 -#else
   12.45 +#if defined(__i386__)
   12.46  #define __save_flags(x)		__asm__ __volatile__("pushfl ; popl %0":"=g" (x): /* no input */)
   12.47  #define __restore_flags(x) 	__asm__ __volatile__("pushl %0 ; popfl": /* no output */ :"g" (x):"memory", "cc")
   12.48 +#elif defined(__x86_64__)
   12.49 +#define __save_flags(x)		do { __asm__ __volatile__("# save_flags \n\t pushfq ; popq %q0":"=g" (x): /* no input */ :"memory"); } while (0)
   12.50 +#define __restore_flags(x) 	__asm__ __volatile__("# restore_flags \n\t pushq %0 ; popfq": /* no output */ :"g" (x):"memory", "cc")
   12.51  #endif
   12.52  #define __cli() 		__asm__ __volatile__("cli": : :"memory")
   12.53  #define __sti()			__asm__ __volatile__("sti": : :"memory")
   12.54 @@ -205,12 +205,12 @@ static inline unsigned long __cmpxchg(vo
   12.55  #define safe_halt()		__asm__ __volatile__("sti; hlt": : :"memory")
   12.56  
   12.57  /* For spinlocks etc */
   12.58 -#ifdef x86_64
   12.59 -#define local_irq_save(x) 	do { warn_if_not_ulong(x); __asm__ __volatile__("# local_irq_save \n\t pushfq ; popq %0 ; cli":"=g" (x): /* no input */ :"memory"); } while (0)
   12.60 -#define local_irq_restore(x)	__asm__ __volatile__("# local_irq_restore \n\t pushq %0 ; popfq": /* no output */ :"g" (x):"memory")
   12.61 -#else
   12.62 +#if defined(__i386__)
   12.63  #define local_irq_save(x)	__asm__ __volatile__("pushfl ; popl %0 ; cli":"=g" (x): /* no input */ :"memory")
   12.64  #define local_irq_restore(x)	__restore_flags(x)
   12.65 +#elif defined(__x86_64__)
   12.66 +#define local_irq_save(x) 	do { __asm__ __volatile__("# local_irq_save \n\t pushfq ; popq %0 ; cli":"=g" (x): /* no input */ :"memory"); } while (0)
   12.67 +#define local_irq_restore(x)	__asm__ __volatile__("# local_irq_restore \n\t pushq %0 ; popfq": /* no output */ :"g" (x):"memory")
   12.68  #endif
   12.69  #define local_irq_disable()	__cli()
   12.70  #define local_irq_enable()	__sti()
    13.1 --- a/xen/include/asm-x86/types.h	Fri Jun 11 18:32:46 2004 +0000
    13.2 +++ b/xen/include/asm-x86/types.h	Fri Jun 11 21:36:10 2004 +0000
    13.3 @@ -20,10 +20,10 @@ typedef __signed__ int __s32;
    13.4  typedef unsigned int __u32;
    13.5  
    13.6  #if defined(__GNUC__) && !defined(__STRICT_ANSI__)
    13.7 -#ifdef x86_32
    13.8 +#if defined(__i386__)
    13.9  typedef __signed__ long long __s64;
   13.10  typedef unsigned long long __u64;
   13.11 -#else
   13.12 +#elif defined(__x86_64__)
   13.13  typedef __signed__ long __s64;
   13.14  typedef unsigned long __u64;
   13.15  #endif
   13.16 @@ -40,11 +40,11 @@ typedef unsigned short u16;
   13.17  typedef signed int s32;
   13.18  typedef unsigned int u32;
   13.19  
   13.20 -#ifdef x86_32
   13.21 +#if defined(__i386__)
   13.22  typedef signed long long s64;
   13.23  typedef unsigned long long u64;
   13.24  #define BITS_PER_LONG 32
   13.25 -#else
   13.26 +#elif defined(__x86_64__)
   13.27  typedef signed long s64;
   13.28  typedef unsigned long u64;
   13.29  #define BITS_PER_LONG 64
    14.1 --- a/xen/include/asm-x86/x86_64/config.h	Fri Jun 11 18:32:46 2004 +0000
    14.2 +++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
    14.3 @@ -1,292 +0,0 @@
    14.4 -/******************************************************************************
    14.5 - * config.h
    14.6 - * 
    14.7 - * A Linux-style configuration list.
    14.8 - * 
    14.9 - */
   14.10 -
   14.11 -#ifndef __XEN_X86_64_CONFIG_H__
   14.12 -#define __XEN_X86_64_CONFIG_H__
   14.13 -
   14.14 -#define CONFIG_X86    1
   14.15 -#define CONFIG_X86_64BITMODE 1
   14.16 -
   14.17 -#define CONFIG_SMP 1
   14.18 -#define CONFIG_X86_LOCAL_APIC 1
   14.19 -#define CONFIG_X86_IO_APIC 1
   14.20 -#define CONFIG_X86_L1_CACHE_SHIFT 5
   14.21 -
   14.22 -#define CONFIG_PCI 1
   14.23 -#define CONFIG_PCI_BIOS 1
   14.24 -#define CONFIG_PCI_DIRECT 1
   14.25 -
   14.26 -#define CONFIG_IDE 1
   14.27 -#define CONFIG_BLK_DEV_IDE 1
   14.28 -#define CONFIG_BLK_DEV_IDEDMA 1
   14.29 -#define CONFIG_BLK_DEV_IDEPCI 1
   14.30 -#define CONFIG_IDEDISK_MULTI_MODE 1
   14.31 -#define CONFIG_IDEDISK_STROKE 1
   14.32 -#define CONFIG_IDEPCI_SHARE_IRQ 1
   14.33 -#define CONFIG_BLK_DEV_IDEDMA_PCI 1
   14.34 -#define CONFIG_IDEDMA_PCI_AUTO 1
   14.35 -#define CONFIG_IDEDMA_AUTO 1
   14.36 -#define CONFIG_IDEDMA_ONLYDISK 1
   14.37 -#define CONFIG_BLK_DEV_IDE_MODES 1
   14.38 -#define CONFIG_BLK_DEV_PIIX 1
   14.39 -
   14.40 -#define CONFIG_SCSI 1
   14.41 -#define CONFIG_SCSI_LOGGING 1
   14.42 -#define CONFIG_BLK_DEV_SD 1
   14.43 -#define CONFIG_SD_EXTRA_DEVS 40
   14.44 -#define CONFIG_SCSI_MULTI_LUN 1
   14.45 -
   14.46 -#define CONFIG_XEN_ATTENTION_KEY 1
   14.47 -
   14.48 -#define HZ 100
   14.49 -
   14.50 -/*
   14.51 - * Just to keep compiler happy.
   14.52 - * NB. DO NOT CHANGE SMP_CACHE_BYTES WITHOUT FIXING arch/i386/entry.S!!!
   14.53 - * It depends on size of irq_cpustat_t, for example, being 64 bytes. :-)
   14.54 - * Mmmm... so niiiiiice....
   14.55 - */
   14.56 -#define SMP_CACHE_BYTES 64
   14.57 -#define NR_CPUS 16
   14.58 -#define __cacheline_aligned __attribute__((__aligned__(SMP_CACHE_BYTES)))
   14.59 -#define ____cacheline_aligned __cacheline_aligned
   14.60 -
   14.61 -#define PHYSICAL_ADDRESS_BITS 52
   14.62 -#define MAX_PHYSICAL_ADDRESS (1 << PHYSICAL_ADDRESS_BITS)
   14.63 -#define VIRTUAL_ADDRESS_BITS 48
   14.64 -#define XEN_PAGE_SIZE 4096
   14.65 -
   14.66 -#define PTE_SIZE 8
   14.67 -#define TOTAL_PTES (512ULL * 512 * 512 * 512)
   14.68 -
   14.69 -/* next PML4 from an _END address */
   14.70 -#define PML4_BITS 39
   14.71 -#define PML4_SPACE (1ULL << PML4_BITS)
   14.72 -
   14.73 -/*
   14.74 - * Memory layout
   14.75 - *
   14.76 - *   0x0000000000000000 - 0x00007fffffffffff Guest & user apps (128TB)
   14.77 - *    (Only for 32-bit guests)
   14.78 - *    0x00000000fc000000 - 0x00000000fc3fffff Machine/Physical 32-bit shadow (4MB)
   14.79 - *    0x00000000fc400000 - 0x00000000feffffff IO remap for 32-bit guests (44MB)
   14.80 - *    0x00000000ff000000 - 0x00000000ff3fffff 32-bit PTE shadow (4MB)
   14.81 - *
   14.82 - *   0xffff800000000000	- 0xffff807fffffffff Linear page table (512GB)
   14.83 - *   0xffff808000000000 - 0xffff80ffffffffff Reserved for shadow page table (512GB)
   14.84 - *
   14.85 - *   0xffff810000000000 - 0xffff82ffffffffff Xen PML4 slots 
   14.86 - *    0xffff810000000000 - 0xffff81003fffffff Xen hypervisor virtual space (1GB)
   14.87 - *    0xffff810040000000 - 0xffff81807fffffff Per-domain mappings (1GB)
   14.88 - *    0xffff810080000000 - 0xffff81387fffffff R/O physical map (224GB)
   14.89 - *    0xffff813880000000 - 0xffff81707fffffff R/W physical map (224GB)
   14.90 - *    0xffff817080000000 - 0xffff82c07fffffff Frame table (1344GB) 
   14.91 - *    0xffff82c080000000 - 0xffff82c0bfffffff I/O remap space (1GB)
   14.92 - *    0xffff82c0c0000000 - 0xffff82ffffffffff (253GB)
   14.93 - *
   14.94 - *   0xffff830000000000 - 0xffff87ffffffffff RESERVED (5TB)
   14.95 - *
   14.96 - *   0xffff880000000000 - ...                Physical 1:1 direct mapping (112TB max)
   14.97 - *    0xffff880000000000 - 0xffff880001000000 Low memory DMA region (16M)
   14.98 - *
   14.99 - *   0xfffff80000000000 - 0xffffffffffffffff Reserved for guest (8TB)
  14.100 - * 
  14.101 - * The requirement that we have a 1:1 map of physical memory limits
  14.102 - * the maximum memory size we can support.  With only 48 virtual address
  14.103 - * bits, and the assumption that guests will run users in positive address
  14.104 - * space, a contiguous 1:1 map can only live in the negative address space.
  14.105 - * Since we don't want to bump guests out of the very top of memory and
  14.106 - * force relocation, we can't use this entire space, and Xen has several
  14.107 - * heavy mapping that require PML4 slices.  Just to be safe, we reserve
  14.108 - * 16 PML4s each for Xen and the guest.  224 PML4s give us 112 terabytes
  14.109 - * of addressable memory.  Any high device physical addresses beyond this
  14.110 - * region can be mapped into the IO remap space or some of the reserved 
  14.111 - * 6TB region.
  14.112 - * 
  14.113 - * 112 TB is just 16 TB shy of the maximum physical memory supported
  14.114 - * on Linux 2.6.0, and should be enough for anybody.
  14.115 - *
  14.116 - * There are some additional constraints in the memory layout that require
  14.117 - * several changes from the i386 architecture.
  14.118 - *
  14.119 - * ACPI data and ACPI non-volatile storage must be placed in some region
  14.120 - * of memory below the 4GB mark.  Depending on the BIOS and system, we
  14.121 - * may have this located as low as 1GB.  This means allocating large
  14.122 - * chunks of physically contiguous memory from the direct mapping may not
  14.123 - * be possible. 
  14.124 - *
  14.125 - * The full frame table for 112TB of physical memory currently occupies
  14.126 - * 1344GB space.  This clearly can not be allocated in physically contiguous
  14.127 - * space, so it must be moved to a virtual address.
  14.128 - *
  14.129 - * Both copies of the machine->physical table must also be relocated.  
  14.130 - * (112 TB / 4k) * 8 bytes means that each copy of the physical map requires
  14.131 - * 224GB of space, thus it also must move to VM space.
  14.132 - *
  14.133 - * The physical pages used to allocate the page tables for the direct 1:1
  14.134 - * map may occupy (112TB / 2M) * 8 bytes = 448MB.  This is almost guaranteed
  14.135 - * to fit in contiguous physical memory, but these pages used to be allocated
  14.136 - * in the Xen monitor address space.  This means the Xen address space must
  14.137 - * accomodate up to ~500 MB, which means it also must move out of the
  14.138 - * direct mapped region. 
  14.139 - *
  14.140 - * Since both copies of the MPT, the frame table, and Xen now exist in
  14.141 - * purely virtual space, we have the added advantage of being able to
  14.142 - * map them to local pages on NUMA machines, or use NUMA aware memory
  14.143 - * allocation within Xen itself.
  14.144 - *
  14.145 - * Additionally, the 1:1 page table now exists contiguously in virtual
  14.146 - * space, but may be mapped to physically separated pages, allowing
  14.147 - * each node to contain the page tables for its own local memory.  Setting
  14.148 - * up this mapping presents a bit of a chicken-egg problem, but is possible
  14.149 - * as a future enhancement. 
  14.150 - *
  14.151 - * Zachary Amsden (zamsden@cisco.com)
  14.152 - *
  14.153 - */
  14.154 -
  14.155 -/* Guest and user space */
  14.156 -#define NSPACE_VIRT_START	0
  14.157 -#define NSPACE_VIRT_END		(1ULL << (VIRTUAL_ADDRESS_BITS - 1))
  14.158 -
  14.159 -/* Priviledged space */
  14.160 -#define ESPACE_VIRT_END		0
  14.161 -#define ESPACE_VIRT_START	(ESPACE_VIRT_END-(1ULL << (VIRTUAL_ADDRESS_BITS-1)))
  14.162 -
  14.163 -/* reservations in e-space */
  14.164 -#define GUEST_RESERVED_PML4S 16
  14.165 -#define XEN_RESERVED_PML4S 16
  14.166 -
  14.167 -#define MAX_MEMORY_SIZE ((1ULL << (VIRTUAL_ADDRESS_BITS-1)) \
  14.168 -			-((GUEST_RESERVED_PML4S + XEN_RESERVED_PML4S) * PML4_SPACE))
  14.169 -#define MAX_MEMORY_FRAMES (MAX_MEMORY_SIZE / XEN_PAGE_SIZE)
  14.170 -
  14.171 -/*
  14.172 - * Virtual addresses beyond this are not modifiable by guest OSes. 
  14.173 - */
  14.174 -#define HYPERVISOR_VIRT_START ESPACE_VIRT_START
  14.175 -#define HYPERVISOR_VIRT_END   (ESPACE_VIRT_END-(GUEST_RESERVED_PML4S * PML4_SPACE))
  14.176 -
  14.177 -/* First 512GB of virtual address space is used as a linear p.t. mapping. */
  14.178 -#define LINEAR_PT_VIRT_START  (HYPERVISOR_VIRT_START)
  14.179 -#define LINEAR_PT_VIRT_END    (LINEAR_PT_VIRT_START + (PTE_SIZE * TOTAL_PTES))
  14.180 -
  14.181 -/* Reserve some space for a shadow PT mapping */
  14.182 -#define SHADOW_PT_VIRT_START  (LINEAR_PT_VIRT_END)
  14.183 -#define SHADOW_PT_VIRT_END    (SHADOW_PT_VIRT_START + (PTE_SIZE * TOTAL_PTES))
  14.184 -
  14.185 -/* Xen exists in the first 1GB of the next PML4 space */
  14.186 -#define MAX_MONITOR_ADDRESS   (1 * 1024 * 1024 * 1024)
  14.187 -#define MONITOR_VIRT_START    (SHADOW_PT_VIRT_END)
  14.188 -#define MONITOR_VIRT_END      (MONITOR_VIRT_START + MAX_MONITOR_ADDRESS)
  14.189 -
  14.190 -/* Next 1GB of virtual address space used for per-domain mappings (eg. GDT). */
  14.191 -#define PERDOMAIN_VIRT_START  (MONITOR_VIRT_END)
  14.192 -#define PERDOMAIN_VIRT_END    (PERDOMAIN_VIRT_START + (512 * 512 * 4096))
  14.193 -#define GDT_VIRT_START        (PERDOMAIN_VIRT_START)
  14.194 -#define GDT_VIRT_END          (GDT_VIRT_START + (128*1024))
  14.195 -#define LDT_VIRT_START        (GDT_VIRT_END)
  14.196 -#define LDT_VIRT_END          (LDT_VIRT_START + (128*1024))
  14.197 -
  14.198 -/*
  14.199 - * First set of MPTs are mapped read-only for all. It's for the machine->physical
  14.200 - * mapping table (MPT table). The following are virtual addresses.
  14.201 - */
  14.202 -#define READONLY_MPT_VIRT_START (PERDOMAIN_VIRT_END)
  14.203 -#define READONLY_MPT_VIRT_END   (READONLY_MPT_VIRT_START + (PTE_SIZE * MAX_MEMORY_FRAMES))
  14.204 -
  14.205 -/* R/W machine->physical table */
  14.206 -#define RDWR_MPT_VIRT_START   (READONLY_MPT_VIRT_END)
  14.207 -#define RDWR_MPT_VIRT_END     (RDWR_MPT_VIRT_START + (PTE_SIZE * MAX_MEMORY_FRAMES))
  14.208 -
  14.209 -/* Frame table */
  14.210 -#define FRAMETABLE_ENTRY_SIZE	(48)
  14.211 -#define FRAMETABLE_VIRT_START (RDWR_MPT_VIRT_END)
  14.212 -#define FRAMETABLE_VIRT_END   (FRAMETABLE_VIRT_START + (FRAMETABLE_ENTRY_SIZE * MAX_MEMORY_FRAMES))
  14.213 -
  14.214 -/* Next 1GB of virtual address space used for ioremap(). */
  14.215 -#define IOREMAP_VIRT_START    (FRAMETABLE_VIRT_END)
  14.216 -#define IOREMAP_VIRT_END      (IOREMAP_VIRT_START + (512 * 512 * 4096))
  14.217 -
  14.218 -/* And the virtual addresses for the direct-map region... */
  14.219 -#define DIRECTMAP_VIRT_START  (ESPACE_VIRT_START + (XEN_RESERVED_PML4S * PML4_SPACE))
  14.220 -#define DIRECTMAP_VIRT_END    (DIRECTMAP_VIRT_START + MAX_DIRECTMAP_ADDRESS)
  14.221 -
  14.222 -/*
  14.223 - * Next is the direct-mapped memory region. The following are machine addresses.
  14.224 - */
  14.225 -#define MAX_DMA_ADDRESS       (16*1024*1024)
  14.226 -#define MAX_DIRECTMAP_ADDRESS MAX_MEMORY_SIZE
  14.227 -
  14.228 -
  14.229 -
  14.230 -/*
  14.231 - * Amount of slack domain memory to leave in system, in kilobytes.
  14.232 - * Prevents a hard out-of-memory crunch for thinsg like network receive.
  14.233 - */
  14.234 -#define SLACK_DOMAIN_MEM_KILOBYTES 2048
  14.235 -
  14.236 -
  14.237 -/*
  14.238 - * These will probably change in the future..
  14.239 - * locations for 32-bit guest compatibility mappings
  14.240 - */
  14.241 -
  14.242 -/* 4M of 32-bit machine-physical shadow in low 4G of VM space */
  14.243 -#define SHADOW_MPT32_VIRT_START (0xfc000000)
  14.244 -#define SHADOW_MPT32_VIRT_END   (SHADOW_MPT32_VIRT_START + (4 * 1024 * 1024))
  14.245 -
  14.246 -/* 44M of I/O remap for 32-bit drivers */
  14.247 -#define IOREMAP_LOW_VIRT_START (SHADOW_MPT32_VIRT_END)
  14.248 -#define IOREMAP_LOW_VIRT_END   (IOREMAP_LOW_VIRT_START + (44 * 1024 * 1024))
  14.249 -
  14.250 -/* 4M of 32-bit page table */
  14.251 -#define SHADOW_PT32_VIRT_START (IOREMAP_LOW_VIRT_END)
  14.252 -#define SHADOW_PT32_VIRT_END   (SHADOW_PT32_VIRT_START + (4 * 1024 * 1024))
  14.253 -
  14.254 -
  14.255 -/* Linkage for x86 */
  14.256 -#define FASTCALL(x)     x __attribute__((regparm(3)))
  14.257 -#define asmlinkage        __attribute__((regparm(0)))
  14.258 -#define __ALIGN .align 16,0x90
  14.259 -#define __ALIGN_STR ".align 16,0x90"
  14.260 -#define SYMBOL_NAME_STR(X) #X
  14.261 -#define SYMBOL_NAME(X) X
  14.262 -#define SYMBOL_NAME_LABEL(X) X##:
  14.263 -#ifdef __ASSEMBLY__
  14.264 -#define ALIGN __ALIGN
  14.265 -#define ALIGN_STR __ALIGN_STR
  14.266 -#define ENTRY(name) \
  14.267 -  .globl SYMBOL_NAME(name); \
  14.268 -  ALIGN; \
  14.269 -  SYMBOL_NAME_LABEL(name)
  14.270 -#endif
  14.271 -
  14.272 -#define PGT_base_page_table PGT_l4_page_table
  14.273 -
  14.274 -#define barrier() __asm__ __volatile__("": : :"memory")
  14.275 -
  14.276 -/*
  14.277 - * Hypervisor segment selectors
  14.278 - */
  14.279 -#define __HYPERVISOR_CS64 0x0810
  14.280 -#define __HYPERVISOR_CS32 0x0808
  14.281 -#define __HYPERVISOR_DS 0x0818
  14.282 -
  14.283 -#define NR_syscalls 256
  14.284 -
  14.285 -#ifndef NDEBUG
  14.286 -#define MEMORY_GUARD
  14.287 -#endif
  14.288 -
  14.289 -#ifndef __ASSEMBLY__
  14.290 -extern unsigned long _end; /* standard ELF symbol */
  14.291 -extern void __out_of_line_bug(int line) __attribute__((noreturn));
  14.292 -#define out_of_line_bug() __out_of_line_bug(__LINE__)
  14.293 -#endif /* __ASSEMBLY__ */
  14.294 -
  14.295 -#endif /* __XEN_X86_64_CONFIG_H__ */
    15.1 --- a/xen/include/asm-x86/x86_64/pda.h	Fri Jun 11 18:32:46 2004 +0000
    15.2 +++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
    15.3 @@ -1,68 +0,0 @@
    15.4 -#ifndef X86_64_PDA_H
    15.5 -#define X86_64_PDA_H
    15.6 -
    15.7 -#include <xen/cache.h>
    15.8 -
    15.9 -/* Per processor datastructure. %gs points to it while the kernel runs */ 
   15.10 -/* To use a new field with the *_pda macros it needs to be added to tools/offset.c */
   15.11 -struct x8664_pda {
   15.12 -	unsigned long kernelstack;  /* TOS for current process */ 
   15.13 -	unsigned long oldrsp; 	    /* user rsp for system call */
   15.14 -	unsigned long irqrsp;	    /* Old rsp for interrupts. */ 
   15.15 -	struct task_struct *pcurrent;	/* Current process */
   15.16 -        int irqcount;		    /* Irq nesting counter. Starts with -1 */  	
   15.17 -	int cpunumber;		    /* Logical CPU number */
   15.18 -	/* XXX: could be a single list */
   15.19 -	unsigned long *pgd_quick;
   15.20 -	unsigned long *pmd_quick;
   15.21 -	unsigned long *pte_quick;
   15.22 -	unsigned long pgtable_cache_sz;
   15.23 -	char *irqstackptr;	/* top of irqstack */
   15.24 -	unsigned long volatile *level4_pgt; 
   15.25 -} ____cacheline_aligned;
   15.26 -
   15.27 -#define PDA_STACKOFFSET (5*8)
   15.28 -
   15.29 -#define IRQSTACK_ORDER 2
   15.30 -#define IRQSTACKSIZE (PAGE_SIZE << IRQSTACK_ORDER) 
   15.31 -
   15.32 -extern struct x8664_pda cpu_pda[];
   15.33 -
   15.34 -/* 
   15.35 - * There is no fast way to get the base address of the PDA, all the accesses
   15.36 - * have to mention %fs/%gs.  So it needs to be done this Torvaldian way.
   15.37 - */ 
   15.38 -#define sizeof_field(type,field)  (sizeof(((type *)0)->field))
   15.39 -#define typeof_field(type,field)  typeof(((type *)0)->field)
   15.40 -
   15.41 -extern void __bad_pda_field(void);
   15.42 -/* Don't use offsetof because it requires too much infrastructure */
   15.43 -#define pda_offset(field) ((unsigned long)&((struct x8664_pda *)0)->field)
   15.44 -
   15.45 -#define pda_to_op(op,field,val) do { \
   15.46 -       switch (sizeof_field(struct x8664_pda, field)) { 		\
   15.47 -       case 2: asm volatile(op "w %0,%%gs:%P1" :: "r" (val), "i"(pda_offset(field)):"memory"); break;	\
   15.48 -       case 4: asm volatile(op "l %0,%%gs:%P1" :: "r" (val), "i"(pda_offset(field)):"memory"); break;	\
   15.49 -       case 8: asm volatile(op "q %0,%%gs:%P1" :: "r" (val), "i"(pda_offset(field)):"memory"); break;	\
   15.50 -       default: __bad_pda_field(); 					\
   15.51 -       } \
   15.52 -       } while (0)
   15.53 -
   15.54 -
   15.55 -#define pda_from_op(op,field) ({ \
   15.56 -       typedef typeof_field(struct x8664_pda, field) T__; T__ ret__; \
   15.57 -       switch (sizeof_field(struct x8664_pda, field)) { 		\
   15.58 -       case 2: asm volatile(op "w %%gs:%P1,%0":"=r" (ret__): "i" (pda_offset(field)):"memory"); break;	\
   15.59 -       case 4: asm volatile(op "l %%gs:%P1,%0":"=r" (ret__): "i" (pda_offset(field)):"memory"); break;	\
   15.60 -       case 8: asm volatile(op "q %%gs:%P1,%0":"=r" (ret__): "i" (pda_offset(field)):"memory"); break;	\
   15.61 -       default: __bad_pda_field(); 					\
   15.62 -       } \
   15.63 -       ret__; })
   15.64 -
   15.65 -
   15.66 -#define read_pda(field) pda_from_op("mov",field)
   15.67 -#define write_pda(field,val) pda_to_op("mov",field,val)
   15.68 -#define add_pda(field,val) pda_to_op("add",field,val)
   15.69 -#define sub_pda(field,val) pda_to_op("sub",field,val)
   15.70 -
   15.71 -#endif
    16.1 --- a/xen/include/hypervisor-ifs/arch-x86/hypervisor-if.h	Fri Jun 11 18:32:46 2004 +0000
    16.2 +++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
    16.3 @@ -1,138 +0,0 @@
    16.4 -/******************************************************************************
    16.5 - * arch-i386/hypervisor-if.h
    16.6 - * 
    16.7 - * Guest OS interface to x86 32-bit Xen.
    16.8 - */
    16.9 -
   16.10 -#ifndef __HYPERVISOR_IF_I386_H__
   16.11 -#define __HYPERVISOR_IF_I386_H__
   16.12 -
   16.13 -/*
   16.14 - * Pointers and other address fields inside interface structures are padded to
   16.15 - * 64 bits. This means that field alignments aren't different between 32- and
   16.16 - * 64-bit architectures. 
   16.17 - */
   16.18 -/* NB. Multi-level macro ensures __LINE__ is expanded before concatenation. */
   16.19 -#define __MEMORY_PADDING(_X) u32 __pad_ ## _X
   16.20 -#define _MEMORY_PADDING(_X)  __MEMORY_PADDING(_X)
   16.21 -#define MEMORY_PADDING       _MEMORY_PADDING(__LINE__)
   16.22 -
   16.23 -/*
   16.24 - * SEGMENT DESCRIPTOR TABLES
   16.25 - */
   16.26 -/*
   16.27 - * A number of GDT entries are reserved by Xen. These are not situated at the
   16.28 - * start of the GDT because some stupid OSes export hard-coded selector values
   16.29 - * in their ABI. These hard-coded values are always near the start of the GDT,
   16.30 - * so Xen places itself out of the way.
   16.31 - * 
   16.32 - * NB. The reserved range is inclusive (that is, both FIRST_RESERVED_GDT_ENTRY
   16.33 - * and LAST_RESERVED_GDT_ENTRY are reserved).
   16.34 - */
   16.35 -#define NR_RESERVED_GDT_ENTRIES    40
   16.36 -#define FIRST_RESERVED_GDT_ENTRY   256
   16.37 -#define LAST_RESERVED_GDT_ENTRY    \
   16.38 -  (FIRST_RESERVED_GDT_ENTRY + NR_RESERVED_GDT_ENTRIES - 1)
   16.39 -
   16.40 -
   16.41 -/*
   16.42 - * These flat segments are in the Xen-private section of every GDT. Since these
   16.43 - * are also present in the initial GDT, many OSes will be able to avoid
   16.44 - * installing their own GDT.
   16.45 - */
   16.46 -#define FLAT_RING1_CS 0x0819    /* GDT index 259 */
   16.47 -#define FLAT_RING1_DS 0x0821    /* GDT index 260 */
   16.48 -#define FLAT_RING3_CS 0x082b    /* GDT index 261 */
   16.49 -#define FLAT_RING3_DS 0x0833    /* GDT index 262 */
   16.50 -
   16.51 -#define FLAT_GUESTOS_CS FLAT_RING1_CS
   16.52 -#define FLAT_GUESTOS_DS FLAT_RING1_DS
   16.53 -#define FLAT_USER_CS    FLAT_RING3_CS
   16.54 -#define FLAT_USER_DS    FLAT_RING3_DS
   16.55 -
   16.56 -/* And the trap vector is... */
   16.57 -#define TRAP_INSTR "int $0x82"
   16.58 -
   16.59 -
   16.60 -/*
   16.61 - * Virtual addresses beyond this are not modifiable by guest OSes. The 
   16.62 - * machine->physical mapping table starts at this address, read-only.
   16.63 - */
   16.64 -#define HYPERVISOR_VIRT_START (0xFC000000UL)
   16.65 -#ifndef machine_to_phys_mapping
   16.66 -#define machine_to_phys_mapping ((unsigned long *)HYPERVISOR_VIRT_START)
   16.67 -#endif
   16.68 -
   16.69 -#ifndef __ASSEMBLY__
   16.70 -
   16.71 -/* NB. Both the following are 32 bits each. */
   16.72 -typedef unsigned long memory_t;   /* Full-sized pointer/address/memory-size. */
   16.73 -typedef unsigned long cpureg_t;   /* Full-sized register.                    */
   16.74 -
   16.75 -/*
   16.76 - * Send an array of these to HYPERVISOR_set_trap_table()
   16.77 - */
   16.78 -#define TI_GET_DPL(_ti)      ((_ti)->flags & 3)
   16.79 -#define TI_GET_IF(_ti)       ((_ti)->flags & 4)
   16.80 -#define TI_SET_DPL(_ti,_dpl) ((_ti)->flags |= (_dpl))
   16.81 -#define TI_SET_IF(_ti,_if)   ((_ti)->flags |= ((!!(_if))<<2))
   16.82 -typedef struct {
   16.83 -    u8       vector;  /* 0: exception vector                              */
   16.84 -    u8       flags;   /* 1: 0-3: privilege level; 4: clear event enable?  */
   16.85 -    u16      cs;      /* 2: code selector                                 */
   16.86 -    memory_t address; /* 4: code address                                  */
   16.87 -} PACKED trap_info_t; /* 8 bytes */
   16.88 -
   16.89 -typedef struct
   16.90 -{
   16.91 -    unsigned long ebx;
   16.92 -    unsigned long ecx;
   16.93 -    unsigned long edx;
   16.94 -    unsigned long esi;
   16.95 -    unsigned long edi;
   16.96 -    unsigned long ebp;
   16.97 -    unsigned long eax;
   16.98 -    unsigned long ds;
   16.99 -    unsigned long es;
  16.100 -    unsigned long fs;
  16.101 -    unsigned long gs;
  16.102 -    unsigned long _unused;
  16.103 -    unsigned long eip;
  16.104 -    unsigned long cs;
  16.105 -    unsigned long eflags;
  16.106 -    unsigned long esp;
  16.107 -    unsigned long ss;
  16.108 -} PACKED execution_context_t;
  16.109 -
  16.110 -typedef struct {
  16.111 -    u32  tsc_bits;      /* 0: 32 bits read from the CPU's TSC. */
  16.112 -    u32  tsc_bitshift;  /* 4: 'tsc_bits' uses N:N+31 of TSC.   */
  16.113 -} PACKED tsc_timestamp_t; /* 8 bytes */
  16.114 -
  16.115 -/*
  16.116 - * The following is all CPU context. Note that the i387_ctxt block is filled 
  16.117 - * in by FXSAVE if the CPU has feature FXSR; otherwise FSAVE is used.
  16.118 - */
  16.119 -typedef struct {
  16.120 -#define ECF_I387_VALID (1<<0)
  16.121 -    unsigned long flags;
  16.122 -    execution_context_t cpu_ctxt;           /* User-level CPU registers     */
  16.123 -    char          fpu_ctxt[256];            /* User-level FPU registers     */
  16.124 -    trap_info_t   trap_ctxt[256];           /* Virtual IDT                  */
  16.125 -    unsigned int  fast_trap_idx;            /* "Fast trap" vector offset    */
  16.126 -    unsigned long ldt_base, ldt_ents;       /* LDT (linear address, # ents) */
  16.127 -    unsigned long gdt_frames[16], gdt_ents; /* GDT (machine frames, # ents) */
  16.128 -    unsigned long guestos_ss, guestos_esp;  /* Virtual TSS (only SS1/ESP1)  */
  16.129 -    unsigned long pt_base;                  /* CR3 (pagetable base)         */
  16.130 -    unsigned long debugreg[8];              /* DB0-DB7 (debug registers)    */
  16.131 -    unsigned long event_callback_cs;        /* CS:EIP of event callback     */
  16.132 -    unsigned long event_callback_eip;
  16.133 -    unsigned long failsafe_callback_cs;     /* CS:EIP of failsafe callback  */
  16.134 -    unsigned long failsafe_callback_eip;
  16.135 -} PACKED full_execution_context_t;
  16.136 -
  16.137 -#define ARCH_HAS_FAST_TRAP
  16.138 -
  16.139 -#endif
  16.140 -
  16.141 -#endif
    17.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    17.2 +++ b/xen/include/hypervisor-ifs/arch-x86_32.h	Fri Jun 11 21:36:10 2004 +0000
    17.3 @@ -0,0 +1,138 @@
    17.4 +/******************************************************************************
    17.5 + * arch-i386/hypervisor-if.h
    17.6 + * 
    17.7 + * Guest OS interface to x86 32-bit Xen.
    17.8 + */
    17.9 +
   17.10 +#ifndef __HYPERVISOR_IF_I386_H__
   17.11 +#define __HYPERVISOR_IF_I386_H__
   17.12 +
   17.13 +/*
   17.14 + * Pointers and other address fields inside interface structures are padded to
   17.15 + * 64 bits. This means that field alignments aren't different between 32- and
   17.16 + * 64-bit architectures. 
   17.17 + */
   17.18 +/* NB. Multi-level macro ensures __LINE__ is expanded before concatenation. */
   17.19 +#define __MEMORY_PADDING(_X) u32 __pad_ ## _X
   17.20 +#define _MEMORY_PADDING(_X)  __MEMORY_PADDING(_X)
   17.21 +#define MEMORY_PADDING       _MEMORY_PADDING(__LINE__)
   17.22 +
   17.23 +/*
   17.24 + * SEGMENT DESCRIPTOR TABLES
   17.25 + */
   17.26 +/*
   17.27 + * A number of GDT entries are reserved by Xen. These are not situated at the
   17.28 + * start of the GDT because some stupid OSes export hard-coded selector values
   17.29 + * in their ABI. These hard-coded values are always near the start of the GDT,
   17.30 + * so Xen places itself out of the way.
   17.31 + * 
   17.32 + * NB. The reserved range is inclusive (that is, both FIRST_RESERVED_GDT_ENTRY
   17.33 + * and LAST_RESERVED_GDT_ENTRY are reserved).
   17.34 + */
   17.35 +#define NR_RESERVED_GDT_ENTRIES    40
   17.36 +#define FIRST_RESERVED_GDT_ENTRY   256
   17.37 +#define LAST_RESERVED_GDT_ENTRY    \
   17.38 +  (FIRST_RESERVED_GDT_ENTRY + NR_RESERVED_GDT_ENTRIES - 1)
   17.39 +
   17.40 +
   17.41 +/*
   17.42 + * These flat segments are in the Xen-private section of every GDT. Since these
   17.43 + * are also present in the initial GDT, many OSes will be able to avoid
   17.44 + * installing their own GDT.
   17.45 + */
   17.46 +#define FLAT_RING1_CS 0x0819    /* GDT index 259 */
   17.47 +#define FLAT_RING1_DS 0x0821    /* GDT index 260 */
   17.48 +#define FLAT_RING3_CS 0x082b    /* GDT index 261 */
   17.49 +#define FLAT_RING3_DS 0x0833    /* GDT index 262 */
   17.50 +
   17.51 +#define FLAT_GUESTOS_CS FLAT_RING1_CS
   17.52 +#define FLAT_GUESTOS_DS FLAT_RING1_DS
   17.53 +#define FLAT_USER_CS    FLAT_RING3_CS
   17.54 +#define FLAT_USER_DS    FLAT_RING3_DS
   17.55 +
   17.56 +/* And the trap vector is... */
   17.57 +#define TRAP_INSTR "int $0x82"
   17.58 +
   17.59 +
   17.60 +/*
   17.61 + * Virtual addresses beyond this are not modifiable by guest OSes. The 
   17.62 + * machine->physical mapping table starts at this address, read-only.
   17.63 + */
   17.64 +#define HYPERVISOR_VIRT_START (0xFC000000UL)
   17.65 +#ifndef machine_to_phys_mapping
   17.66 +#define machine_to_phys_mapping ((unsigned long *)HYPERVISOR_VIRT_START)
   17.67 +#endif
   17.68 +
   17.69 +#ifndef __ASSEMBLY__
   17.70 +
   17.71 +/* NB. Both the following are 32 bits each. */
   17.72 +typedef unsigned long memory_t;   /* Full-sized pointer/address/memory-size. */
   17.73 +typedef unsigned long cpureg_t;   /* Full-sized register.                    */
   17.74 +
   17.75 +/*
   17.76 + * Send an array of these to HYPERVISOR_set_trap_table()
   17.77 + */
   17.78 +#define TI_GET_DPL(_ti)      ((_ti)->flags & 3)
   17.79 +#define TI_GET_IF(_ti)       ((_ti)->flags & 4)
   17.80 +#define TI_SET_DPL(_ti,_dpl) ((_ti)->flags |= (_dpl))
   17.81 +#define TI_SET_IF(_ti,_if)   ((_ti)->flags |= ((!!(_if))<<2))
   17.82 +typedef struct {
   17.83 +    u8       vector;  /* 0: exception vector                              */
   17.84 +    u8       flags;   /* 1: 0-3: privilege level; 4: clear event enable?  */
   17.85 +    u16      cs;      /* 2: code selector                                 */
   17.86 +    memory_t address; /* 4: code address                                  */
   17.87 +} PACKED trap_info_t; /* 8 bytes */
   17.88 +
   17.89 +typedef struct
   17.90 +{
   17.91 +    unsigned long ebx;
   17.92 +    unsigned long ecx;
   17.93 +    unsigned long edx;
   17.94 +    unsigned long esi;
   17.95 +    unsigned long edi;
   17.96 +    unsigned long ebp;
   17.97 +    unsigned long eax;
   17.98 +    unsigned long ds;
   17.99 +    unsigned long es;
  17.100 +    unsigned long fs;
  17.101 +    unsigned long gs;
  17.102 +    unsigned long _unused;
  17.103 +    unsigned long eip;
  17.104 +    unsigned long cs;
  17.105 +    unsigned long eflags;
  17.106 +    unsigned long esp;
  17.107 +    unsigned long ss;
  17.108 +} PACKED execution_context_t;
  17.109 +
  17.110 +typedef struct {
  17.111 +    u32  tsc_bits;      /* 0: 32 bits read from the CPU's TSC. */
  17.112 +    u32  tsc_bitshift;  /* 4: 'tsc_bits' uses N:N+31 of TSC.   */
  17.113 +} PACKED tsc_timestamp_t; /* 8 bytes */
  17.114 +
  17.115 +/*
  17.116 + * The following is all CPU context. Note that the i387_ctxt block is filled 
  17.117 + * in by FXSAVE if the CPU has feature FXSR; otherwise FSAVE is used.
  17.118 + */
  17.119 +typedef struct {
  17.120 +#define ECF_I387_VALID (1<<0)
  17.121 +    unsigned long flags;
  17.122 +    execution_context_t cpu_ctxt;           /* User-level CPU registers     */
  17.123 +    char          fpu_ctxt[256];            /* User-level FPU registers     */
  17.124 +    trap_info_t   trap_ctxt[256];           /* Virtual IDT                  */
  17.125 +    unsigned int  fast_trap_idx;            /* "Fast trap" vector offset    */
  17.126 +    unsigned long ldt_base, ldt_ents;       /* LDT (linear address, # ents) */
  17.127 +    unsigned long gdt_frames[16], gdt_ents; /* GDT (machine frames, # ents) */
  17.128 +    unsigned long guestos_ss, guestos_esp;  /* Virtual TSS (only SS1/ESP1)  */
  17.129 +    unsigned long pt_base;                  /* CR3 (pagetable base)         */
  17.130 +    unsigned long debugreg[8];              /* DB0-DB7 (debug registers)    */
  17.131 +    unsigned long event_callback_cs;        /* CS:EIP of event callback     */
  17.132 +    unsigned long event_callback_eip;
  17.133 +    unsigned long failsafe_callback_cs;     /* CS:EIP of failsafe callback  */
  17.134 +    unsigned long failsafe_callback_eip;
  17.135 +} PACKED full_execution_context_t;
  17.136 +
  17.137 +#define ARCH_HAS_FAST_TRAP
  17.138 +
  17.139 +#endif
  17.140 +
  17.141 +#endif
    18.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    18.2 +++ b/xen/include/hypervisor-ifs/arch-x86_64.h	Fri Jun 11 21:36:10 2004 +0000
    18.3 @@ -0,0 +1,135 @@
    18.4 +/******************************************************************************
    18.5 + * arch-x86_64/hypervisor-if.h
    18.6 + * 
    18.7 + * Guest OS interface to AMD x86-64 bit Xen.
    18.8 + */
    18.9 +
   18.10 +#ifndef __HYPERVISOR_IF_X86_64_H__
   18.11 +#define __HYPERVISOR_IF_X86_64_H__
   18.12 +
   18.13 +/* Pointers are naturally 64 bits in this architecture; no padding needed. */
   18.14 +#define _MEMORY_PADDING(_X)
   18.15 +#define MEMORY_PADDING 
   18.16 +
   18.17 +/*
   18.18 + * SEGMENT DESCRIPTOR TABLES
   18.19 + */
   18.20 +/*
   18.21 + * A number of GDT entries are reserved by Xen. These are not situated at the
   18.22 + * start of the GDT because some stupid OSes export hard-coded selector values
   18.23 + * in their ABI. These hard-coded values are always near the start of the GDT,
   18.24 + * so Xen places itself out of the way.
   18.25 + * 
   18.26 + * NB. The reserved range is inclusive (that is, both FIRST_RESERVED_GDT_ENTRY
   18.27 + * and LAST_RESERVED_GDT_ENTRY are reserved).
   18.28 + */
   18.29 +#define NR_RESERVED_GDT_ENTRIES    40 
   18.30 +#define FIRST_RESERVED_GDT_ENTRY   256
   18.31 +#define LAST_RESERVED_GDT_ENTRY    \
   18.32 +  (FIRST_RESERVED_GDT_ENTRY + NR_RESERVED_GDT_ENTRIES - 1)
   18.33 +
   18.34 +/*
   18.35 + * 64-bit segment selectors
   18.36 + * These flat segments are in the Xen-private section of every GDT. Since these
   18.37 + * are also present in the initial GDT, many OSes will be able to avoid
   18.38 + * installing their own GDT.
   18.39 + */
   18.40 +
   18.41 +#define FLAT_RING3_CS32 0x0823  /* GDT index 260 */
   18.42 +#define FLAT_RING3_CS64 0x082b  /* GDT index 261 */
   18.43 +#define FLAT_RING3_DS   0x0833  /* GDT index 262 */
   18.44 +
   18.45 +#define FLAT_GUESTOS_DS   FLAT_RING3_DS
   18.46 +#define FLAT_GUESTOS_CS   FLAT_RING3_CS64
   18.47 +#define FLAT_GUESTOS_CS32 FLAT_RING3_CS32
   18.48 +
   18.49 +#define FLAT_USER_DS      FLAT_RING3_DS
   18.50 +#define FLAT_USER_CS      FLAT_RING3_CS64
   18.51 +#define FLAT_USER_CS32    FLAT_RING3_CS32
   18.52 +
   18.53 +/* And the trap vector is... */
   18.54 +#define TRAP_INSTR "syscall"
   18.55 +
   18.56 +/* The machine->physical mapping table starts at this address, read-only. */
   18.57 +#ifndef machine_to_phys_mapping
   18.58 +#define machine_to_phys_mapping ((unsigned long *)0xffff810000000000ULL)
   18.59 +#endif
   18.60 +
   18.61 +#ifndef __ASSEMBLY__
   18.62 +
   18.63 +/* NB. Both the following are 64 bits each. */
   18.64 +typedef unsigned long memory_t;   /* Full-sized pointer/address/memory-size. */
   18.65 +typedef unsigned long cpureg_t;   /* Full-sized register.                    */
   18.66 +
   18.67 +/*
   18.68 + * Send an array of these to HYPERVISOR_set_trap_table()
   18.69 + */
   18.70 +#define TI_GET_DPL(_ti)      ((_ti)->flags & 3)
   18.71 +#define TI_GET_IF(_ti)       ((_ti)->flags & 4)
   18.72 +#define TI_SET_DPL(_ti,_dpl) ((_ti)->flags |= (_dpl))
   18.73 +#define TI_SET_IF(_ti,_if)   ((_ti)->flags |= ((!!(_if))<<2))
   18.74 +typedef struct {
   18.75 +    u8       vector;  /* 0: exception vector                              */
   18.76 +    u8       flags;   /* 1: 0-3: privilege level; 4: clear event enable?  */
   18.77 +    u16      cs;      /* 2: code selector                                 */
   18.78 +    u32      __pad;   /* 4 */
   18.79 +    memory_t address; /* 8: code address                                  */
   18.80 +} PACKED trap_info_t; /* 16 bytes */
   18.81 +
   18.82 +typedef struct
   18.83 +{
   18.84 +    unsigned long r15;
   18.85 +    unsigned long r14;
   18.86 +    unsigned long r13;
   18.87 +    unsigned long r12;
   18.88 +    unsigned long rbp;
   18.89 +    unsigned long rbx;
   18.90 +    unsigned long r11;
   18.91 +    unsigned long r10;
   18.92 +    unsigned long r9;
   18.93 +    unsigned long r8;
   18.94 +    unsigned long rax;
   18.95 +    unsigned long rcx;
   18.96 +    unsigned long rdx;
   18.97 +    unsigned long rsi;
   18.98 +    unsigned long rdi;
   18.99 +    unsigned long rip;
  18.100 +    unsigned long cs;
  18.101 +    unsigned long eflags;
  18.102 +    unsigned long rsp;
  18.103 +    unsigned long ss;
  18.104 +} PACKED execution_context_t;
  18.105 +
  18.106 +/*
  18.107 + * NB. This may become a 64-bit count with no shift. If this happens then the 
  18.108 + * structure size will still be 8 bytes, so no other alignments will change.
  18.109 + */
  18.110 +typedef struct {
  18.111 +    u32  tsc_bits;      /* 0: 32 bits read from the CPU's TSC. */
  18.112 +    u32  tsc_bitshift;  /* 4: 'tsc_bits' uses N:N+31 of TSC.   */
  18.113 +} PACKED tsc_timestamp_t; /* 8 bytes */
  18.114 +
  18.115 +/*
  18.116 + * The following is all CPU context. Note that the i387_ctxt block is filled 
  18.117 + * in by FXSAVE if the CPU has feature FXSR; otherwise FSAVE is used.
  18.118 + */
  18.119 +typedef struct {
  18.120 +#define ECF_I387_VALID (1<<0)
  18.121 +    unsigned long flags;
  18.122 +    execution_context_t cpu_ctxt;           /* User-level CPU registers     */
  18.123 +    char          fpu_ctxt[512];            /* User-level FPU registers     */
  18.124 +    trap_info_t   trap_ctxt[256];           /* Virtual IDT                  */
  18.125 +    unsigned long ldt_base, ldt_ents;       /* LDT (linear address, # ents) */
  18.126 +    unsigned long gdt_frames[16], gdt_ents; /* GDT (machine frames, # ents) */
  18.127 +    unsigned long guestos_ss, guestos_esp;  /* Virtual TSS (only SS1/ESP1)  */
  18.128 +    unsigned long pt_base;                  /* CR3 (pagetable base)         */
  18.129 +    unsigned long debugreg[8];              /* DB0-DB7 (debug registers)    */
  18.130 +    unsigned long event_callback_cs;        /* CS:EIP of event callback     */
  18.131 +    unsigned long event_callback_eip;
  18.132 +    unsigned long failsafe_callback_cs;     /* CS:EIP of failsafe callback  */
  18.133 +    unsigned long failsafe_callback_eip;
  18.134 +} PACKED full_execution_context_t;
  18.135 +
  18.136 +#endif /* !__ASSEMBLY__ */
  18.137 +
  18.138 +#endif /* __HYPERVISOR_IF_H__ */
    19.1 --- a/xen/include/hypervisor-ifs/arch-x86_64/hypervisor-if.h	Fri Jun 11 18:32:46 2004 +0000
    19.2 +++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
    19.3 @@ -1,134 +0,0 @@
    19.4 -/******************************************************************************
    19.5 - * arch-x86_64/hypervisor-if.h
    19.6 - * 
    19.7 - * Guest OS interface to AMD x86-64 bit Xen.
    19.8 - */
    19.9 -
   19.10 -#ifndef __HYPERVISOR_IF_X86_64_H__
   19.11 -#define __HYPERVISOR_IF_X86_64_H__
   19.12 -
   19.13 -/* Pointers are naturally 64 bits in this architecture; no padding needed. */
   19.14 -#define MEMORY_PADDING()    ((void)0)
   19.15 -
   19.16 -/*
   19.17 - * SEGMENT DESCRIPTOR TABLES
   19.18 - */
   19.19 -/*
   19.20 - * A number of GDT entries are reserved by Xen. These are not situated at the
   19.21 - * start of the GDT because some stupid OSes export hard-coded selector values
   19.22 - * in their ABI. These hard-coded values are always near the start of the GDT,
   19.23 - * so Xen places itself out of the way.
   19.24 - * 
   19.25 - * NB. The reserved range is inclusive (that is, both FIRST_RESERVED_GDT_ENTRY
   19.26 - * and LAST_RESERVED_GDT_ENTRY are reserved).
   19.27 - */
   19.28 -#define NR_RESERVED_GDT_ENTRIES    40 
   19.29 -#define FIRST_RESERVED_GDT_ENTRY   256
   19.30 -#define LAST_RESERVED_GDT_ENTRY    \
   19.31 -  (FIRST_RESERVED_GDT_ENTRY + NR_RESERVED_GDT_ENTRIES - 1)
   19.32 -
   19.33 -/*
   19.34 - * 64-bit segment selectors
   19.35 - * These flat segments are in the Xen-private section of every GDT. Since these
   19.36 - * are also present in the initial GDT, many OSes will be able to avoid
   19.37 - * installing their own GDT.
   19.38 - */
   19.39 -
   19.40 -#define FLAT_RING3_CS32 0x0823  /* GDT index 260 */
   19.41 -#define FLAT_RING3_CS64 0x082b  /* GDT index 261 */
   19.42 -#define FLAT_RING3_DS   0x0833  /* GDT index 262 */
   19.43 -
   19.44 -#define FLAT_GUESTOS_DS   FLAT_RING3_DS
   19.45 -#define FLAT_GUESTOS_CS   FLAT_RING3_CS64
   19.46 -#define FLAT_GUESTOS_CS32 FLAT_RING3_CS32
   19.47 -
   19.48 -#define FLAT_USER_DS      FLAT_RING3_DS
   19.49 -#define FLAT_USER_CS      FLAT_RING3_CS64
   19.50 -#define FLAT_USER_CS32    FLAT_RING3_CS32
   19.51 -
   19.52 -/* And the trap vector is... */
   19.53 -#define TRAP_INSTR "syscall"
   19.54 -
   19.55 -/* The machine->physical mapping table starts at this address, read-only. */
   19.56 -#ifndef machine_to_phys_mapping
   19.57 -#define machine_to_phys_mapping ((unsigned long *)0xffff810000000000ULL)
   19.58 -#endif
   19.59 -
   19.60 -#ifndef __ASSEMBLY__
   19.61 -
   19.62 -/* NB. Both the following are 64 bits each. */
   19.63 -typedef unsigned long memory_t;   /* Full-sized pointer/address/memory-size. */
   19.64 -typedef unsigned long cpureg_t;   /* Full-sized register.                    */
   19.65 -
   19.66 -/*
   19.67 - * Send an array of these to HYPERVISOR_set_trap_table()
   19.68 - */
   19.69 -#define TI_GET_DPL(_ti)      ((_ti)->flags & 3)
   19.70 -#define TI_GET_IF(_ti)       ((_ti)->flags & 4)
   19.71 -#define TI_SET_DPL(_ti,_dpl) ((_ti)->flags |= (_dpl))
   19.72 -#define TI_SET_IF(_ti,_if)   ((_ti)->flags |= ((!!(_if))<<2))
   19.73 -typedef struct {
   19.74 -    u8       vector;  /* 0: exception vector                              */
   19.75 -    u8       flags;   /* 1: 0-3: privilege level; 4: clear event enable?  */
   19.76 -    u16      cs;      /* 2: code selector                                 */
   19.77 -    u32      __pad;   /* 4 */
   19.78 -    memory_t address; /* 8: code address                                  */
   19.79 -} PACKED trap_info_t; /* 16 bytes */
   19.80 -
   19.81 -typedef struct
   19.82 -{
   19.83 -    unsigned long r15;
   19.84 -    unsigned long r14;
   19.85 -    unsigned long r13;
   19.86 -    unsigned long r12;
   19.87 -    unsigned long rbp;
   19.88 -    unsigned long rbx;
   19.89 -    unsigned long r11;
   19.90 -    unsigned long r10;
   19.91 -    unsigned long r9;
   19.92 -    unsigned long r8;
   19.93 -    unsigned long rax;
   19.94 -    unsigned long rcx;
   19.95 -    unsigned long rdx;
   19.96 -    unsigned long rsi;
   19.97 -    unsigned long rdi;
   19.98 -    unsigned long rip;
   19.99 -    unsigned long cs;
  19.100 -    unsigned long eflags;
  19.101 -    unsigned long rsp;
  19.102 -    unsigned long ss;
  19.103 -} PACKED execution_context_t;
  19.104 -
  19.105 -/*
  19.106 - * NB. This may become a 64-bit count with no shift. If this happens then the 
  19.107 - * structure size will still be 8 bytes, so no other alignments will change.
  19.108 - */
  19.109 -typedef struct {
  19.110 -    u32  tsc_bits;      /* 0: 32 bits read from the CPU's TSC. */
  19.111 -    u32  tsc_bitshift;  /* 4: 'tsc_bits' uses N:N+31 of TSC.   */
  19.112 -} PACKED tsc_timestamp_t; /* 8 bytes */
  19.113 -
  19.114 -/*
  19.115 - * The following is all CPU context. Note that the i387_ctxt block is filled 
  19.116 - * in by FXSAVE if the CPU has feature FXSR; otherwise FSAVE is used.
  19.117 - */
  19.118 -typedef struct {
  19.119 -#define ECF_I387_VALID (1<<0)
  19.120 -    unsigned long flags;
  19.121 -    execution_context_t cpu_ctxt;           /* User-level CPU registers     */
  19.122 -    char          fpu_ctxt[512];            /* User-level FPU registers     */
  19.123 -    trap_info_t   trap_ctxt[256];           /* Virtual IDT                  */
  19.124 -    unsigned long ldt_base, ldt_ents;       /* LDT (linear address, # ents) */
  19.125 -    unsigned long gdt_frames[16], gdt_ents; /* GDT (machine frames, # ents) */
  19.126 -    unsigned long guestos_ss, guestos_esp;  /* Virtual TSS (only SS1/ESP1)  */
  19.127 -    unsigned long pt_base;                  /* CR3 (pagetable base)         */
  19.128 -    unsigned long debugreg[8];              /* DB0-DB7 (debug registers)    */
  19.129 -    unsigned long event_callback_cs;        /* CS:EIP of event callback     */
  19.130 -    unsigned long event_callback_eip;
  19.131 -    unsigned long failsafe_callback_cs;     /* CS:EIP of failsafe callback  */
  19.132 -    unsigned long failsafe_callback_eip;
  19.133 -} PACKED full_execution_context_t;
  19.134 -
  19.135 -#endif /* !__ASSEMBLY__ */
  19.136 -
  19.137 -#endif /* __HYPERVISOR_IF_H__ */
    20.1 --- a/xen/include/hypervisor-ifs/hypervisor-if.h	Fri Jun 11 18:32:46 2004 +0000
    20.2 +++ b/xen/include/hypervisor-ifs/hypervisor-if.h	Fri Jun 11 21:36:10 2004 +0000
    20.3 @@ -10,7 +10,13 @@
    20.4  /* GCC-specific way to pack structure definitions (no implicit padding). */
    20.5  #define PACKED __attribute__ ((packed))
    20.6  
    20.7 -#include "arch/hypervisor-if.h"
    20.8 +#if defined(__i386__)
    20.9 +#include "arch-x86_32.h"
   20.10 +#elif defined(__x86_64__)
   20.11 +#include "arch-x86_64.h"
   20.12 +#else
   20.13 +#error "Unsupported architecture"
   20.14 +#endif
   20.15  
   20.16  /*
   20.17   * HYPERVISOR "SYSTEM CALLS"