ia64/xen-unstable

changeset 9184:503c4d8454e5

Clean up vlapic code.

Signed-off-by: Xin Li <xin.b.li@intel.com>
Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com>
author kaf24@firebug.cl.cam.ac.uk
date Tue Mar 07 18:41:37 2006 +0100 (2006-03-07)
parents 4293d6760cef
children ccca12a2bee2
files xen/arch/x86/apic.c xen/arch/x86/hvm/vlapic.c xen/include/asm-x86/hvm/support.h xen/include/asm-x86/hvm/vlapic.h xen/include/asm-x86/hvm/vpit.h
line diff
     1.1 --- a/xen/arch/x86/apic.c	Tue Mar 07 18:40:42 2006 +0100
     1.2 +++ b/xen/arch/x86/apic.c	Tue Mar 07 18:41:37 2006 +0100
     1.3 @@ -892,9 +892,9 @@ int __init calibrate_APIC_clock(void)
     1.4      return result;
     1.5  }
     1.6  
     1.7 -unsigned int get_apic_bus_scale(void)
     1.8 +u32 get_apic_bus_cycle(void)
     1.9  {
    1.10 -    return bus_scale;
    1.11 +    return bus_cycle;
    1.12  }
    1.13  
    1.14  static unsigned int calibration_result;
     2.1 --- a/xen/arch/x86/hvm/vlapic.c	Tue Mar 07 18:40:42 2006 +0100
     2.2 +++ b/xen/arch/x86/hvm/vlapic.c	Tue Mar 07 18:41:37 2006 +0100
     2.3 @@ -37,7 +37,9 @@
     2.4  /* XXX remove this definition after GFW enabled */
     2.5  #define VLAPIC_NO_BIOS
     2.6  
     2.7 -extern unsigned int get_apic_bus_scale(void);
     2.8 +extern u32 get_apic_bus_cycle(void);
     2.9 +
    2.10 +#define APIC_BUS_CYCLE_NS (((s_time_t)get_apic_bus_cycle()) / 1000)
    2.11  
    2.12  static unsigned int vlapic_lvt_mask[VLAPIC_LVT_NUM] =
    2.13  {
    2.14 @@ -50,7 +52,8 @@ int vlapic_find_highest_irr(struct vlapi
    2.15  
    2.16      result = find_highest_bit((uint32_t *)&vlapic->irr[0], INTR_LEN_32);
    2.17  
    2.18 -    if (result != -1 && result < 16) {
    2.19 +    if ( result != -1 && result < 16 )
    2.20 +    {
    2.21          printk("VLAPIC: irr on reserved bits %d\n ", result);
    2.22          domain_crash_synchronous();
    2.23      }
    2.24 @@ -78,10 +81,11 @@ int vlapic_find_highest_isr(struct vlapi
    2.25  
    2.26      result = find_highest_bit((uint32_t *)&vlapic->isr[0], INTR_LEN_32);
    2.27  
    2.28 -    if (result != -1 && result < 16) {
    2.29 +    if ( result != -1 && result < 16 )
    2.30 +    {
    2.31          int i = 0;
    2.32          printk("VLAPIC: isr on reserved bits %d, isr is\n ", result);
    2.33 -        for (i = 0; i < INTR_LEN_32; i += 2)
    2.34 +        for ( i = 0; i < INTR_LEN_32; i += 2 )
    2.35              printk("%d: 0x%08x%08x\n", i, vlapic->isr[i], vlapic->isr[i+1]);
    2.36          return -1;
    2.37      }
    2.38 @@ -97,12 +101,12 @@ uint32_t vlapic_update_ppr(struct vlapic
    2.39      tpr = (vlapic->task_priority >> 4) & 0xf;      /* we want 7:4 */
    2.40  
    2.41      isr = vlapic_find_highest_isr(vlapic);
    2.42 -    if (isr != -1)
    2.43 +    if ( isr != -1 )
    2.44          isrv = (isr >> 4) & 0xf;   /* ditto */
    2.45      else
    2.46          isrv = 0;
    2.47  
    2.48 -    if (tpr >= isrv)
    2.49 +    if ( tpr >= isrv )
    2.50          ppr = vlapic->task_priority & 0xff;
    2.51      else
    2.52          ppr = isrv << 4;  /* low 4 bits of PPR have to be cleared */
    2.53 @@ -110,7 +114,7 @@ uint32_t vlapic_update_ppr(struct vlapic
    2.54      vlapic->processor_priority = ppr;
    2.55  
    2.56      HVM_DBG_LOG(DBG_LEVEL_VLAPIC_INTERRUPT,
    2.57 -                "vlapic_update_ppr: vlapic %p ppr %x isr %x isrv %x",
    2.58 +                "vlapic %p, ppr 0x%x, isr 0x%x, isrv 0x%x.",
    2.59                  vlapic, ppr, isr, isrv);
    2.60  
    2.61      return ppr;
    2.62 @@ -124,46 +128,52 @@ static int vlapic_match_dest(struct vcpu
    2.63      int result = 0;
    2.64      struct vlapic *target = VLAPIC(v);
    2.65  
    2.66 -    HVM_DBG_LOG(DBG_LEVEL_VLAPIC, "vlapic_match_dest: "
    2.67 -                "target %p source %p dest %x dest_mode %x short_hand %x "
    2.68 -                "delivery_mode %x",
    2.69 +    HVM_DBG_LOG(DBG_LEVEL_VLAPIC, "target %p, source %p, dest 0x%x, "
    2.70 +                "dest_mode 0x%x, short_hand 0x%x, delivery_mode 0x%x.",
    2.71                  target, source, dest, dest_mode, short_hand, delivery_mode);
    2.72  
    2.73 -    if ( unlikely(!target) &&
    2.74 -         ( (delivery_mode != VLAPIC_DELIV_MODE_INIT) &&
    2.75 -           (delivery_mode != VLAPIC_DELIV_MODE_STARTUP) &&
    2.76 -           (delivery_mode != VLAPIC_DELIV_MODE_NMI) )) {
    2.77 -        HVM_DBG_LOG(DBG_LEVEL_VLAPIC, "vlapic_match_dest "
    2.78 -                    "uninitialized target v %p delivery_mode %x dest %x\n",
    2.79 -                    v, delivery_mode, dest); 
    2.80 -        return result; 
    2.81 +    if ( unlikely(target == NULL) &&
    2.82 +         ((delivery_mode != VLAPIC_DELIV_MODE_INIT) &&
    2.83 +          (delivery_mode != VLAPIC_DELIV_MODE_STARTUP) &&
    2.84 +          (delivery_mode != VLAPIC_DELIV_MODE_NMI)) )
    2.85 +    {
    2.86 +        HVM_DBG_LOG(DBG_LEVEL_VLAPIC, "uninitialized target vcpu %p, "
    2.87 +                    "delivery_mode 0x%x, dest 0x%x.\n", v, delivery_mode, dest);
    2.88 +        return result;
    2.89      }
    2.90  
    2.91 -    switch (short_hand) {
    2.92 +    switch ( short_hand ) {
    2.93      case VLAPIC_NO_SHORTHAND:
    2.94 -        if (!dest_mode) {   /* Physical */
    2.95 -            result = ((target ? target->id : v->vcpu_id ) == dest);
    2.96 -        } else {            /* Logical */
    2.97 -            if (!target) 
    2.98 +        if ( !dest_mode )   /* Physical */
    2.99 +        {
   2.100 +            result = (target != NULL ? target->id : v->vcpu_id) == dest;
   2.101 +        }
   2.102 +        else                /* Logical */
   2.103 +        {
   2.104 +            if ( target == NULL )
   2.105                  break;
   2.106 -            if (((target->dest_format >> 28) & 0xf) == 0xf) {   /* Flat mode */
   2.107 +            if ( ((target->dest_format >> 28) & 0xf) == 0xf )   /* Flat mode */
   2.108 +            {
   2.109                  result = (target->logical_dest >> 24) & dest;
   2.110 -            } else {
   2.111 -                if ((delivery_mode == VLAPIC_DELIV_MODE_LPRI) &&
   2.112 -                   (dest == 0xff)) {
   2.113 +            }
   2.114 +            else
   2.115 +            {
   2.116 +                if ( (delivery_mode == VLAPIC_DELIV_MODE_LPRI) &&
   2.117 +                     (dest == 0xff) )
   2.118 +                {
   2.119                      /* What shall we do now? */
   2.120                      printk("Broadcast IPI with lowest priority "
   2.121                             "delivery mode\n");
   2.122                      domain_crash_synchronous();
   2.123                  }
   2.124                  result = (target->logical_dest == (dest & 0xf)) ?
   2.125 -                  ((target->logical_dest >> 4) & (dest >> 4)) : 0;
   2.126 +                         ((target->logical_dest >> 4) & (dest >> 4)) : 0;
   2.127              }
   2.128          }
   2.129          break;
   2.130  
   2.131      case VLAPIC_SHORTHAND_SELF:
   2.132 -        if (target == source)
   2.133 +        if ( target == source )
   2.134              result = 1;
   2.135          break;
   2.136  
   2.137 @@ -172,7 +182,7 @@ static int vlapic_match_dest(struct vcpu
   2.138          break;
   2.139  
   2.140      case VLAPIC_SHORTHAND_EXCLUDE_SELF:
   2.141 -        if (target != source)
   2.142 +        if ( target != source )
   2.143              result = 1;
   2.144          break;
   2.145  
   2.146 @@ -190,27 +200,30 @@ static int vlapic_match_dest(struct vcpu
   2.147  static int vlapic_accept_irq(struct vcpu *v, int delivery_mode,
   2.148                               int vector, int level, int trig_mode)
   2.149  {
   2.150 -    int	result = 0;
   2.151 +    int result = 0;
   2.152      struct vlapic *vlapic = VLAPIC(v);
   2.153  
   2.154 -    switch (delivery_mode) {
   2.155 +    switch ( delivery_mode ) {
   2.156      case VLAPIC_DELIV_MODE_FIXED:
   2.157      case VLAPIC_DELIV_MODE_LPRI:
   2.158          /* FIXME add logic for vcpu on reset */
   2.159 -        if (unlikely(!vlapic || !vlapic_enabled(vlapic)))
   2.160 -            return result;
   2.161 +        if ( unlikely(vlapic == NULL || !vlapic_enabled(vlapic)) )
   2.162 +            break;
   2.163  
   2.164 -        if (test_and_set_bit(vector, &vlapic->irr[0])) {
   2.165 +        if ( test_and_set_bit(vector, &vlapic->irr[0]) )
   2.166 +        {
   2.167              printk("<vlapic_accept_irq>"
   2.168 -                    "level trig mode repeatedly for vector %d\n", vector);
   2.169 -            result = 0;
   2.170 -        } else {
   2.171 -            if (level) {
   2.172 -                printk("<vlapic_accept_irq> level trig mode for vector %d\n", vector);
   2.173 -                set_bit(vector, &vlapic->tmr[0]);
   2.174 -            }
   2.175 +                   "level trig mode repeatedly for vector %d\n", vector);
   2.176 +            break;
   2.177          }
   2.178 -        evtchn_set_pending(vlapic->vcpu, iopacket_port(vlapic->vcpu));
   2.179 +
   2.180 +        if ( level )
   2.181 +        {
   2.182 +            printk("<vlapic_accept_irq> level trig mode for vector %d\n",
   2.183 +                   vector);
   2.184 +            set_bit(vector, &vlapic->tmr[0]);
   2.185 +        }
   2.186 +        evtchn_set_pending(v, iopacket_port(v));
   2.187          result = 1;
   2.188          break;
   2.189  
   2.190 @@ -225,11 +238,15 @@ static int vlapic_accept_irq(struct vcpu
   2.191          break;
   2.192  
   2.193      case VLAPIC_DELIV_MODE_INIT:
   2.194 -        if ( !level && trig_mode == 1 ) {        //Deassert
   2.195 +        if ( !level && trig_mode == 1 )     //Deassert
   2.196 +        {
   2.197              printk("This hvm_vlapic is for P4, no work for De-assert init\n");
   2.198 -        } else {
   2.199 +        }
   2.200 +        else
   2.201 +        {
   2.202              /* FIXME How to check the situation after vcpu reset? */
   2.203 -            if ( test_and_clear_bit(_VCPUF_initialised, &v->vcpu_flags) ) {
   2.204 +            if ( test_and_clear_bit(_VCPUF_initialised, &v->vcpu_flags) )
   2.205 +            {
   2.206                  printk("Reset hvm vcpu not supported yet\n");
   2.207                  domain_crash_synchronous();
   2.208              }
   2.209 @@ -247,7 +264,8 @@ static int vlapic_accept_irq(struct vcpu
   2.210          v->arch.hvm_vcpu.init_sipi_sipi_state =
   2.211                  HVM_VCPU_INIT_SIPI_SIPI_STATE_NORM;
   2.212  
   2.213 -        if ( test_bit(_VCPUF_initialised, &v->vcpu_flags) ) {
   2.214 +        if ( test_bit(_VCPUF_initialised, &v->vcpu_flags) )
   2.215 +        {
   2.216              printk("SIPI for initialized vcpu vcpuid %x\n", v->vcpu_id);
   2.217              domain_crash_synchronous();
   2.218          }
   2.219 @@ -257,7 +275,7 @@ static int vlapic_accept_irq(struct vcpu
   2.220          break;
   2.221  
   2.222      default:
   2.223 -        printk("TODO: not support interrup type %x\n", delivery_mode);
   2.224 +        printk("TODO: not support interrupt type %x\n", delivery_mode);
   2.225          domain_crash_synchronous();
   2.226          break;
   2.227      }
   2.228 @@ -276,13 +294,15 @@ struct vlapic* apic_round_robin(struct d
   2.229      int next, old;
   2.230      struct vlapic* target = NULL;
   2.231  
   2.232 -    if (dest_mode == 0) { //Physical mode
   2.233 -        printk("<apic_round_robin> lowest priority for physical mode\n");
   2.234 +    if ( dest_mode == 0 )   //Physical mode
   2.235 +    {
   2.236 +        printk("<apic_round_robin> lowest priority for physical mode.\n");
   2.237          return NULL;
   2.238      }
   2.239  
   2.240 -    if (!bitmap) {
   2.241 -        printk("<apic_round_robin> no bit on bitmap\n");
   2.242 +    if ( !bitmap )
   2.243 +    {
   2.244 +        printk("<apic_round_robin> no bit set in bitmap.\n");
   2.245          return NULL;
   2.246      }
   2.247  
   2.248 @@ -292,10 +312,12 @@ struct vlapic* apic_round_robin(struct d
   2.249  
   2.250      do {
   2.251          /* the vcpu array is arranged according to vcpu_id */
   2.252 -        if (test_bit(next, &bitmap)) {
   2.253 +        if ( test_bit(next, &bitmap) )
   2.254 +        {
   2.255              target = d->vcpu[next]->arch.hvm_vcpu.vlapic;
   2.256  
   2.257 -            if (!target || !vlapic_enabled(target)) {
   2.258 +            if ( target == NULL || !vlapic_enabled(target) )
   2.259 +            {
   2.260                  printk("warning: targe round robin local apic disabled\n");
   2.261                  /* XXX should we domain crash?? Or should we return NULL */
   2.262              }
   2.263 @@ -303,49 +325,48 @@ struct vlapic* apic_round_robin(struct d
   2.264          }
   2.265  
   2.266          next ++;
   2.267 -        if (!d->vcpu[next] ||
   2.268 -            !test_bit(_VCPUF_initialised, &d->vcpu[next]->vcpu_flags) ||
   2.269 -            next == MAX_VIRT_CPUS)
   2.270 +        if ( !d->vcpu[next] ||
   2.271 +             !test_bit(_VCPUF_initialised, &d->vcpu[next]->vcpu_flags) ||
   2.272 +             next == MAX_VIRT_CPUS )
   2.273              next = 0;
   2.274 -    }while(next != old);
   2.275 +    } while ( next != old );
   2.276  
   2.277      d->arch.hvm_domain.round_info[vector] = next;
   2.278      spin_unlock(&d->arch.hvm_domain.round_robin_lock);
   2.279 +
   2.280      return target;
   2.281  }
   2.282  
   2.283 -void
   2.284 -vlapic_EOI_set(struct vlapic *vlapic)
   2.285 +void vlapic_EOI_set(struct vlapic *vlapic)
   2.286  {
   2.287      int vector = vlapic_find_highest_isr(vlapic);
   2.288  
   2.289      /* Not every write EOI will has correpsoning ISR,
   2.290         one example is when Kernel check timer on setup_IO_APIC */
   2.291 -    if (vector == -1) {
   2.292 +    if ( vector == -1 )
   2.293          return ;
   2.294 -    }
   2.295  
   2.296 -    vlapic_clear_isr(vlapic, vector);
   2.297 +    clear_bit(vector, &vlapic->isr[0]);
   2.298      vlapic_update_ppr(vlapic);
   2.299  
   2.300 -    if (test_and_clear_bit(vector, &vlapic->tmr[0]))
   2.301 +    if ( test_and_clear_bit(vector, &vlapic->tmr[0]) )
   2.302          ioapic_update_EOI(vlapic->domain, vector);
   2.303  }
   2.304  
   2.305  int vlapic_check_vector(struct vlapic *vlapic,
   2.306                          unsigned char dm, int vector)
   2.307  {
   2.308 -    if ((dm == VLAPIC_DELIV_MODE_FIXED) && (vector < 16)) {
   2.309 +    if ( (dm == VLAPIC_DELIV_MODE_FIXED) && (vector < 16) )
   2.310 +    {
   2.311          vlapic->err_status |= 0x40;
   2.312          vlapic_accept_irq(vlapic->vcpu, VLAPIC_DELIV_MODE_FIXED,
   2.313 -          vlapic_lvt_vector(vlapic, VLAPIC_LVT_ERROR), 0, 0);
   2.314 -        printk("<vlapic_check_vector>: check fail\n");
   2.315 +                          vlapic_lvt_vector(vlapic, VLAPIC_LVT_ERROR), 0, 0);
   2.316 +        printk("<vlapic_check_vector>: check failed.\n");
   2.317          return 0;
   2.318      }
   2.319      return 1;
   2.320  }
   2.321  
   2.322 -
   2.323  void vlapic_ipi(struct vlapic *vlapic)
   2.324  {
   2.325      unsigned int dest = (vlapic->icr_high >> 24) & 0xff;
   2.326 @@ -360,68 +381,47 @@ void vlapic_ipi(struct vlapic *vlapic)
   2.327      struct vcpu *v = NULL;
   2.328      uint32_t lpr_map;
   2.329  
   2.330 -    HVM_DBG_LOG(DBG_LEVEL_VLAPIC, "vlapic_ipi: "
   2.331 -                "icr_high %x icr_low %x "
   2.332 -                "short_hand %x dest %x trig_mode %x level %x "
   2.333 -                "dest_mode %x delivery_mode %x vector %x",
   2.334 -                vlapic->icr_high, vlapic->icr_low,
   2.335 -                short_hand, dest, trig_mode, level, dest_mode,
   2.336 -                delivery_mode, vector);
   2.337 +    HVM_DBG_LOG(DBG_LEVEL_VLAPIC, "icr_high 0x%x, icr_low 0x%x, "
   2.338 +                "short_hand 0x%x, dest 0x%x, trig_mode 0x%x, level 0x%x, "
   2.339 +                "dest_mode 0x%x, delivery_mode 0x%x, vector 0x%x.",
   2.340 +                vlapic->icr_high, vlapic->icr_low, short_hand, dest,
   2.341 +                trig_mode, level, dest_mode, delivery_mode, vector);
   2.342  
   2.343 -    for_each_vcpu ( vlapic->domain, v ) {
   2.344 -        if (vlapic_match_dest(v, vlapic, short_hand,
   2.345 -                              dest, dest_mode, delivery_mode)) {
   2.346 -            if (delivery_mode == VLAPIC_DELIV_MODE_LPRI) {
   2.347 +    for_each_vcpu ( vlapic->domain, v )
   2.348 +    {
   2.349 +        if ( vlapic_match_dest(v, vlapic, short_hand,
   2.350 +                               dest, dest_mode, delivery_mode) )
   2.351 +        {
   2.352 +            if ( delivery_mode == VLAPIC_DELIV_MODE_LPRI )
   2.353                  set_bit(v->vcpu_id, &lpr_map);
   2.354 -            } else
   2.355 +            else
   2.356                  vlapic_accept_irq(v, delivery_mode,
   2.357                                    vector, level, trig_mode);
   2.358          }
   2.359      }
   2.360  
   2.361 -    if (delivery_mode == VLAPIC_DELIV_MODE_LPRI) {
   2.362 +    if ( delivery_mode == VLAPIC_DELIV_MODE_LPRI )
   2.363 +    {
   2.364          v = vlapic->vcpu;
   2.365          target = apic_round_robin(v->domain, dest_mode, vector, lpr_map);
   2.366  
   2.367 -        if (target)
   2.368 +        if ( target )
   2.369              vlapic_accept_irq(target->vcpu, delivery_mode,
   2.370                                vector, level, trig_mode);
   2.371      }
   2.372  }
   2.373  
   2.374 -static void vlapic_begin_timer(struct vlapic *vlapic)
   2.375 -{
   2.376 -    s_time_t cur = NOW(), offset;
   2.377 -
   2.378 -    offset = vlapic->timer_current *
   2.379 -      (262144 / get_apic_bus_scale()) * vlapic->timer_divide_counter;
   2.380 -    vlapic->vlapic_timer.expires = cur + offset;
   2.381 -
   2.382 -    set_timer(&(vlapic->vlapic_timer), vlapic->vlapic_timer.expires );
   2.383 -
   2.384 -    HVM_DBG_LOG(DBG_LEVEL_VLAPIC, "vlapic_begin_timer: "
   2.385 -                "bus_scale %x now %08x%08x expire %08x%08x "
   2.386 -                "offset %08x%08x current %x",
   2.387 -                get_apic_bus_scale(), (uint32_t)(cur >> 32), (uint32_t)cur,
   2.388 -                (uint32_t)(vlapic->vlapic_timer.expires >> 32),
   2.389 -                (uint32_t) vlapic->vlapic_timer.expires,
   2.390 -                (uint32_t)(offset >> 32), (uint32_t)offset,
   2.391 -                vlapic->timer_current);
   2.392 -}
   2.393 -
   2.394 -void vlapic_read_aligned(struct vlapic *vlapic, unsigned int offset,
   2.395 +static void vlapic_read_aligned(struct vlapic *vlapic, unsigned int offset,
   2.396                           unsigned int len, unsigned int *result)
   2.397  {
   2.398 -    if (len != 4) {
   2.399 -        HVM_DBG_LOG(DBG_LEVEL_VLAPIC,
   2.400 -                    "local apic read with len=%d (should be 4)", len);
   2.401 -    }
   2.402 +    if ( len != 4 )
   2.403 +        printk("<vlapic_read_aligned> read with len=%d (should be 4).\n", len);
   2.404  
   2.405      *result = 0;
   2.406  
   2.407 -    switch (offset) {
   2.408 +    switch ( offset ) {
   2.409      case APIC_ID:
   2.410 -        *result = (vlapic->id) << 24;
   2.411 +        *result = vlapic->id << 24;
   2.412          break;
   2.413  
   2.414      case APIC_LVR:
   2.415 @@ -433,7 +433,7 @@ void vlapic_read_aligned(struct vlapic *
   2.416          break;
   2.417  
   2.418      case APIC_ARBPRI:
   2.419 -        printk("Access local APIC ARBPRI register which is for P6\n");
   2.420 +        printk("access local APIC ARBPRI register which is for P6\n");
   2.421          break;
   2.422  
   2.423      case APIC_PROCPRI:
   2.424 @@ -489,7 +489,7 @@ void vlapic_read_aligned(struct vlapic *
   2.425          break;
   2.426  
   2.427      case APIC_ESR:
   2.428 -        if (vlapic->err_write_count)
   2.429 +        if ( vlapic->err_write_count )
   2.430              *result = vlapic->err_status;
   2.431          break;
   2.432  
   2.433 @@ -501,51 +501,59 @@ void vlapic_read_aligned(struct vlapic *
   2.434          *result = vlapic->icr_high;
   2.435          break;
   2.436  
   2.437 -    case APIC_LVTT:     /* LVT Timer Reg */
   2.438 -    case APIC_LVTTHMR:     /* LVT Thermal Monitor */
   2.439 -    case APIC_LVTPC:     /* LVT Performance Counter */
   2.440 -    case APIC_LVT0:     /* LVT LINT0 Reg */
   2.441 -    case APIC_LVT1:     /* LVT Lint1 Reg */
   2.442 -    case APIC_LVTERR:     /* LVT Error Reg */
   2.443 +    case APIC_LVTT:         /* LVT Timer Reg */
   2.444 +    case APIC_LVTTHMR:      /* LVT Thermal Monitor */
   2.445 +    case APIC_LVTPC:        /* LVT Performance Counter */
   2.446 +    case APIC_LVT0:         /* LVT LINT0 Reg */
   2.447 +    case APIC_LVT1:         /* LVT Lint1 Reg */
   2.448 +    case APIC_LVTERR:       /* LVT Error Reg */
   2.449          *result = vlapic->lvt[(offset - APIC_LVTT) >> 4];
   2.450          break;
   2.451  
   2.452      case APIC_TMICT:
   2.453 -        *result = vlapic->timer_initial;
   2.454 +        *result = vlapic->timer_initial_count;
   2.455          break;
   2.456  
   2.457 -    case APIC_TMCCT:         //Timer CCR
   2.458 +    case APIC_TMCCT:        //Timer CCR
   2.459          {
   2.460 -            uint32_t counter;
   2.461 -            s_time_t passed, cur = NOW();
   2.462 -
   2.463 -            if (cur <= vlapic->timer_current_update) {
   2.464 -                passed = ~0x0LL - vlapic->timer_current_update + cur;
   2.465 -                HVM_DBG_LOG(DBG_LEVEL_VLAPIC,"time elapsed");
   2.466 -            }else
   2.467 -                passed = cur - vlapic->timer_current_update;
   2.468 +            uint32_t counter_passed;
   2.469 +            s_time_t passed, now = NOW();
   2.470  
   2.471 -            counter = (passed * get_apic_bus_scale()) / (262144* vlapic->timer_divide_counter);
   2.472 -            if (vlapic->timer_current > counter)
   2.473 -                *result = vlapic->timer_current - counter;
   2.474 -            else {
   2.475 -                if (!vlapic_lvt_timer_period(vlapic))
   2.476 -                    *result = 0;
   2.477 -                //FIXME should we add interrupt here?
   2.478 +            if ( unlikely(now <= vlapic->timer_current_update) )
   2.479 +            {
   2.480 +                passed = ~0x0LL - vlapic->timer_current_update + now;
   2.481 +                HVM_DBG_LOG(DBG_LEVEL_VLAPIC, "time elapsed.");
   2.482 +            }
   2.483 +            else
   2.484 +                passed = now - vlapic->timer_current_update;
   2.485 +
   2.486 +            counter_passed = passed /
   2.487 +                             (APIC_BUS_CYCLE_NS * vlapic->timer_divide_count);
   2.488 +
   2.489 +            vlapic->timer_current_count -= counter_passed;
   2.490 +            if ( vlapic->timer_current_count <= 0 )
   2.491 +            {
   2.492 +                if ( unlikely(!vlapic_lvt_timer_period(vlapic)) )
   2.493 +                {
   2.494 +                    vlapic->timer_current_count = 0;
   2.495 +                    // FIXME: should we add interrupt here?
   2.496 +                }
   2.497                  else
   2.498 -                    //*result = counter % vlapic->timer_initial;
   2.499 -                    *result = vlapic->timer_initial - (counter - vlapic->timer_current);
   2.500 +                {
   2.501 +                    do {
   2.502 +                        vlapic->timer_current_count += vlapic->timer_initial_count;
   2.503 +                    } while ( vlapic->timer_current_count < 0 );
   2.504 +                }
   2.505              }
   2.506 -            vlapic->timer_current = *result;
   2.507 -            vlapic->timer_current_update = NOW();
   2.508 +
   2.509 +            *result = vlapic->timer_current_count;
   2.510 +            vlapic->timer_current_update = now;
   2.511  
   2.512              HVM_DBG_LOG(DBG_LEVEL_VLAPIC_TIMER,
   2.513 -                        "initial %x timer current %x "
   2.514 -                        "update %08x%08x cur %08x%08x offset %d",
   2.515 -                        vlapic->timer_initial, vlapic->timer_current,
   2.516 -                        (uint32_t)(vlapic->timer_current_update >> 32),
   2.517 -                        (uint32_t)vlapic->timer_current_update ,
   2.518 -                        (uint32_t)(cur >> 32), (uint32_t)cur, counter);
   2.519 +                        "timer initial count 0x%x, timer current count 0x%x, "
   2.520 +                        "update 0x%016"PRIx64", now 0x%016"PRIx64", offset 0x%x.",
   2.521 +                        vlapic->timer_initial_count, vlapic->timer_current_count,
   2.522 +                        vlapic->timer_current_update, now, counter_passed);
   2.523          }
   2.524          break;
   2.525  
   2.526 @@ -554,7 +562,7 @@ void vlapic_read_aligned(struct vlapic *
   2.527          break;
   2.528  
   2.529      default:
   2.530 -        printk("Read local APIC address %x not implemented\n",offset);
   2.531 +        printk("Read local APIC address 0x%x not implemented\n", offset);
   2.532          *result = 0;
   2.533          break;
   2.534      }
   2.535 @@ -569,17 +577,16 @@ static unsigned long vlapic_read(struct 
   2.536      struct vlapic *vlapic = VLAPIC(v);
   2.537      unsigned int offset = address - vlapic->base_address;
   2.538  
   2.539 -    if ( len != 4) {
   2.540 -        /* some bugs on kernel cause read this with byte*/
   2.541 +    /* some bugs on kernel cause read this with byte*/
   2.542 +    if ( len != 4 )
   2.543          HVM_DBG_LOG(DBG_LEVEL_VLAPIC,
   2.544 -                    "Local APIC read with len = %lx, should be 4 instead\n",
   2.545 +                    "read with len=0x%lx, should be 4 instead.\n",
   2.546                      len);
   2.547 -    }
   2.548  
   2.549      alignment = offset & 0x3;
   2.550  
   2.551      vlapic_read_aligned(vlapic, offset & ~0x3, 4, &tmp);
   2.552 -    switch (len) {
   2.553 +    switch ( len ) {
   2.554      case 1:
   2.555          result = *((unsigned char *)&tmp + alignment);
   2.556          break;
   2.557 @@ -593,14 +600,14 @@ static unsigned long vlapic_read(struct 
   2.558          break;
   2.559  
   2.560      default:
   2.561 -        printk("Local APIC read with len = %lx, should be 4 instead\n", len);
   2.562 +        printk("Local APIC read with len=0x%lx, should be 4 instead.\n", len);
   2.563          domain_crash_synchronous();
   2.564          break;
   2.565      }
   2.566  
   2.567 -    HVM_DBG_LOG(DBG_LEVEL_VLAPIC,
   2.568 -                "vlapic_read offset %x with length %lx and the result is %lx",
   2.569 -                offset, len, result);
   2.570 +    HVM_DBG_LOG(DBG_LEVEL_VLAPIC, "offset 0x%x with length 0x%lx, "
   2.571 +                "and the result is 0x%lx.", offset, len, result);
   2.572 +
   2.573      return result;
   2.574  }
   2.575  
   2.576 @@ -610,40 +617,42 @@ static void vlapic_write(struct vcpu *v,
   2.577      struct vlapic *vlapic = VLAPIC(v);
   2.578      unsigned int offset = address - vlapic->base_address;
   2.579  
   2.580 -    if (offset != 0xb0)
   2.581 +    if ( offset != 0xb0 )
   2.582          HVM_DBG_LOG(DBG_LEVEL_VLAPIC,
   2.583 -          "vlapic_write offset %x with length %lx source %lx",
   2.584 -          offset, len, val);
   2.585 +                    "offset 0x%x with length 0x%lx, and value is 0x%lx.",
   2.586 +                    offset, len, val);
   2.587  
   2.588      /*
   2.589       * According to IA 32 Manual, all resgiters should be accessed with
   2.590       * 32 bits alignment.
   2.591       */
   2.592 -    if (len != 4) {
   2.593 +    if ( len != 4 )
   2.594 +    {
   2.595          unsigned int tmp;
   2.596          unsigned char alignment;
   2.597  
   2.598          /* Some kernel do will access with byte/word alignment*/
   2.599          printk("Notice: Local APIC write with len = %lx\n",len);
   2.600          alignment = offset & 0x3;
   2.601 -        tmp = vlapic_read(v, offset & (~0x3), 4);
   2.602 -        switch (len) {
   2.603 +        tmp = vlapic_read(v, offset & ~0x3, 4);
   2.604 +        switch ( len ) {
   2.605          case 1:
   2.606              /* XXX the saddr is a tmp variable from caller, so should be ok
   2.607 -               But we should still change the following ref to val to 
   2.608 +               But we should still change the following ref to val to
   2.609                 local variable later */
   2.610 -            val  = (tmp & ~(0xff << alignment)) |
   2.611 -                        ((val & 0xff) << alignment);
   2.612 +            val = (tmp & ~(0xff << alignment)) |
   2.613 +                  ((val & 0xff) << alignment);
   2.614              break;
   2.615  
   2.616          case 2:
   2.617 -            if (alignment != 0x0 && alignment != 0x2) {
   2.618 +            if ( alignment != 0x0 && alignment != 0x2 )
   2.619 +            {
   2.620                  printk("alignment error for vlapic with len == 2\n");
   2.621 -                    domain_crash_synchronous();
   2.622 +                domain_crash_synchronous();
   2.623              }
   2.624  
   2.625              val = (tmp & ~(0xffff << alignment)) |
   2.626 -                        ((val & 0xffff)  << alignment);
   2.627 +                  ((val & 0xffff) << alignment);
   2.628              break;
   2.629  
   2.630          case 3:
   2.631 @@ -661,7 +670,7 @@ static void vlapic_write(struct vcpu *v,
   2.632  
   2.633      offset &= 0xff0;
   2.634  
   2.635 -    switch (offset) {
   2.636 +    switch ( offset ) {
   2.637      case APIC_ID:   /* Local APIC ID */
   2.638          vlapic->id = ((val) >> 24) & VAPIC_ID_MASK;
   2.639          break;
   2.640 @@ -685,9 +694,10 @@ static void vlapic_write(struct vcpu *v,
   2.641  
   2.642      case APIC_SPIV:
   2.643          vlapic->spurious_vec = val & 0x1ff;
   2.644 -        if (!(vlapic->spurious_vec & 0x100)) {
   2.645 -            int i = 0;
   2.646 -            for (i = 0; i < VLAPIC_LVT_NUM; i++)
   2.647 +        if ( !(vlapic->spurious_vec & 0x100) )
   2.648 +        {
   2.649 +            int i;
   2.650 +            for ( i = 0; i < VLAPIC_LVT_NUM; i++ )
   2.651                  vlapic->lvt[i] |= 0x10000;
   2.652              vlapic->status |= VLAPIC_SOFTWARE_DISABLE_MASK;
   2.653          }
   2.654 @@ -697,7 +707,7 @@ static void vlapic_write(struct vcpu *v,
   2.655  
   2.656      case APIC_ESR:
   2.657          vlapic->err_write_count = !vlapic->err_write_count;
   2.658 -        if (!vlapic->err_write_count)
   2.659 +        if ( !vlapic->err_write_count )
   2.660              vlapic->err_status = 0;
   2.661          break;
   2.662  
   2.663 @@ -711,30 +721,32 @@ static void vlapic_write(struct vcpu *v,
   2.664          vlapic->icr_high = val & 0xff000000;
   2.665          break;
   2.666  
   2.667 -    case APIC_LVTT: // LVT Timer Reg
   2.668 -    case APIC_LVTTHMR: // LVT Thermal Monitor
   2.669 -    case APIC_LVTPC: // LVT Performance Counter
   2.670 -    case APIC_LVT0: // LVT LINT0 Reg
   2.671 -    case APIC_LVT1: // LVT Lint1 Reg
   2.672 -    case APIC_LVTERR: // LVT Error Reg
   2.673 +    case APIC_LVTT:         // LVT Timer Reg
   2.674 +    case APIC_LVTTHMR:      // LVT Thermal Monitor
   2.675 +    case APIC_LVTPC:        // LVT Performance Counter
   2.676 +    case APIC_LVT0:         // LVT LINT0 Reg
   2.677 +    case APIC_LVT1:         // LVT Lint1 Reg
   2.678 +    case APIC_LVTERR:       // LVT Error Reg
   2.679          {
   2.680              int vt = (offset - APIC_LVTT) >> 4;
   2.681  
   2.682              vlapic->lvt[vt] = val & vlapic_lvt_mask[vt];
   2.683 -            if (vlapic->status & VLAPIC_SOFTWARE_DISABLE_MASK)
   2.684 +            if ( vlapic->status & VLAPIC_SOFTWARE_DISABLE_MASK )
   2.685                  vlapic->lvt[vt] |= VLAPIC_LVT_BIT_MASK;
   2.686  
   2.687              /* On hardware, when write vector less than 0x20 will error */
   2.688              vlapic_check_vector(vlapic, vlapic_lvt_dm(vlapic->lvt[vt]),
   2.689 -              vlapic_lvt_vector(vlapic, vt));
   2.690 +                                vlapic_lvt_vector(vlapic, vt));
   2.691  
   2.692 -            if (!vlapic->vcpu_id && (offset == APIC_LVT0)) {
   2.693 -                if ((vlapic->lvt[VLAPIC_LVT_LINT0] & VLAPIC_LVT_BIT_DELIMOD)
   2.694 -                            == 0x700) {
   2.695 -                    if (!(vlapic->lvt[VLAPIC_LVT_LINT0] & VLAPIC_LVT_BIT_MASK)) {
   2.696 +            if ( !vlapic->vcpu_id && (offset == APIC_LVT0) )
   2.697 +            {
   2.698 +                if ( (vlapic->lvt[VLAPIC_LVT_LINT0] & VLAPIC_LVT_BIT_DELIMOD)
   2.699 +                      == 0x700 )
   2.700 +                {
   2.701 +                    if ( vlapic->lvt[VLAPIC_LVT_LINT0] & VLAPIC_LVT_BIT_MASK )
   2.702 +                        clear_bit(_VLAPIC_BSP_ACCEPT_PIC, &vlapic->status);
   2.703 +                    else
   2.704                          set_bit(_VLAPIC_BSP_ACCEPT_PIC, &vlapic->status);
   2.705 -                    }else
   2.706 -                        clear_bit(_VLAPIC_BSP_ACCEPT_PIC, &vlapic->status);
   2.707                  }
   2.708                  else
   2.709                      clear_bit(_VLAPIC_BSP_ACCEPT_PIC, &vlapic->status);
   2.710 @@ -744,33 +756,42 @@ static void vlapic_write(struct vcpu *v,
   2.711          break;
   2.712  
   2.713      case APIC_TMICT:
   2.714 -        if (vlapic_timer_active(vlapic))
   2.715 -            stop_timer(&(vlapic->vlapic_timer));
   2.716 -
   2.717 -        vlapic->timer_initial = val;
   2.718 -        vlapic->timer_current = val;
   2.719 -        vlapic->timer_current_update = NOW();
   2.720 +        {
   2.721 +            s_time_t now = NOW(), offset;
   2.722  
   2.723 -        vlapic_begin_timer(vlapic);
   2.724 +            if ( vlapic_timer_active(vlapic) )
   2.725 +                stop_timer(&vlapic->vlapic_timer);
   2.726  
   2.727 -        HVM_DBG_LOG(DBG_LEVEL_VLAPIC, "timer_init %x timer_current %x"
   2.728 -                    "timer_current_update %08x%08x",
   2.729 -                    vlapic->timer_initial, vlapic->timer_current,
   2.730 -                    (uint32_t)(vlapic->timer_current_update >> 32),
   2.731 -                    (uint32_t)vlapic->timer_current_update);
   2.732 +            vlapic->timer_initial_count = val;
   2.733 +            vlapic->timer_current_count = val;
   2.734 +            vlapic->timer_current_update = now;
   2.735 +
   2.736 +            offset = APIC_BUS_CYCLE_NS *
   2.737 +                     vlapic->timer_divide_count *
   2.738 +                     vlapic->timer_initial_count;
   2.739 +            vlapic->vlapic_timer.expires = now + offset;
   2.740 +
   2.741 +            set_timer(&vlapic->vlapic_timer, vlapic->vlapic_timer.expires);
   2.742 +
   2.743 +            HVM_DBG_LOG(DBG_LEVEL_VLAPIC,
   2.744 +                        "bus cycle is %"PRId64"ns, now 0x%016"PRIx64", "
   2.745 +                        "timer initial count 0x%x, offset 0x%016"PRIx64", "
   2.746 +                        "expire @ 0x%016"PRIx64".",
   2.747 +                        APIC_BUS_CYCLE_NS, now, vlapic->timer_initial_count,
   2.748 +                        offset, vlapic->vlapic_timer.expires);
   2.749 +        }
   2.750          break;
   2.751  
   2.752      case APIC_TDCR:
   2.753          {
   2.754 -            //FIXME clean this code
   2.755 -            unsigned char tmp1,tmp2;
   2.756 -            tmp1 = (val & 0xf);
   2.757 -            tmp2 = ((tmp1 & 0x3 )|((tmp1 & 0x8) >>1)) + 1;
   2.758 -            vlapic->timer_divide_counter = 0x1<<tmp2;
   2.759 +            unsigned int tmp1, tmp2;
   2.760  
   2.761 -            HVM_DBG_LOG(DBG_LEVEL_VLAPIC_TIMER,
   2.762 -                        "timer divider is 0x%x",
   2.763 -                        vlapic->timer_divide_counter);
   2.764 +            tmp1 = val & 0xf;
   2.765 +            tmp2 = ((tmp1 & 0x3) | ((tmp1 & 0x8) >> 1)) + 1;
   2.766 +            vlapic->timer_divide_count = 0x1 << (tmp2 & 0x7);
   2.767 +
   2.768 +            HVM_DBG_LOG(DBG_LEVEL_VLAPIC_TIMER, "timer divide count is 0x%x",
   2.769 +                        vlapic->timer_divide_count);
   2.770          }
   2.771          break;
   2.772  
   2.773 @@ -784,9 +805,9 @@ static int vlapic_range(struct vcpu *v, 
   2.774  {
   2.775      struct vlapic *vlapic = VLAPIC(v);
   2.776  
   2.777 -    if (vlapic_global_enabled(vlapic) &&
   2.778 -        (addr >= vlapic->base_address) &&
   2.779 -        (addr <= (vlapic->base_address + VLOCAL_APIC_MEM_LENGTH)))
   2.780 +    if ( vlapic_global_enabled(vlapic) &&
   2.781 +         (addr >= vlapic->base_address) &&
   2.782 +         (addr <= vlapic->base_address + VLOCAL_APIC_MEM_LENGTH) )
   2.783          return 1;
   2.784  
   2.785      return 0;
   2.786 @@ -801,23 +822,21 @@ struct hvm_mmio_handler vlapic_mmio_hand
   2.787  void vlapic_msr_set(struct vlapic *vlapic, uint64_t value)
   2.788  {
   2.789      /* When apic disabled */
   2.790 -    if (!vlapic)
   2.791 +    if ( vlapic == NULL )
   2.792          return;
   2.793  
   2.794 -    if (vlapic->vcpu_id)
   2.795 +    if ( vlapic->vcpu_id )
   2.796          value &= ~MSR_IA32_APICBASE_BSP;
   2.797  
   2.798      vlapic->apic_base_msr = value;
   2.799      vlapic->base_address = vlapic_get_base_address(vlapic);
   2.800  
   2.801 -    if (!(value & 0x800))
   2.802 +    if ( !(value & 0x800) )
   2.803          set_bit(_VLAPIC_GLOB_DISABLE, &vlapic->status );
   2.804  
   2.805      HVM_DBG_LOG(DBG_LEVEL_VLAPIC,
   2.806 -                "apic base msr = 0x%08x%08x,\nbase address = 0x%lx",
   2.807 -                (uint32_t)(vlapic->apic_base_msr >> 32),
   2.808 -                (uint32_t)vlapic->apic_base_msr,
   2.809 -                vlapic->base_address);
   2.810 +                "apic base msr is 0x%016"PRIx64", and base address is 0x%lx.",
   2.811 +                vlapic->apic_base_msr, vlapic->base_address);
   2.812  }
   2.813  
   2.814  static inline int vlapic_get_init_id(struct vcpu *v)
   2.815 @@ -827,42 +846,51 @@ static inline int vlapic_get_init_id(str
   2.816  
   2.817  void vlapic_timer_fn(void *data)
   2.818  {
   2.819 -    struct vlapic *vlapic;
   2.820 -
   2.821 -    vlapic = data;
   2.822 -    if (!vlapic_enabled(vlapic)) return;
   2.823 -
   2.824 -    vlapic->timer_current_update = NOW();
   2.825 +    struct vlapic *vlapic = data;
   2.826 +    struct vcpu *v;
   2.827 +    uint32_t timer_vector;
   2.828 +    s_time_t now;
   2.829  
   2.830 -    if (vlapic_lvt_timer_enabled(vlapic)) {
   2.831 -        if (!vlapic_irr_status(vlapic,
   2.832 -              vlapic_lvt_vector(vlapic, VLAPIC_LVT_TIMER))) {
   2.833 -            test_and_set_bit(vlapic_lvt_vector(vlapic, VLAPIC_LVT_TIMER),
   2.834 -              &vlapic->irr[0]);
   2.835 -        }
   2.836 -        else
   2.837 -            vlapic->intr_pending_count[vlapic_lvt_vector(vlapic, VLAPIC_LVT_TIMER)]++;
   2.838 -        evtchn_set_pending(vlapic->vcpu, iopacket_port(vlapic->vcpu));
   2.839 -    }
   2.840 +    if ( unlikely(!vlapic_enabled(vlapic) ||
   2.841 +                  !vlapic_lvt_timer_enabled(vlapic)) )
   2.842 +        return;
   2.843  
   2.844 -    vlapic->timer_current_update = NOW();
   2.845 -    if (vlapic_lvt_timer_period(vlapic)) {
   2.846 +    v = vlapic->vcpu;
   2.847 +    timer_vector = vlapic_lvt_vector(vlapic, VLAPIC_LVT_TIMER);
   2.848 +    now = NOW();
   2.849 +
   2.850 +    vlapic->timer_current_update = now;
   2.851 +
   2.852 +    if ( test_and_set_bit(timer_vector, &vlapic->irr[0]) )
   2.853 +        vlapic->intr_pending_count[timer_vector]++;
   2.854 +
   2.855 +    if ( vlapic_lvt_timer_period(vlapic) )
   2.856 +    {
   2.857          s_time_t offset;
   2.858  
   2.859 -        vlapic->timer_current = vlapic->timer_initial;
   2.860 -        offset = vlapic->timer_current * (262144/get_apic_bus_scale()) * vlapic->timer_divide_counter;
   2.861 -        vlapic->vlapic_timer.expires = NOW() + offset;
   2.862 -        set_timer(&(vlapic->vlapic_timer), vlapic->vlapic_timer.expires);
   2.863 -    }else {
   2.864 -        vlapic->timer_current = 0;
   2.865 +        vlapic->timer_current_count = vlapic->timer_initial_count;
   2.866 +
   2.867 +        offset = APIC_BUS_CYCLE_NS *
   2.868 +                 vlapic->timer_divide_count *
   2.869 +                 vlapic->timer_initial_count;
   2.870 +        vlapic->vlapic_timer.expires = now + offset;
   2.871 +        set_timer(&vlapic->vlapic_timer, vlapic->vlapic_timer.expires);
   2.872      }
   2.873 +    else
   2.874 +        vlapic->timer_current_count = 0;
   2.875 +
   2.876 +#if 0
   2.877 +    if ( test_bit(_VCPUF_running, &v->vcpu_flags) )
   2.878 +    {
   2.879 +        /* TODO: add guest time handling here */
   2.880 +    }
   2.881 +#endif
   2.882  
   2.883      HVM_DBG_LOG(DBG_LEVEL_VLAPIC_TIMER,
   2.884 -      "vlapic_timer_fn: now: %08x%08x expire %08x%08x init %x current %x",
   2.885 -      (uint32_t)(NOW() >> 32),(uint32_t)NOW(),
   2.886 -      (uint32_t)(vlapic->vlapic_timer.expires >> 32),
   2.887 -      (uint32_t)vlapic->vlapic_timer.expires,
   2.888 -      vlapic->timer_initial,vlapic->timer_current);
   2.889 +                "now 0x%016"PRIx64", expire @ 0x%016"PRIx64", "
   2.890 +                "timer initial count 0x%x, timer current count 0x%x.",
   2.891 +                now, vlapic->vlapic_timer.expires,
   2.892 +                vlapic->timer_initial_count, vlapic->timer_current_count);
   2.893  }
   2.894  
   2.895  #if 0
   2.896 @@ -873,7 +901,7 @@ vlapic_check_direct_intr(struct vcpu *v,
   2.897      int type;
   2.898  
   2.899      type = __fls(vlapic->direct_intr.deliver_mode);
   2.900 -    if (type == -1)
   2.901 +    if ( type == -1 )
   2.902          return -1;
   2.903  
   2.904      *mode = type;
   2.905 @@ -881,31 +909,35 @@ vlapic_check_direct_intr(struct vcpu *v,
   2.906  }
   2.907  #endif
   2.908  
   2.909 -int
   2.910 -vlapic_accept_pic_intr(struct vcpu *v)
   2.911 +int vlapic_accept_pic_intr(struct vcpu *v)
   2.912  {
   2.913      struct vlapic *vlapic = VLAPIC(v);
   2.914  
   2.915      return vlapic ? test_bit(_VLAPIC_BSP_ACCEPT_PIC, &vlapic->status) : 1;
   2.916  }
   2.917  
   2.918 -int cpu_get_apic_interrupt(struct vcpu* v, int *mode)
   2.919 +int cpu_get_apic_interrupt(struct vcpu *v, int *mode)
   2.920  {
   2.921      struct vlapic *vlapic = VLAPIC(v);
   2.922  
   2.923 -    if (vlapic && vlapic_enabled(vlapic)) {
   2.924 +    if ( vlapic && vlapic_enabled(vlapic) )
   2.925 +    {
   2.926          int highest_irr = vlapic_find_highest_irr(vlapic);
   2.927  
   2.928 -        if (highest_irr != -1 && highest_irr >= vlapic->processor_priority) {
   2.929 -            if (highest_irr < 0x10) {
   2.930 +        if ( highest_irr != -1 && highest_irr >= vlapic->processor_priority )
   2.931 +        {
   2.932 +            if ( highest_irr < 0x10 )
   2.933 +            {
   2.934 +                uint32_t err_vector;
   2.935 +
   2.936                  vlapic->err_status |= 0x20;
   2.937 -                /* XXX What will happen if this vector illegal stil */
   2.938 +                err_vector = vlapic_lvt_vector(vlapic, VLAPIC_LVT_ERROR);
   2.939 +
   2.940                  HVM_DBG_LOG(DBG_LEVEL_VLAPIC,
   2.941 -                  "hvm_intr_assist: illegal vector number %x err_status %x",
   2.942 -                  highest_irr,  vlapic_lvt_vector(vlapic, VLAPIC_LVT_ERROR));
   2.943 +                            "Sending an illegal vector 0x%x.", highest_irr);
   2.944  
   2.945 -                set_bit(vlapic_lvt_vector(vlapic, VLAPIC_LVT_ERROR), &vlapic->irr[0]);
   2.946 -                highest_irr = vlapic_lvt_vector(vlapic, VLAPIC_LVT_ERROR);
   2.947 +                set_bit(err_vector, &vlapic->irr[0]);
   2.948 +                highest_irr = err_vector;
   2.949              }
   2.950  
   2.951              *mode = VLAPIC_DELIV_MODE_FIXED;
   2.952 @@ -915,29 +947,29 @@ int cpu_get_apic_interrupt(struct vcpu* 
   2.953      return -1;
   2.954  }
   2.955  
   2.956 -void vlapic_post_injection(struct vcpu *v, int vector, int deliver_mode) {
   2.957 -    struct vlapic  *vlapic = VLAPIC(v);
   2.958 +void vlapic_post_injection(struct vcpu *v, int vector, int deliver_mode)
   2.959 +{
   2.960 +    struct vlapic *vlapic = VLAPIC(v);
   2.961  
   2.962 -    if (!vlapic)
   2.963 +    if ( unlikely(vlapic == NULL) )
   2.964          return;
   2.965  
   2.966 -    switch (deliver_mode) {
   2.967 +    switch ( deliver_mode ) {
   2.968      case VLAPIC_DELIV_MODE_FIXED:
   2.969      case VLAPIC_DELIV_MODE_LPRI:
   2.970 -        vlapic_set_isr(vlapic, vector);
   2.971 -        vlapic_clear_irr(vlapic, vector);
   2.972 +        set_bit(vector, &vlapic->isr[0]);
   2.973 +        clear_bit(vector, &vlapic->irr[0]);
   2.974          vlapic_update_ppr(vlapic);
   2.975  
   2.976 -        if (vector == vlapic_lvt_vector(vlapic, VLAPIC_LVT_TIMER)) {
   2.977 +        if ( vector == vlapic_lvt_vector(vlapic, VLAPIC_LVT_TIMER) )
   2.978 +        {
   2.979              vlapic->intr_pending_count[vector]--;
   2.980 -            if (vlapic->intr_pending_count[vector] > 0)
   2.981 -                test_and_set_bit(vlapic_lvt_vector(vlapic, VLAPIC_LVT_TIMER),
   2.982 -                  &vlapic->irr[0]);
   2.983 +            if ( vlapic->intr_pending_count[vector] > 0 )
   2.984 +                test_and_set_bit(vector, &vlapic->irr[0]);
   2.985          }
   2.986 -
   2.987          break;
   2.988 -        /*XXX deal with these later */
   2.989  
   2.990 +    /*XXX deal with these later */
   2.991      case VLAPIC_DELIV_MODE_RESERVED:
   2.992          printk("Ignore deliver mode 3 in vlapic_post_injection\n");
   2.993          break;
   2.994 @@ -950,7 +982,7 @@ void vlapic_post_injection(struct vcpu *
   2.995          break;
   2.996  
   2.997      default:
   2.998 -        printk("<vlapic_post_injection> error deliver mode\n");
   2.999 +        printk("<vlapic_post_injection> invalid deliver mode\n");
  2.1000          break;
  2.1001      }
  2.1002  }
  2.1003 @@ -978,12 +1010,12 @@ static int vlapic_reset(struct vlapic *v
  2.1004  
  2.1005      vlapic->apic_base_msr = VLAPIC_BASE_MSR_INIT_VALUE;
  2.1006  
  2.1007 -    if (apic_id == 0)
  2.1008 +    if ( apic_id == 0 )
  2.1009          vlapic->apic_base_msr |= MSR_IA32_APICBASE_BSP;
  2.1010  
  2.1011      vlapic->base_address = vlapic_get_base_address(vlapic);
  2.1012  
  2.1013 -    for (i = 0; i < VLAPIC_LVT_NUM; i++)
  2.1014 +    for ( i = 0; i < VLAPIC_LVT_NUM; i++ )
  2.1015          vlapic->lvt[i] = VLAPIC_LVT_BIT_MASK;
  2.1016  
  2.1017      vlapic->dest_format = 0xffffffffU;
  2.1018 @@ -1000,18 +1032,18 @@ static int vlapic_reset(struct vlapic *v
  2.1019       * XXX According to mp sepcific, BIOS will enable LVT0/1,
  2.1020       * remove it after BIOS enabled
  2.1021       */
  2.1022 -    if (!v->vcpu_id) {
  2.1023 +    if ( !v->vcpu_id )
  2.1024 +    {
  2.1025          vlapic->lvt[VLAPIC_LVT_LINT0] = 0x700;
  2.1026          vlapic->lvt[VLAPIC_LVT_LINT1] = 0x500;
  2.1027          set_bit(_VLAPIC_BSP_ACCEPT_PIC, &vlapic->status);
  2.1028      }
  2.1029  #endif
  2.1030  
  2.1031 -    HVM_DBG_LOG(DBG_LEVEL_VLAPIC, "vlapic_reset: "
  2.1032 -                "vcpu=%p id=%d vlapic_apic_base_msr=%08x%08x "
  2.1033 -                "vlapic_base_address=%0lx",
  2.1034 -                v, vlapic->id, (uint32_t)(vlapic->apic_base_msr >> 32),
  2.1035 -                (uint32_t)vlapic->apic_base_msr, vlapic->base_address);
  2.1036 +    HVM_DBG_LOG(DBG_LEVEL_VLAPIC,
  2.1037 +                "vcpu=%p, id=%d, vlapic_apic_base_msr=0x%016"PRIx64", "
  2.1038 +                "base_address=0x%0lx.",
  2.1039 +                v, vlapic->id, vlapic->apic_base_msr, vlapic->base_address);
  2.1040  
  2.1041      return 1;
  2.1042  }
  2.1043 @@ -1025,7 +1057,8 @@ int vlapic_init(struct vcpu *v)
  2.1044      HVM_DBG_LOG(DBG_LEVEL_VLAPIC, "vlapic_init %d", v->vcpu_id);
  2.1045  
  2.1046      vlapic = xmalloc_bytes(sizeof(struct vlapic));
  2.1047 -    if (!vlapic) {
  2.1048 +    if ( vlapic == NULL )
  2.1049 +    {
  2.1050          printk("malloc vlapic error for vcpu %x\n", v->vcpu_id);
  2.1051          return -ENOMEM;
  2.1052      }
     3.1 --- a/xen/include/asm-x86/hvm/support.h	Tue Mar 07 18:40:42 2006 +0100
     3.2 +++ b/xen/include/asm-x86/hvm/support.h	Tue Mar 07 18:41:37 2006 +0100
     3.3 @@ -122,9 +122,9 @@ enum hval_bitmaps {
     3.4  
     3.5  extern unsigned int opt_hvm_debug_level;
     3.6  #define HVM_DBG_LOG(level, _f, _a...)           \
     3.7 -    if ((level) & opt_hvm_debug_level)          \
     3.8 -        printk("[HVM:%d.%d] " _f "\n",          \
     3.9 -               current->domain->domain_id, current->vcpu_id, ## _a)
    3.10 +    if ( (level) & opt_hvm_debug_level )        \
    3.11 +        printk("[HVM:%d.%d] <%s> " _f "\n",     \
    3.12 +               current->domain->domain_id, current->vcpu_id, __func__, ## _a)
    3.13  #else
    3.14  #define HVM_DBG_LOG(level, _f, _a...)
    3.15  #endif
     4.1 --- a/xen/include/asm-x86/hvm/vlapic.h	Tue Mar 07 18:40:42 2006 +0100
     4.2 +++ b/xen/include/asm-x86/hvm/vlapic.h	Tue Mar 07 18:41:37 2006 +0100
     4.3 @@ -101,15 +101,14 @@ static __inline__ int find_highest_bit(u
     4.4  #define VLAPIC_LVT_BIT_TRIG             (1 << 15)
     4.5  #define VLAPIC_LVT_TIMERMODE            (1 << 17)
     4.6  
     4.7 -#define VLAPIC_DELIV_MODE_FIXED          0x0
     4.8 -#define VLAPIC_DELIV_MODE_LPRI           0x1
     4.9 -#define VLAPIC_DELIV_MODE_SMI            0x2
    4.10 -#define VLAPIC_DELIV_MODE_RESERVED       0x3
    4.11 -#define VLAPIC_DELIV_MODE_NMI            0x4
    4.12 -#define VLAPIC_DELIV_MODE_INIT           0x5
    4.13 -#define VLAPIC_DELIV_MODE_STARTUP        0x6
    4.14 -#define VLAPIC_DELIV_MODE_EXT            0x7
    4.15 -
    4.16 +#define VLAPIC_DELIV_MODE_FIXED         0x0
    4.17 +#define VLAPIC_DELIV_MODE_LPRI          0x1
    4.18 +#define VLAPIC_DELIV_MODE_SMI           0x2
    4.19 +#define VLAPIC_DELIV_MODE_RESERVED      0x3
    4.20 +#define VLAPIC_DELIV_MODE_NMI           0x4
    4.21 +#define VLAPIC_DELIV_MODE_INIT          0x5
    4.22 +#define VLAPIC_DELIV_MODE_STARTUP       0x6
    4.23 +#define VLAPIC_DELIV_MODE_EXT           0x7
    4.24  
    4.25  
    4.26  #define VLAPIC_NO_SHORTHAND             0x0
    4.27 @@ -118,41 +117,29 @@ static __inline__ int find_highest_bit(u
    4.28  #define VLAPIC_SHORTHAND_EXCLUDE_SELF   0x3
    4.29  
    4.30  #define vlapic_lvt_timer_enabled(vlapic)    \
    4.31 -  (!(vlapic->lvt[VLAPIC_LVT_TIMER] & VLAPIC_LVT_BIT_MASK))
    4.32 -
    4.33 -#define vlapic_lvt_vector(vlapic, type)   \
    4.34 -  (vlapic->lvt[type] & VLAPIC_LVT_BIT_VECTOR)
    4.35 -
    4.36 -#define vlapic_lvt_dm(value)        ((value >> 8) && 7)
    4.37 -#define vlapic_lvt_timer_period(vlapic) \
    4.38 -  (vlapic->lvt[VLAPIC_LVT_TIMER] & VLAPIC_LVT_TIMERMODE)
    4.39 -
    4.40 -#define vlapic_isr_status(vlapic,vector)    \
    4.41 -  test_bit(vector, &vlapic->isr[0])
    4.42 -
    4.43 -#define vlapic_irr_status(vlapic,vector)    \
    4.44 -  test_bit(vector, &vlapic->irr[0])
    4.45 +    (!((vlapic)->lvt[VLAPIC_LVT_TIMER] & VLAPIC_LVT_BIT_MASK))
    4.46  
    4.47 -#define vlapic_set_isr(vlapic,vector) \
    4.48 -  test_and_set_bit(vector, &vlapic->isr[0])
    4.49 -
    4.50 -#define vlapic_set_irr(vlapic,vector)      \
    4.51 -  test_and_set_bit(vector, &vlapic->irr[0])
    4.52 +#define vlapic_lvt_vector(vlapic, type)     \
    4.53 +    ((vlapic)->lvt[(type)] & VLAPIC_LVT_BIT_VECTOR)
    4.54  
    4.55 -#define vlapic_clear_irr(vlapic,vector)      \
    4.56 -  clear_bit(vector, &vlapic->irr[0])
    4.57 -#define vlapic_clear_isr(vlapic,vector)     \
    4.58 -  clear_bit(vector, &vlapic->isr[0])
    4.59 +#define vlapic_lvt_dm(value)            (((value) >> 8) && 7)
    4.60 +#define vlapic_lvt_timer_period(vlapic)     \
    4.61 +    ((vlapic)->lvt[VLAPIC_LVT_TIMER] & VLAPIC_LVT_TIMERMODE)
    4.62  
    4.63 -#define vlapic_enabled(vlapic)               \
    4.64 -  (!(vlapic->status &                           \
    4.65 -     (VLAPIC_GLOB_DISABLE_MASK | VLAPIC_SOFTWARE_DISABLE_MASK)))
    4.66 +#define _VLAPIC_GLOB_DISABLE            0x0
    4.67 +#define VLAPIC_GLOB_DISABLE_MASK        0x1
    4.68 +#define VLAPIC_SOFTWARE_DISABLE_MASK    0x2
    4.69 +#define _VLAPIC_BSP_ACCEPT_PIC          0x3
    4.70  
    4.71 -#define vlapic_global_enabled(vlapic)               \
    4.72 -  !(test_bit(_VLAPIC_GLOB_DISABLE, &(vlapic)->status))
    4.73 +#define vlapic_enabled(vlapic)              \
    4.74 +    (!((vlapic)->status &                   \
    4.75 +       (VLAPIC_GLOB_DISABLE_MASK | VLAPIC_SOFTWARE_DISABLE_MASK)))
    4.76  
    4.77 -#define VLAPIC_IRR(t) ((t)->irr[0])
    4.78 -#define VLAPIC_ID(t)  ((t)->id)
    4.79 +#define vlapic_global_enabled(vlapic)       \
    4.80 +    (!(test_bit(_VLAPIC_GLOB_DISABLE, &(vlapic)->status)))
    4.81 +
    4.82 +#define VLAPIC_IRR(t)   ((t)->irr[0])
    4.83 +#define VLAPIC_ID(t)    ((t)->id)
    4.84  
    4.85  typedef struct direct_intr_info {
    4.86      int deliver_mode;
    4.87 @@ -163,10 +150,6 @@ struct vlapic
    4.88  {
    4.89      //FIXME check what would be 64 bit on EM64T
    4.90      uint32_t           version;
    4.91 -#define _VLAPIC_GLOB_DISABLE            0x0
    4.92 -#define VLAPIC_GLOB_DISABLE_MASK        0x1
    4.93 -#define VLAPIC_SOFTWARE_DISABLE_MASK    0x2
    4.94 -#define _VLAPIC_BSP_ACCEPT_PIC          0x3
    4.95      uint32_t           status;
    4.96      uint32_t           id;
    4.97      uint32_t           vcpu_id;
    4.98 @@ -180,10 +163,10 @@ struct vlapic
    4.99      uint32_t           dest_format;
   4.100      uint32_t           spurious_vec;
   4.101      uint32_t           lvt[6];
   4.102 -    uint32_t           timer_initial;
   4.103 -    uint32_t           timer_current;
   4.104 +    uint32_t           timer_initial_count;
   4.105 +    uint32_t           timer_current_count;
   4.106      uint32_t           timer_divconf;
   4.107 -    uint32_t           timer_divide_counter;
   4.108 +    uint32_t           timer_divide_count;
   4.109      struct timer       vlapic_timer;
   4.110      int                intr_pending_count[MAX_VECTOR];
   4.111      s_time_t           timer_current_update;
   4.112 @@ -203,16 +186,16 @@ static inline int vlapic_set_irq(struct 
   4.113      int ret;
   4.114  
   4.115      ret = test_and_set_bit(vec, &t->irr[0]);
   4.116 -    if (trig)
   4.117 -       test_and_set_bit(vec, &t->tmr[0]);
   4.118 +    if ( trig )
   4.119 +       set_bit(vec, &t->tmr[0]);
   4.120  
   4.121      /* We may need to wake up target vcpu, besides set pending bit here */
   4.122      return ret;
   4.123  }
   4.124  
   4.125 -static inline int  vlapic_timer_active(struct vlapic *vlapic)
   4.126 +static inline int vlapic_timer_active(struct vlapic *vlapic)
   4.127  {
   4.128 -    return  active_timer(&(vlapic->vlapic_timer));
   4.129 +    return active_timer(&vlapic->vlapic_timer);
   4.130  }
   4.131  
   4.132  int vlapic_find_highest_irr(struct vlapic *vlapic);
   4.133 @@ -244,6 +227,7 @@ struct vlapic* apic_round_robin(struct d
   4.134                                  uint32_t bitmap);
   4.135  
   4.136  s_time_t get_apictime_scheduled(struct vcpu *v);
   4.137 +
   4.138  int hvm_apic_support(struct domain *d);
   4.139  
   4.140  #endif /* __ASM_X86_HVM_VLAPIC_H__ */
     5.1 --- a/xen/include/asm-x86/hvm/vpit.h	Tue Mar 07 18:40:42 2006 +0100
     5.2 +++ b/xen/include/asm-x86/hvm/vpit.h	Tue Mar 07 18:41:37 2006 +0100
     5.3 @@ -38,8 +38,8 @@
     5.4  struct hvm_virpit {
     5.5      /* for simulation of counter 0 in mode 2 */
     5.6      u64 period_cycles;          /* pit frequency in cpu cycles */
     5.7 -    u64 inject_point;           /* the time inject virt intr */
     5.8      u64 shift;                  /* save the value of offset - drift */
     5.9 +    s_time_t inject_point;      /* the time inject virt intr */
    5.10      s_time_t scheduled;         /* scheduled timer interrupt */
    5.11      struct timer pit_timer;     /* periodic timer for mode 2*/
    5.12      unsigned int channel;       /* the pit channel, counter 0~2 */