ia64/xen-unstable

changeset 19359:4fd39881f9f1

[SVM] Always read zero AMD C1E control MSR to allow cross-vendor migration

Signed-off-by: Christoph Egger <Christoph.Egger@amd.com>
author Keir Fraser <keir.fraser@citrix.com>
date Fri Mar 13 07:45:11 2009 +0000 (2009-03-13)
parents 0f7e2ba5d0e6
children 0e1449d6f231
files xen/arch/x86/hvm/hvm.c
line diff
     1.1 --- a/xen/arch/x86/hvm/hvm.c	Fri Mar 13 07:43:45 2009 +0000
     1.2 +++ b/xen/arch/x86/hvm/hvm.c	Fri Mar 13 07:45:11 2009 +0000
     1.3 @@ -1776,6 +1776,15 @@ int hvm_msr_read_intercept(struct cpu_us
     1.4          msr_content = var_range_base[index];
     1.5          break;
     1.6  
     1.7 +    case MSR_K8_ENABLE_C1E:
     1.8 +         /* There's no point in letting the guest see C-States.
     1.9 +          * Further, this AMD-only register may be accessed if this HVM guest
    1.10 +          * has been migrated to an Intel host. This fixes a guest crash
    1.11 +          * in this case.
    1.12 +          */
    1.13 +         msr_content = 0;
    1.14 +         break;
    1.15 +
    1.16      default:
    1.17          return hvm_funcs.msr_read_intercept(regs);
    1.18      }