ia64/xen-unstable

changeset 7504:4f8302838037

Load kernel regs from virtual kernel regs at domain switch (found by Kevin Tian)
author djm@kirby.fc.hp.com
date Mon Oct 31 22:07:56 2005 -0600 (2005-10-31)
parents aa81f4e44ca5
children fbf92a68ff36
files xen/arch/ia64/xen/process.c xen/arch/ia64/xen/regionreg.c xen/arch/ia64/xen/vcpu.c xen/arch/ia64/xen/xenmisc.c
line diff
     1.1 --- a/xen/arch/ia64/xen/process.c	Mon Oct 31 17:27:38 2005 -0600
     1.2 +++ b/xen/arch/ia64/xen/process.c	Mon Oct 31 22:07:56 2005 -0600
     1.3 @@ -83,9 +83,8 @@ void schedule_tail(struct vcpu *next)
     1.4      if(VMX_DOMAIN(current)){
     1.5      	vmx_load_all_rr(current);
     1.6      }else{
     1.7 -	    if (rr7 = load_region_regs(current)) {
     1.8 -		    printk("schedule_tail: change to rr7 not yet implemented\n");
     1.9 -    	}
    1.10 +	    load_region_regs(current);
    1.11 +            vcpu_load_kernel_regs(current);
    1.12      }
    1.13  }
    1.14  
     2.1 --- a/xen/arch/ia64/xen/regionreg.c	Mon Oct 31 17:27:38 2005 -0600
     2.2 +++ b/xen/arch/ia64/xen/regionreg.c	Mon Oct 31 22:07:56 2005 -0600
     2.3 @@ -341,23 +341,13 @@ virtualize_rid(struct vcpu *v, unsigned 
     2.4  // rr7 (because we have to to assembly and physical mode
     2.5  // to change rr7).  If no change to rr7 is required, returns 0.
     2.6  //
     2.7 -unsigned long load_region_regs(struct vcpu *v)
     2.8 +void load_region_regs(struct vcpu *v)
     2.9  {
    2.10  	unsigned long rr0, rr1,rr2, rr3, rr4, rr5, rr6, rr7;
    2.11  	// TODO: These probably should be validated
    2.12  	unsigned long bad = 0;
    2.13  
    2.14  	if (VCPU(v,metaphysical_mode)) {
    2.15 -		ia64_rr rrv;
    2.16 -
    2.17 -#if 0
    2.18 -		rrv.rrval = 0;
    2.19 -		rrv.rid = v->domain->arch.metaphysical_rr0;
    2.20 -		rrv.ps = PAGE_SHIFT;
    2.21 -		rrv.ve = 1;
    2.22 -		rr0 = rrv.rrval;
    2.23 -		set_rr_no_srlz(0x0000000000000000L, rr0);
    2.24 -#endif
    2.25  		rr0 = v->domain->arch.metaphysical_rr0;
    2.26  		ia64_set_rr(0x0000000000000000L, rr0);
    2.27  		ia64_srlz_d();
    2.28 @@ -383,5 +373,4 @@ unsigned long load_region_regs(struct vc
    2.29  	if (bad) {
    2.30  		panic_domain(0,"load_region_regs: can't set! bad=%lx\n",bad);
    2.31  	}
    2.32 -	return 0;
    2.33  }
     3.1 --- a/xen/arch/ia64/xen/vcpu.c	Mon Oct 31 17:27:38 2005 -0600
     3.2 +++ b/xen/arch/ia64/xen/vcpu.c	Mon Oct 31 22:07:56 2005 -0600
     3.3 @@ -135,6 +135,18 @@ vcpu_set_gr(VCPU *vcpu, unsigned reg, UI
     3.4   VCPU privileged application register access routines
     3.5  **************************************************************************/
     3.6  
     3.7 +void vcpu_load_kernel_regs(VCPU *vcpu)
     3.8 +{
     3.9 +	ia64_set_kr(0, VCPU(vcpu, krs[0]));
    3.10 +	ia64_set_kr(1, VCPU(vcpu, krs[1]));
    3.11 +	ia64_set_kr(2, VCPU(vcpu, krs[2]));
    3.12 +	ia64_set_kr(3, VCPU(vcpu, krs[3]));
    3.13 +	ia64_set_kr(4, VCPU(vcpu, krs[4]));
    3.14 +	ia64_set_kr(5, VCPU(vcpu, krs[5]));
    3.15 +	ia64_set_kr(6, VCPU(vcpu, krs[6]));
    3.16 +	ia64_set_kr(7, VCPU(vcpu, krs[7]));
    3.17 +}
    3.18 +
    3.19  IA64FAULT vcpu_set_ar(VCPU *vcpu, UINT64 reg, UINT64 val)
    3.20  {
    3.21  	if (reg == 44) return (vcpu_set_itc(vcpu,val));
    3.22 @@ -1872,4 +1884,3 @@ IA64FAULT vcpu_ptr_i(VCPU *vcpu,UINT64 v
    3.23  	// don't forget to recompute itr_regions
    3.24  	return (IA64_ILLOP_FAULT);
    3.25  }
    3.26 -
     4.1 --- a/xen/arch/ia64/xen/xenmisc.c	Mon Oct 31 17:27:38 2005 -0600
     4.2 +++ b/xen/arch/ia64/xen/xenmisc.c	Mon Oct 31 22:07:56 2005 -0600
     4.3 @@ -320,6 +320,7 @@ if (!i--) { printk("+",id); i = 1000000;
     4.4  		VHPT_ENABLED);
     4.5      	if (!is_idle_task(current->domain)) {
     4.6  	    	load_region_regs(current);
     4.7 +	    	vcpu_load_kernel_regs(current);
     4.8  		    if (vcpu_timer_expired(current)) vcpu_pend_timer(current);
     4.9      	}
    4.10  	    if (vcpu_timer_expired(current)) vcpu_pend_timer(current);