ia64/xen-unstable

changeset 12556:4ddda0bbb57c

[SVM] Make sure that the WP bit is always set in CR0 when running SVM guests.
This is necessary to be sure that the shadow mode code can always detect
writes to guest page tables.

This should fix Windows restore from hibernation on SVM platforms.

Signed-off-by: Tom Woller <thomas.woller@amd.com>
author Steven Smith <ssmith@xensource.com>
date Thu Nov 23 09:36:48 2006 +0000 (2006-11-23)
parents 2ef0f17a9af9
children c98a8e2c62d1
files xen/arch/x86/hvm/svm/svm.c xen/arch/x86/hvm/svm/vmcb.c
line diff
     1.1 --- a/xen/arch/x86/hvm/svm/svm.c	Wed Nov 22 18:36:48 2006 +0000
     1.2 +++ b/xen/arch/x86/hvm/svm/svm.c	Thu Nov 23 09:36:48 2006 +0000
     1.3 @@ -1441,7 +1441,7 @@ static int svm_set_cr0(unsigned long val
     1.4      /* We don't want to lose PG.  ET is reserved and should be always be 1*/
     1.5      paging_enabled = svm_paging_enabled(v);
     1.6      value |= X86_CR0_ET;
     1.7 -    vmcb->cr0 = value | X86_CR0_PG;
     1.8 +    vmcb->cr0 = value | X86_CR0_PG | X86_CR0_WP;
     1.9      v->arch.hvm_svm.cpu_shadow_cr0 = value;
    1.10  
    1.11      /* TS cleared? Then initialise FPU now. */
    1.12 @@ -2094,7 +2094,7 @@ static int svm_do_vmmcall_reset_to_realm
    1.13      vmcb->tsc_offset = 0;
    1.14  
    1.15      /* VMCB State */
    1.16 -    vmcb->cr0 = X86_CR0_ET | X86_CR0_PG;
    1.17 +    vmcb->cr0 = X86_CR0_ET | X86_CR0_PG | X86_CR0_WP;
    1.18      v->arch.hvm_svm.cpu_shadow_cr0 = X86_CR0_ET;
    1.19  
    1.20      vmcb->cr2 = 0;
     2.1 --- a/xen/arch/x86/hvm/svm/vmcb.c	Wed Nov 22 18:36:48 2006 +0000
     2.2 +++ b/xen/arch/x86/hvm/svm/vmcb.c	Thu Nov 23 09:36:48 2006 +0000
     2.3 @@ -197,6 +197,7 @@ static int construct_vmcb(struct vcpu *v
     2.4      /* Guest CR0. */
     2.5      vmcb->cr0 = read_cr0();
     2.6      arch_svm->cpu_shadow_cr0 = vmcb->cr0 & ~(X86_CR0_PG | X86_CR0_TS);
     2.7 +    vmcb->cr0 |= X86_CR0_WP;
     2.8  
     2.9      /* Guest CR4. */
    2.10      arch_svm->cpu_shadow_cr4 =