1.1 --- a/xen/arch/x86/mm.c	Wed Mar 01 17:52:37 2006 +0100
     1.2 +++ b/xen/arch/x86/mm.c	Wed Mar 01 18:33:36 2006 +0100
     1.3 @@ -507,10 +507,9 @@ get_page_from_l2e(
     1.4      rc = get_page_and_type_from_pagenr(
     1.5          l2e_get_pfn(l2e), PGT_l1_page_table | vaddr, d);
     1.6  
     1.7 -#if CONFIG_PAGING_LEVELS == 2
     1.8 -    if ( unlikely(!rc) )
     1.9 +    if ( (CONFIG_PAGING_LEVELS == 2) && unlikely(!rc) )
    1.10          rc = get_linear_pagetable(l2e, pfn, d);
    1.11 -#endif
    1.12 +
    1.13      return rc;
    1.14  }
    1.15  
    1.16 @@ -539,10 +538,10 @@ get_page_from_l3e(
    1.17      rc = get_page_and_type_from_pagenr(
    1.18          l3e_get_pfn(l3e),
    1.19          PGT_l2_page_table | vaddr, d);
    1.20 -#if CONFIG_PAGING_LEVELS == 3
    1.21 -    if ( unlikely(!rc) )
    1.22 +
    1.23 +    if ( (CONFIG_PAGING_LEVELS == 3) && unlikely(!rc) )
    1.24          rc = get_linear_pagetable(l3e, pfn, d);
    1.25 -#endif
    1.26 +
    1.27      return rc;
    1.28  }
    1.29  #endif /* 3 level */
    1.30 @@ -3187,8 +3186,8 @@ static int ptwr_emulated_update(
    1.31          ptwr_flush(d, PTWR_PT_INACTIVE);
    1.32  
    1.33      /* Read the PTE that maps the page being updated. */
    1.34 -    if (__copy_from_user(&pte, &linear_pg_table[l1_linear_offset(addr)],
    1.35 -                         sizeof(pte)))
    1.36 +    if ( __copy_from_user(&pte, &linear_pg_table[l1_linear_offset(addr)],
    1.37 +                          sizeof(pte)) )
    1.38      {
    1.39          MEM_LOG("ptwr_emulate: Cannot read thru linear_pg_table");
    1.40          return X86EMUL_UNHANDLEABLE;
    1.41 @@ -3198,15 +3197,10 @@ static int ptwr_emulated_update(
    1.42      page = mfn_to_page(pfn);
    1.43  
    1.44      /* We are looking only for read-only mappings of p.t. pages. */
    1.45 -    if ( ((l1e_get_flags(pte) & (_PAGE_RW|_PAGE_PRESENT)) != _PAGE_PRESENT) ||
    1.46 -         ((page->u.inuse.type_info & PGT_type_mask) != PGT_l1_page_table) ||
    1.47 -         (page_get_owner(page) != d) )
    1.48 -    {
    1.49 -        MEM_LOG("ptwr_emulate: Page is mistyped or bad pte "
    1.50 -                "(%lx, %" PRtype_info ")",
    1.51 -                l1e_get_pfn(pte), page->u.inuse.type_info);
    1.52 -        return X86EMUL_UNHANDLEABLE;
    1.53 -    }
    1.54 +    ASSERT((l1e_get_flags(pte) & (_PAGE_RW|_PAGE_PRESENT)) == _PAGE_PRESENT);
    1.55 +    ASSERT((page->u.inuse.type_info & PGT_type_mask) == PGT_l1_page_table);
    1.56 +    ASSERT((page->u.inuse.type_info & PGT_count_mask) != 0);
    1.57 +    ASSERT(page_get_owner(page) == d);
    1.58  
    1.59      /* Check the new PTE. */
    1.60      nl1e = l1e_from_intpte(val);
    1.61 @@ -3266,8 +3260,11 @@ static int ptwr_emulated_cmpxchg8b(
    1.62      unsigned long new,
    1.63      unsigned long new_hi)
    1.64  {
    1.65 -    return ptwr_emulated_update(
    1.66 -        addr, ((u64)old_hi << 32) | old, ((u64)new_hi << 32) | new, 8, 1);
    1.67 +    if ( CONFIG_PAGING_LEVELS == 2 )
    1.68 +        return X86EMUL_UNHANDLEABLE;
    1.69 +    else
    1.70 +        return ptwr_emulated_update(
    1.71 +            addr, ((u64)old_hi << 32) | old, ((u64)new_hi << 32) | new, 8, 1);
    1.72  }
    1.73  
    1.74  static struct x86_mem_emulator ptwr_mem_emulator = {