1.1 --- a/xen/arch/ia64/xen/faults.c	Tue Sep 11 15:07:42 2007 -0600
     1.2 +++ b/xen/arch/ia64/xen/faults.c	Tue Sep 11 15:09:33 2007 -0600
     1.3 @@ -94,7 +94,9 @@ static void reflect_interruption(unsigne
     1.4  	regs->cr_ipsr = vcpu_pl_adjust(regs->cr_ipsr, IA64_PSR_CPL0_BIT);
     1.5  	if (PSCB(v, dcr) & IA64_DCR_BE)
     1.6  		regs->cr_ipsr |= IA64_PSR_BE;
     1.7 -
     1.8 +	else
     1.9 +		regs->cr_ipsr &= ~IA64_PSR_BE;
    1.10 +    
    1.11  	if (PSCB(v, hpsr_dfh))
    1.12  		regs->cr_ipsr |= IA64_PSR_DFH;  
    1.13  	PSCB(v, vpsr_dfh) = 0;
    1.14 @@ -140,6 +142,9 @@ void reflect_event(void)
    1.15  	regs->cr_ipsr = vcpu_pl_adjust(regs->cr_ipsr, IA64_PSR_CPL0_BIT);
    1.16  	if (PSCB(v, dcr) & IA64_DCR_BE)
    1.17  		regs->cr_ipsr |= IA64_PSR_BE;
    1.18 +	else
    1.19 +		regs->cr_ipsr &= ~IA64_PSR_BE;
    1.20 +
    1.21  
    1.22  	if (PSCB(v, hpsr_dfh))
    1.23  		regs->cr_ipsr |= IA64_PSR_DFH;
    1.24 @@ -241,6 +246,9 @@ void ia64_do_page_fault(unsigned long ad
    1.25  					       IA64_PSR_CPL0_BIT);
    1.26  		if (PSCB(current, dcr) & IA64_DCR_BE)
    1.27  			regs->cr_ipsr |= IA64_PSR_BE;
    1.28 +		else
    1.29 +			regs->cr_ipsr &= ~IA64_PSR_BE;
    1.30 +
    1.31  
    1.32  		if (PSCB(current, hpsr_dfh))
    1.33  			regs->cr_ipsr |= IA64_PSR_DFH;