ia64/xen-unstable

changeset 10081:3d85f350a66a

SVM patch to reverse the logic of the general1 intercepts for easier
reading, also add the INVD intercept with print/eip increment only.

Signed-off-by: Tom Woller <thomas.woller@amd.com>
Signed-off-by: Mats Petersson <mats.petersson@amd.com>
author kaf24@firebug.cl.cam.ac.uk
date Wed May 17 23:51:39 2006 +0100 (2006-05-17)
parents 632ad28f2fd7
children b4361ae1aabc
files xen/arch/x86/hvm/svm/svm.c xen/arch/x86/hvm/svm/vmcb.c
line diff
     1.1 --- a/xen/arch/x86/hvm/svm/svm.c	Wed May 17 23:50:23 2006 +0100
     1.2 +++ b/xen/arch/x86/hvm/svm/svm.c	Wed May 17 23:51:39 2006 +0100
     1.3 @@ -1852,7 +1852,8 @@ static int svm_cr_access(struct vcpu *v,
     1.4          break;
     1.5  
     1.6      case INSTR_SMSW:
     1.7 -        svm_dump_inst(svm_rip2pointer(vmcb));
     1.8 +        if (svm_dbg_on)
     1.9 +            svm_dump_inst(svm_rip2pointer(vmcb));
    1.10          value = v->arch.hvm_svm.cpu_shadow_cr0;
    1.11          gpreg = decode_src_reg(prefix, buffer[index+2]);
    1.12          set_reg(gpreg, value, regs, vmcb);
    1.13 @@ -1989,9 +1990,25 @@ static inline void svm_vmexit_do_hlt(str
    1.14  }
    1.15  
    1.16  
    1.17 -static inline void svm_vmexit_do_mwait(void)
    1.18 +static void svm_vmexit_do_invd(struct vmcb_struct *vmcb)
    1.19  {
    1.20 -}
    1.21 +    int  inst_len;
    1.22 +    
    1.23 +    /* Invalidate the cache - we can't really do that safely - maybe we should 
    1.24 +     * WBINVD, but I think it's just fine to completely ignore it - we should 
    1.25 +     * have cache-snooping that solves it anyways. -- Mats P. 
    1.26 +     */
    1.27 +
    1.28 +    /* Tell the user that we did this - just in case someone runs some really weird 
    1.29 +     * operating system and wants to know why it's not working as it should...
    1.30 +     */
    1.31 +    printk("INVD instruction intercepted - ignored\n");
    1.32 +    
    1.33 +    inst_len = __get_instruction_length(vmcb, INSTR_INVD, NULL);
    1.34 +    __update_guest_eip(vmcb, inst_len);
    1.35 +}    
    1.36 +        
    1.37 +
    1.38  
    1.39  
    1.40  #ifdef XEN_DEBUGGER
    1.41 @@ -2053,7 +2070,7 @@ void svm_handle_invlpg(const short invlp
    1.42          __update_guest_eip(vmcb, inst_len);
    1.43  
    1.44          /* 
    1.45 -         * The address is implicit on this instruction At the moment, we don't
    1.46 +         * The address is implicit on this instruction. At the moment, we don't
    1.47           * use ecx (ASID) to identify individual guests pages 
    1.48           */
    1.49          g_vaddr = regs->eax;
    1.50 @@ -2703,6 +2720,11 @@ asmlinkage void svm_vmexit_handler(struc
    1.51          raise_softirq(SCHEDULE_SOFTIRQ);
    1.52          break;
    1.53  
    1.54 +
    1.55 +    case VMEXIT_INVD:
    1.56 +        svm_vmexit_do_invd(vmcb);
    1.57 +        break;
    1.58 +
    1.59      case VMEXIT_GDTR_WRITE:
    1.60          printk("WRITE to GDTR\n");
    1.61          break;
     2.1 --- a/xen/arch/x86/hvm/svm/vmcb.c	Wed May 17 23:50:23 2006 +0100
     2.2 +++ b/xen/arch/x86/hvm/svm/vmcb.c	Wed May 17 23:51:39 2006 +0100
     2.3 @@ -117,16 +117,12 @@ static int construct_vmcb_controls(struc
     2.4  
     2.5      /* mask off all general 1 intercepts except those listed here */
     2.6      vmcb->general1_intercepts = 
     2.7 -        ~(GENERAL1_INTERCEPT_CR0_SEL_WRITE | GENERAL1_INTERCEPT_VINTR      | 
     2.8 -          GENERAL1_INTERCEPT_IDTR_READ     | GENERAL1_INTERCEPT_IDTR_WRITE | 
     2.9 -          GENERAL1_INTERCEPT_GDTR_READ     | GENERAL1_INTERCEPT_GDTR_WRITE |
    2.10 -          GENERAL1_INTERCEPT_LDTR_READ     | GENERAL1_INTERCEPT_LDTR_WRITE | 
    2.11 -          GENERAL1_INTERCEPT_TR_READ       | GENERAL1_INTERCEPT_TR_WRITE   |
    2.12 -          GENERAL1_INTERCEPT_RDTSC         | GENERAL1_INTERCEPT_PUSHF      |
    2.13 -          GENERAL1_INTERCEPT_SWINT         | GENERAL1_INTERCEPT_POPF       | 
    2.14 -          GENERAL1_INTERCEPT_IRET          | GENERAL1_INTERCEPT_PAUSE      |
    2.15 -          GENERAL1_INTERCEPT_TASK_SWITCH
    2.16 -        );
    2.17 +        GENERAL1_INTERCEPT_INTR         | GENERAL1_INTERCEPT_NMI         |
    2.18 +        GENERAL1_INTERCEPT_SMI          | GENERAL1_INTERCEPT_INIT        |
    2.19 +        GENERAL1_INTERCEPT_CPUID        | GENERAL1_INTERCEPT_INVD        |
    2.20 +        GENERAL1_INTERCEPT_HLT          | GENERAL1_INTERCEPT_INVLPG      | 
    2.21 +        GENERAL1_INTERCEPT_INVLPGA      | GENERAL1_INTERCEPT_IOIO_PROT   |
    2.22 +        GENERAL1_INTERCEPT_MSR_PROT     | GENERAL1_INTERCEPT_SHUTDOWN_EVT;
    2.23  
    2.24      /* turn on the general 2 intercepts */
    2.25      vmcb->general2_intercepts =