ia64/xen-unstable

changeset 17419:3cac47973e15

hvm: Clean out save/restore debug tracing.
Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
author Keir Fraser <keir.fraser@citrix.com>
date Wed Apr 09 15:57:31 2008 +0100 (2008-04-09)
parents aee133a8e5e7
children 506c21c5c555
files xen/arch/x86/hvm/i8254.c xen/arch/x86/hvm/svm/svm.c xen/arch/x86/hvm/vioapic.c xen/arch/x86/hvm/vlapic.c xen/arch/x86/hvm/vmx/vmx.c xen/arch/x86/hvm/vpic.c
line diff
     1.1 --- a/xen/arch/x86/hvm/i8254.c	Wed Apr 09 15:25:16 2008 +0100
     1.2 +++ b/xen/arch/x86/hvm/i8254.c	Wed Apr 09 15:57:31 2008 +0100
     1.3 @@ -401,50 +401,6 @@ void pit_stop_channel0_irq(PITState *pit
     1.4      spin_unlock(&pit->lock);
     1.5  }
     1.6  
     1.7 -#ifdef HVM_DEBUG_SUSPEND
     1.8 -static void pit_info(PITState *pit)
     1.9 -{
    1.10 -    struct hvm_hw_pit_channel *s;
    1.11 -    struct periodic_time *pt;
    1.12 -    int i;
    1.13 -
    1.14 -    for ( i = 0; i < 3; i++ )
    1.15 -    {
    1.16 -        printk("*****pit channel %d's state:*****\n", i);
    1.17 -        s = &pit->hw.channels[i];
    1.18 -        printk("pit 0x%x.\n", s->count);
    1.19 -        printk("pit 0x%x.\n", s->latched_count);
    1.20 -        printk("pit 0x%x.\n", s->count_latched);
    1.21 -        printk("pit 0x%x.\n", s->status_latched);
    1.22 -        printk("pit 0x%x.\n", s->status);
    1.23 -        printk("pit 0x%x.\n", s->read_state);
    1.24 -        printk("pit 0x%x.\n", s->write_state);
    1.25 -        printk("pit 0x%x.\n", s->write_latch);
    1.26 -        printk("pit 0x%x.\n", s->rw_mode);
    1.27 -        printk("pit 0x%x.\n", s->mode);
    1.28 -        printk("pit 0x%x.\n", s->bcd);
    1.29 -        printk("pit 0x%x.\n", s->gate);
    1.30 -        printk("pit %"PRId64"\n", pit->count_load_time[i]);
    1.31 -
    1.32 -    }
    1.33 -
    1.34 -    pt = &pit->pt0;
    1.35 -    printk("pit channel 0 periodic timer:\n", i);
    1.36 -    printk("pt %d.\n", pt->enabled);
    1.37 -    printk("pt %d.\n", pt->one_shot);
    1.38 -    printk("pt %d.\n", pt->irq);
    1.39 -    printk("pt %d.\n", pt->first_injected);
    1.40 -    printk("pt %d.\n", pt->pending_intr_nr);
    1.41 -    printk("pt %d.\n", pt->period);
    1.42 -    printk("pt %"PRId64"\n", pt->period_cycles);
    1.43 -    printk("pt %"PRId64"\n", pt->last_plt_gtime);
    1.44 -}
    1.45 -#else
    1.46 -static void pit_info(PITState *pit)
    1.47 -{
    1.48 -}
    1.49 -#endif
    1.50 -
    1.51  static int pit_save(struct domain *d, hvm_domain_context_t *h)
    1.52  {
    1.53      PITState *pit = domain_vpit(d);
    1.54 @@ -452,9 +408,6 @@ static int pit_save(struct domain *d, hv
    1.55  
    1.56      spin_lock(&pit->lock);
    1.57      
    1.58 -    pit_info(pit);
    1.59 -
    1.60 -    /* Save the PIT hardware state */
    1.61      rc = hvm_save_entry(PIT, 0, h, &pit->hw);
    1.62  
    1.63      spin_unlock(&pit->lock);
    1.64 @@ -469,22 +422,21 @@ static int pit_load(struct domain *d, hv
    1.65  
    1.66      spin_lock(&pit->lock);
    1.67  
    1.68 -    /* Restore the PIT hardware state */
    1.69      if ( hvm_load_entry(PIT, h, &pit->hw) )
    1.70      {
    1.71          spin_unlock(&pit->lock);
    1.72          return 1;
    1.73      }
    1.74      
    1.75 -    /* Recreate platform timers from hardware state.  There will be some 
    1.76 +    /*
    1.77 +     * Recreate platform timers from hardware state.  There will be some 
    1.78       * time jitter here, but the wall-clock will have jumped massively, so 
    1.79 -     * we hope the guest can handle it. */
    1.80 +     * we hope the guest can handle it.
    1.81 +     */
    1.82      pit->pt0.last_plt_gtime = hvm_get_guest_time(d->vcpu[0]);
    1.83      for ( i = 0; i < 3; i++ )
    1.84          pit_load_count(pit, i, pit->hw.channels[i].count);
    1.85  
    1.86 -    pit_info(pit);
    1.87 -
    1.88      spin_unlock(&pit->lock);
    1.89  
    1.90      return 0;
     2.1 --- a/xen/arch/x86/hvm/svm/svm.c	Wed Apr 09 15:25:16 2008 +0100
     2.2 +++ b/xen/arch/x86/hvm/svm/svm.c	Wed Apr 09 15:57:31 2008 +0100
     2.3 @@ -255,11 +255,6 @@ static int svm_vmcb_restore(struct vcpu 
     2.4      svm_update_guest_cr(v, 2);
     2.5      svm_update_guest_cr(v, 4);
     2.6  
     2.7 -#ifdef HVM_DEBUG_SUSPEND
     2.8 -    printk("%s: cr3=0x%"PRIx64", cr0=0x%"PRIx64", cr4=0x%"PRIx64".\n",
     2.9 -           __func__, c->cr3, c->cr0, c->cr4);
    2.10 -#endif
    2.11 -
    2.12      vmcb->sysenter_cs =  c->sysenter_cs;
    2.13      vmcb->sysenter_esp = c->sysenter_esp;
    2.14      vmcb->sysenter_eip = c->sysenter_eip;
     3.1 --- a/xen/arch/x86/hvm/vioapic.c	Wed Apr 09 15:25:16 2008 +0100
     3.2 +++ b/xen/arch/x86/hvm/vioapic.c	Wed Apr 09 15:57:31 2008 +0100
     3.3 @@ -477,45 +477,16 @@ void vioapic_update_EOI(struct domain *d
     3.4      spin_unlock(&d->arch.hvm_domain.irq_lock);
     3.5  }
     3.6  
     3.7 -#ifdef HVM_DEBUG_SUSPEND
     3.8 -static void ioapic_info(struct hvm_hw_vioapic *s)
     3.9 -{
    3.10 -    int i;
    3.11 -    printk("*****ioapic state:*****\n");
    3.12 -    printk("ioapic 0x%x.\n", s->ioregsel);
    3.13 -    printk("ioapic 0x%x.\n", s->id);
    3.14 -    printk("ioapic 0x%lx.\n", s->base_address);
    3.15 -    for (i = 0; i < VIOAPIC_NUM_PINS; i++) {
    3.16 -        printk("ioapic redirtbl[%d]:0x%"PRIx64"\n", i, s->redirtbl[i].bits);
    3.17 -    }
    3.18 -
    3.19 -}
    3.20 -#else
    3.21 -static void ioapic_info(struct hvm_hw_vioapic *s)
    3.22 -{
    3.23 -}
    3.24 -#endif
    3.25 -
    3.26 -
    3.27  static int ioapic_save(struct domain *d, hvm_domain_context_t *h)
    3.28  {
    3.29      struct hvm_hw_vioapic *s = domain_vioapic(d);
    3.30 -    ioapic_info(s);
    3.31 -
    3.32 -    /* save io-apic state*/
    3.33 -    return ( hvm_save_entry(IOAPIC, 0, h, s) );
    3.34 +    return hvm_save_entry(IOAPIC, 0, h, s);
    3.35  }
    3.36  
    3.37  static int ioapic_load(struct domain *d, hvm_domain_context_t *h)
    3.38  {
    3.39      struct hvm_hw_vioapic *s = domain_vioapic(d);
    3.40 -    
    3.41 -    /* restore ioapic state */
    3.42 -    if ( hvm_load_entry(IOAPIC, h, s) != 0 )
    3.43 -        return -EINVAL;
    3.44 -
    3.45 -    ioapic_info(s);
    3.46 -    return 0;
    3.47 +    return hvm_load_entry(IOAPIC, h, s);
    3.48  }
    3.49  
    3.50  HVM_REGISTER_SAVE_RESTORE(IOAPIC, ioapic_save, ioapic_load, 1, HVMSR_PER_DOM);
     4.1 --- a/xen/arch/x86/hvm/vlapic.c	Wed Apr 09 15:25:16 2008 +0100
     4.2 +++ b/xen/arch/x86/hvm/vlapic.c	Wed Apr 09 15:57:31 2008 +0100
     4.3 @@ -791,75 +791,54 @@ void vlapic_reset(struct vlapic *vlapic)
     4.4      vlapic->hw.disabled |= VLAPIC_SW_DISABLED;
     4.5  }
     4.6  
     4.7 -#ifdef HVM_DEBUG_SUSPEND
     4.8 -static void lapic_info(struct vlapic *s)
     4.9 -{
    4.10 -    printk("*****lapic state:*****\n");
    4.11 -    printk("lapic 0x%"PRIx64".\n", s->hw.apic_base_msr);
    4.12 -    printk("lapic 0x%x.\n", s->hw.disabled);
    4.13 -    printk("lapic 0x%x.\n", s->hw.timer_divisor);
    4.14 -}
    4.15 -#else
    4.16 -static void lapic_info(struct vlapic *s)
    4.17 -{
    4.18 -}
    4.19 -#endif
    4.20 -
    4.21  /* rearm the actimer if needed, after a HVM restore */
    4.22  static void lapic_rearm(struct vlapic *s)
    4.23  {
    4.24 -    unsigned long tmict;
    4.25 -
    4.26 -    tmict = vlapic_get_reg(s, APIC_TMICT);
    4.27 -    if ( tmict > 0 )
    4.28 -    {
    4.29 -        uint64_t period = (uint64_t)APIC_BUS_CYCLE_NS *
    4.30 -                            (uint32_t)tmict * s->hw.timer_divisor;
    4.31 -        uint32_t lvtt = vlapic_get_reg(s, APIC_LVTT);
    4.32 +    unsigned long tmict = vlapic_get_reg(s, APIC_TMICT);
    4.33 +    uint64_t period;
    4.34  
    4.35 -        s->pt.irq = lvtt & APIC_VECTOR_MASK;
    4.36 -        create_periodic_time(vlapic_vcpu(s), &s->pt, period, s->pt.irq,
    4.37 -                             !vlapic_lvtt_period(s), vlapic_pt_cb,
    4.38 -                             &s->timer_last_update);
    4.39 -        s->timer_last_update = s->pt.last_plt_gtime;
    4.40 +    if ( (tmict = vlapic_get_reg(s, APIC_TMICT)) == 0 )
    4.41 +        return;
    4.42  
    4.43 -        printk("lapic_load to rearm the actimer:"
    4.44 -               "bus cycle is %uns, "
    4.45 -               "saved tmict count %lu, period %"PRIu64"ns, irq=%"PRIu8"\n",
    4.46 -               APIC_BUS_CYCLE_NS, tmict, period, s->pt.irq);
    4.47 -    }
    4.48 -
    4.49 -    lapic_info(s);
    4.50 +    period = ((uint64_t)APIC_BUS_CYCLE_NS *
    4.51 +              (uint32_t)tmict * s->hw.timer_divisor);
    4.52 +    s->pt.irq = vlapic_get_reg(s, APIC_LVTT) & APIC_VECTOR_MASK;
    4.53 +    create_periodic_time(vlapic_vcpu(s), &s->pt, period, s->pt.irq,
    4.54 +                         !vlapic_lvtt_period(s), vlapic_pt_cb,
    4.55 +                         &s->timer_last_update);
    4.56 +    s->timer_last_update = s->pt.last_plt_gtime;
    4.57  }
    4.58  
    4.59  static int lapic_save_hidden(struct domain *d, hvm_domain_context_t *h)
    4.60  {
    4.61      struct vcpu *v;
    4.62      struct vlapic *s;
    4.63 +    int rc = 0;
    4.64  
    4.65 -    for_each_vcpu(d, v)
    4.66 +    for_each_vcpu ( d, v )
    4.67      {
    4.68          s = vcpu_vlapic(v);
    4.69 -        lapic_info(s);
    4.70 +        if ( (rc = hvm_save_entry(LAPIC, v->vcpu_id, h, &s->hw)) != 0 )
    4.71 +            break;
    4.72 +    }
    4.73  
    4.74 -        if ( hvm_save_entry(LAPIC, v->vcpu_id, h, &s->hw) != 0 )
    4.75 -            return 1; 
    4.76 -    }
    4.77 -    return 0;
    4.78 +    return rc;
    4.79  }
    4.80  
    4.81  static int lapic_save_regs(struct domain *d, hvm_domain_context_t *h)
    4.82  {
    4.83      struct vcpu *v;
    4.84      struct vlapic *s;
    4.85 +    int rc = 0;
    4.86  
    4.87 -    for_each_vcpu(d, v)
    4.88 +    for_each_vcpu ( d, v )
    4.89      {
    4.90          s = vcpu_vlapic(v);
    4.91 -        if ( hvm_save_entry(LAPIC_REGS, v->vcpu_id, h, s->regs) != 0 )
    4.92 -            return 1; 
    4.93 +        if ( (rc = hvm_save_entry(LAPIC_REGS, v->vcpu_id, h, s->regs)) != 0 )
    4.94 +            break;
    4.95      }
    4.96 -    return 0;
    4.97 +
    4.98 +    return rc;
    4.99  }
   4.100  
   4.101  static int lapic_load_hidden(struct domain *d, hvm_domain_context_t *h)
   4.102 @@ -880,8 +859,6 @@ static int lapic_load_hidden(struct doma
   4.103      if ( hvm_load_entry(LAPIC, h, &s->hw) != 0 ) 
   4.104          return -EINVAL;
   4.105  
   4.106 -    lapic_info(s);
   4.107 -
   4.108      vmx_vlapic_msr_changed(v);
   4.109  
   4.110      return 0;
     5.1 --- a/xen/arch/x86/hvm/vmx/vmx.c	Wed Apr 09 15:25:16 2008 +0100
     5.2 +++ b/xen/arch/x86/hvm/vmx/vmx.c	Wed Apr 09 15:57:31 2008 +0100
     5.3 @@ -561,11 +561,6 @@ static int vmx_vmcs_restore(struct vcpu 
     5.4      vmx_update_guest_cr(v, 2);
     5.5      vmx_update_guest_cr(v, 4);
     5.6  
     5.7 -#ifdef HVM_DEBUG_SUSPEND
     5.8 -    printk("%s: cr3=0x%"PRIx64", cr0=0x%"PRIx64", cr4=0x%"PRIx64".\n",
     5.9 -           __func__, c->cr3, c->cr0, c->cr4);
    5.10 -#endif
    5.11 -
    5.12      v->arch.hvm_vcpu.guest_efer = c->msr_efer;
    5.13      vmx_update_guest_efer(v);
    5.14  
    5.15 @@ -596,20 +591,6 @@ static int vmx_vmcs_restore(struct vcpu 
    5.16      return 0;
    5.17  }
    5.18  
    5.19 -#if defined(__x86_64__) && defined(HVM_DEBUG_SUSPEND)
    5.20 -static void dump_msr_state(struct vmx_msr_state *m)
    5.21 -{
    5.22 -    int i = 0;
    5.23 -    printk("**** msr state ****\n");
    5.24 -    printk("shadow_gs=0x%lx, flags=0x%lx, msr_items:", m->shadow_gs, m->flags);
    5.25 -    for ( i = 0; i < VMX_MSR_COUNT; i++ )
    5.26 -        printk("0x%lx,", m->msrs[i]);
    5.27 -    printk("\n");
    5.28 -}
    5.29 -#else
    5.30 -#define dump_msr_state(m) ((void)0)
    5.31 -#endif
    5.32 -
    5.33  static void vmx_save_cpu_state(struct vcpu *v, struct hvm_hw_cpu *data)
    5.34  {
    5.35  #ifdef __x86_64__
    5.36 @@ -627,8 +608,6 @@ static void vmx_save_cpu_state(struct vc
    5.37  #endif
    5.38  
    5.39      data->tsc = hvm_get_guest_time(v);
    5.40 -
    5.41 -    dump_msr_state(guest_state);
    5.42  }
    5.43  
    5.44  static void vmx_load_cpu_state(struct vcpu *v, struct hvm_hw_cpu *data)
    5.45 @@ -647,8 +626,6 @@ static void vmx_load_cpu_state(struct vc
    5.46  #endif
    5.47  
    5.48      hvm_set_guest_time(v, data->tsc);
    5.49 -
    5.50 -    dump_msr_state(guest_state);
    5.51  }
    5.52  
    5.53  
     6.1 --- a/xen/arch/x86/hvm/vpic.c	Wed Apr 09 15:25:16 2008 +0100
     6.2 +++ b/xen/arch/x86/hvm/vpic.c	Wed Apr 09 15:57:31 2008 +0100
     6.3 @@ -363,32 +363,6 @@ static int vpic_intercept_elcr_io(
     6.4      return 1;
     6.5  }
     6.6  
     6.7 -#ifdef HVM_DEBUG_SUSPEND
     6.8 -static void vpic_info(struct hvm_hw_vpic *s)
     6.9 -{
    6.10 -    printk("*****pic state:*****\n");
    6.11 -    printk("pic 0x%x.\n", s->irr);
    6.12 -    printk("pic 0x%x.\n", s->imr);
    6.13 -    printk("pic 0x%x.\n", s->isr);
    6.14 -    printk("pic 0x%x.\n", s->irq_base);
    6.15 -    printk("pic 0x%x.\n", s->init_state);
    6.16 -    printk("pic 0x%x.\n", s->priority_add);
    6.17 -    printk("pic 0x%x.\n", s->readsel_isr);
    6.18 -    printk("pic 0x%x.\n", s->poll);
    6.19 -    printk("pic 0x%x.\n", s->auto_eoi);
    6.20 -    printk("pic 0x%x.\n", s->rotate_on_auto_eoi);
    6.21 -    printk("pic 0x%x.\n", s->special_fully_nested_mode);
    6.22 -    printk("pic 0x%x.\n", s->special_mask_mode);
    6.23 -    printk("pic 0x%x.\n", s->elcr);
    6.24 -    printk("pic 0x%x.\n", s->int_output);
    6.25 -    printk("pic 0x%x.\n", s->is_master);
    6.26 -}
    6.27 -#else
    6.28 -static void vpic_info(struct hvm_hw_vpic *s)
    6.29 -{
    6.30 -}
    6.31 -#endif
    6.32 -
    6.33  static int vpic_save(struct domain *d, hvm_domain_context_t *h)
    6.34  {
    6.35      struct hvm_hw_vpic *s;
    6.36 @@ -398,7 +372,6 @@ static int vpic_save(struct domain *d, h
    6.37      for ( i = 0; i < 2 ; i++ )
    6.38      {
    6.39          s = &d->arch.hvm_domain.vpic[i];
    6.40 -        vpic_info(s);
    6.41          if ( hvm_save_entry(PIC, i, h, s) )
    6.42              return 1;
    6.43      }
    6.44 @@ -421,7 +394,6 @@ static int vpic_load(struct domain *d, h
    6.45      if ( hvm_load_entry(PIC, h, s) != 0 )
    6.46          return -EINVAL;
    6.47  
    6.48 -    vpic_info(s);
    6.49      return 0;
    6.50  }
    6.51