ia64/xen-unstable

changeset 15741:3876b4e7cc0a

x86-64: pv wrmsr emulation fix

Make sure the upper 32 bits of RAX are disregarded during MSR write
emulation.

Signed-off-by: Jan Beulich <jbeulich@novell.com>
Signed-off-by: Keir Fraser <keir@xensource.com>
author kfraser@localhost.localdomain
date Thu Aug 09 16:02:33 2007 +0100 (2007-08-09)
parents db21f714d37f
children f0298301ba8b
files xen/arch/x86/traps.c
line diff
     1.1 --- a/xen/arch/x86/traps.c	Thu Aug 09 15:16:51 2007 +0100
     1.2 +++ b/xen/arch/x86/traps.c	Thu Aug 09 16:02:33 2007 +0100
     1.3 @@ -1219,7 +1219,7 @@ static int emulate_privileged_op(struct 
     1.4      unsigned long code_base, code_limit;
     1.5      char io_emul_stub[16];
     1.6      void (*io_emul)(struct cpu_user_regs *) __attribute__((__regparm__(1)));
     1.7 -    u32 l, h;
     1.8 +    u32 l, h, eax, edx;
     1.9  
    1.10      if ( !read_descriptor(regs->cs, v, regs,
    1.11                            &code_base, &code_limit, &ar,
    1.12 @@ -1696,43 +1696,43 @@ static int emulate_privileged_op(struct 
    1.13          break;
    1.14  
    1.15      case 0x30: /* WRMSR */
    1.16 +        eax = regs->eax;
    1.17 +        edx = regs->edx;
    1.18 +        res = ((u64)edx << 32) | eax;
    1.19          switch ( regs->ecx )
    1.20          {
    1.21  #ifdef CONFIG_X86_64
    1.22          case MSR_FS_BASE:
    1.23              if ( is_pv_32on64_vcpu(v) )
    1.24                  goto fail;
    1.25 -            if ( wrmsr_safe(MSR_FS_BASE, regs->eax, regs->edx) )
    1.26 +            if ( wrmsr_safe(MSR_FS_BASE, eax, edx) )
    1.27                  goto fail;
    1.28 -            v->arch.guest_context.fs_base =
    1.29 -                ((u64)regs->edx << 32) | regs->eax;
    1.30 +            v->arch.guest_context.fs_base = res;
    1.31              break;
    1.32          case MSR_GS_BASE:
    1.33              if ( is_pv_32on64_vcpu(v) )
    1.34                  goto fail;
    1.35 -            if ( wrmsr_safe(MSR_GS_BASE, regs->eax, regs->edx) )
    1.36 +            if ( wrmsr_safe(MSR_GS_BASE, eax, edx) )
    1.37                  goto fail;
    1.38 -            v->arch.guest_context.gs_base_kernel =
    1.39 -                ((u64)regs->edx << 32) | regs->eax;
    1.40 +            v->arch.guest_context.gs_base_kernel = res;
    1.41              break;
    1.42          case MSR_SHADOW_GS_BASE:
    1.43              if ( is_pv_32on64_vcpu(v) )
    1.44                  goto fail;
    1.45 -            if ( wrmsr_safe(MSR_SHADOW_GS_BASE, regs->eax, regs->edx) )
    1.46 +            if ( wrmsr_safe(MSR_SHADOW_GS_BASE, eax, edx) )
    1.47                  goto fail;
    1.48 -            v->arch.guest_context.gs_base_user =
    1.49 -                ((u64)regs->edx << 32) | regs->eax;
    1.50 +            v->arch.guest_context.gs_base_user = res;
    1.51              break;
    1.52  #endif
    1.53          default:
    1.54 -            if ( wrmsr_hypervisor_regs(regs->ecx, regs->eax, regs->edx) )
    1.55 +            if ( wrmsr_hypervisor_regs(regs->ecx, eax, edx) )
    1.56                  break;
    1.57  
    1.58              if ( (rdmsr_safe(regs->ecx, l, h) != 0) ||
    1.59 -                 (regs->eax != l) || (regs->edx != h) )
    1.60 +                 (eax != l) || (edx != h) )
    1.61                  gdprintk(XENLOG_WARNING, "Domain attempted WRMSR %p from "
    1.62 -                        "%08x:%08x to %08lx:%08lx.\n",
    1.63 -                        _p(regs->ecx), h, l, (long)regs->edx, (long)regs->eax);
    1.64 +                        "%08x:%08x to %08x:%08x.\n",
    1.65 +                        _p(regs->ecx), h, l, edx, eax);
    1.66              break;
    1.67          }
    1.68          break;