1.1 --- a/tools/python/xen/util/pci.py	Fri Oct 10 10:18:06 2008 +0100
     1.2 +++ b/tools/python/xen/util/pci.py	Fri Oct 10 11:52:26 2008 +0100
     1.3 @@ -475,14 +475,17 @@ class PciDevice:
     1.4          sysfs_mnt = find_sysfs_mnt()
     1.5          parent_path = sysfs_mnt + SYSFS_PCI_DEVS_PATH + '/' + \
     1.6              target_bus + SYSFS_PCI_DEV_CONFIG_PATH
     1.7 -        fd = os.open(parent_path, os.O_WRONLY)
     1.8 +        fd = os.open(parent_path, os.O_RDWR)
     1.9 +        # Save state of bridge control register - restore after reset
    1.10 +        os.lseek(fd, PCI_CB_BRIDGE_CONTROL, 0)
    1.11 +        br_cntl = (struct.unpack('H', os.read(fd, 2)))[0]
    1.12          # Assert Secondary Bus Reset
    1.13          os.lseek(fd, PCI_CB_BRIDGE_CONTROL, 0)
    1.14          os.write(fd, struct.pack('I', PCI_BRIDGE_CTL_BUS_RESET))
    1.15          time.sleep(0.200)
    1.16          # De-assert Secondary Bus Reset
    1.17 -        os.lseek(fd, 0x3e, 0)
    1.18 -        os.write(fd, struct.pack('I', 0x00))
    1.19 +        os.lseek(fd, PCI_CB_BRIDGE_CONTROL, 0)
    1.20 +        os.write(fd, struct.pack('H', br_cntl))
    1.21          time.sleep(0.200)
    1.22          os.close(fd)
    1.23