2.1 --- a/linux-2.6.10-rc2-xen-sparse/arch/xen/kernel/evtchn.c	Fri Nov 19 11:29:58 2004 +0000
     2.2 +++ b/linux-2.6.10-rc2-xen-sparse/arch/xen/kernel/evtchn.c	Fri Nov 19 11:50:59 2004 +0000
     2.3 @@ -76,7 +76,7 @@ extern fastcall unsigned int do_IRQ(stru
     2.4  } while (0)
     2.5  #endif
     2.6  
     2.7 -#define VALID_EVTCHN(_chn) ((_chn) != -1)
     2.8 +#define VALID_EVTCHN(_chn) ((_chn) >= 0)
     2.9  
    2.10  /*
    2.11   * Force a proper event-channel callback from Xen after clearing the
    2.12 @@ -235,35 +235,51 @@ void unbind_evtchn_from_irq(int evtchn)
    2.13  
    2.14  static unsigned int startup_dynirq(unsigned int irq)
    2.15  {
    2.16 -    unmask_evtchn(irq_to_evtchn[irq]);
    2.17 +    int evtchn = irq_to_evtchn[irq];
    2.18 +
    2.19 +    if ( !VALID_EVTCHN(evtchn) )
    2.20 +        return 0;
    2.21 +    unmask_evtchn(evtchn);
    2.22      return 0;
    2.23  }
    2.24  
    2.25  static void shutdown_dynirq(unsigned int irq)
    2.26  {
    2.27 -    mask_evtchn(irq_to_evtchn[irq]);
    2.28 +    int evtchn = irq_to_evtchn[irq];
    2.29 +
    2.30 +    if ( !VALID_EVTCHN(evtchn) )
    2.31 +        return;
    2.32 +    mask_evtchn(evtchn);
    2.33  }
    2.34  
    2.35  static void enable_dynirq(unsigned int irq)
    2.36  {
    2.37 -    unmask_evtchn(irq_to_evtchn[irq]);
    2.38 +    int evtchn = irq_to_evtchn[irq];
    2.39 +
    2.40 +    unmask_evtchn(evtchn);
    2.41  }
    2.42  
    2.43  static void disable_dynirq(unsigned int irq)
    2.44  {
    2.45 -    mask_evtchn(irq_to_evtchn[irq]);
    2.46 +    int evtchn = irq_to_evtchn[irq];
    2.47 +
    2.48 +    mask_evtchn(evtchn);
    2.49  }
    2.50  
    2.51  static void ack_dynirq(unsigned int irq)
    2.52  {
    2.53 -    mask_evtchn(irq_to_evtchn[irq]);
    2.54 -    clear_evtchn(irq_to_evtchn[irq]);
    2.55 +    int evtchn = irq_to_evtchn[irq];
    2.56 +
    2.57 +    mask_evtchn(evtchn);
    2.58 +    clear_evtchn(evtchn);
    2.59  }
    2.60  
    2.61  static void end_dynirq(unsigned int irq)
    2.62  {
    2.63 +    int evtchn = irq_to_evtchn[irq];
    2.64 +
    2.65      if ( !(irq_desc[irq].status & IRQ_DISABLED) )
    2.66 -        unmask_evtchn(irq_to_evtchn[irq]);
    2.67 +        unmask_evtchn(evtchn);
    2.68  }
    2.69  
    2.70  static struct hw_interrupt_type dynirq_type = {

     3.1 --- a/xen/arch/x86/domain.c	Fri Nov 19 11:29:58 2004 +0000
     3.2 +++ b/xen/arch/x86/domain.c	Fri Nov 19 11:50:59 2004 +0000
     3.3 @@ -389,60 +389,23 @@ void switch_to(struct domain *prev_p, st
     3.4          write_ptbase(&next_p->mm);
     3.5      }
     3.6  
     3.7 -    if ( unlikely(prev_p->io_bitmap != NULL) || 
     3.8 -         unlikely(next_p->io_bitmap != NULL) )
     3.9 +    if ( unlikely(prev_p->thread.io_bitmap != NULL) )
    3.10      {
    3.11 -        if ( next_p->io_bitmap != NULL )
    3.12 -        {
    3.13 -            /* Copy in the appropriate parts of the IO bitmap.  We use the
    3.14 -             * selector to copy only the interesting parts of the bitmap. */
    3.15 -
    3.16 -            u64 old_sel = ~0ULL; /* IO bitmap selector for previous task. */
    3.17 -
    3.18 -            if ( prev_p->io_bitmap != NULL)
    3.19 -            {
    3.20 -                old_sel = prev_p->io_bitmap_sel;
    3.21 -
    3.22 -                /* Replace any areas of the IO bitmap that had bits cleared. */
    3.23 -                for ( i = 0; i < sizeof(prev_p->io_bitmap_sel) * 8; i++ )
    3.24 -                    if ( !test_bit(i, &prev_p->io_bitmap_sel) )
    3.25 -                        memcpy(&tss->io_bitmap[i * IOBMP_SELBIT_LWORDS],
    3.26 -                               &next_p->io_bitmap[i * IOBMP_SELBIT_LWORDS],
    3.27 -                               IOBMP_SELBIT_LWORDS * sizeof(unsigned long));
    3.28 -            }
    3.29 +        for ( i = 0; i < sizeof(prev_p->thread.io_bitmap_sel) * 8; i++ )
    3.30 +            if ( !test_bit(i, &prev_p->thread.io_bitmap_sel) )
    3.31 +                memset(&tss->io_bitmap[i * IOBMP_BYTES_PER_SELBIT],
    3.32 +                       ~0U, IOBMP_BYTES_PER_SELBIT);
    3.33 +        tss->bitmap = IOBMP_INVALID_OFFSET;
    3.34 +    }
    3.35  
    3.36 -            /* Copy in any regions of the new task's bitmap that have bits
    3.37 -             * clear and we haven't already dealt with. */
    3.38 -            for ( i = 0; i < sizeof(prev_p->io_bitmap_sel) * 8; i++ )
    3.39 -            {
    3.40 -                if ( test_bit(i, &old_sel)
    3.41 -                     && !test_bit(i, &next_p->io_bitmap_sel) )
    3.42 -                    memcpy(&tss->io_bitmap[i * IOBMP_SELBIT_LWORDS],
    3.43 -                           &next_p->io_bitmap[i * IOBMP_SELBIT_LWORDS],
    3.44 -                           IOBMP_SELBIT_LWORDS * sizeof(unsigned long));
    3.45 -            }
    3.46 -
    3.47 -            tss->bitmap = IO_BITMAP_OFFSET;
    3.48 -
    3.49 -	}
    3.50 -        else
    3.51 -        {
    3.52 -            /* In this case, we're switching FROM a task with IO port access,
    3.53 -             * to a task that doesn't use the IO bitmap.  We set any TSS bits
    3.54 -             * that might have been cleared, ready for future use. */
    3.55 -            for ( i = 0; i < sizeof(prev_p->io_bitmap_sel) * 8; i++ )
    3.56 -                if ( !test_bit(i, &prev_p->io_bitmap_sel) )
    3.57 -                    memset(&tss->io_bitmap[i * IOBMP_SELBIT_LWORDS],
    3.58 -                           0xFF, IOBMP_SELBIT_LWORDS * sizeof(unsigned long));
    3.59 -
    3.60 -            /*
    3.61 -             * a bitmap offset pointing outside of the TSS limit
    3.62 -             * causes a nicely controllable SIGSEGV if a process
    3.63 -             * tries to use a port IO instruction. The first
    3.64 -             * sys_ioperm() call sets up the bitmap properly.
    3.65 -             */
    3.66 -            tss->bitmap = INVALID_IO_BITMAP_OFFSET;
    3.67 -	}
    3.68 +    if ( unlikely(next_p->thread.io_bitmap != NULL) )
    3.69 +    {
    3.70 +        for ( i = 0; i < sizeof(next_p->thread.io_bitmap_sel) * 8; i++ )
    3.71 +            if ( !test_bit(i, &next_p->thread.io_bitmap_sel) )
    3.72 +                memcpy(&tss->io_bitmap[i * IOBMP_BYTES_PER_SELBIT],
    3.73 +                       &next_p->thread.io_bitmap[i * IOBMP_BYTES_PER_SELBIT],
    3.74 +                       IOBMP_BYTES_PER_SELBIT);
    3.75 +        tss->bitmap = IOBMP_OFFSET;
    3.76      }
    3.77  
    3.78      set_current(next_p);

     4.1 --- a/xen/arch/x86/memory.c	Fri Nov 19 11:29:58 2004 +0000
     4.2 +++ b/xen/arch/x86/memory.c	Fri Nov 19 11:50:59 2004 +0000
     4.3 @@ -1809,8 +1809,7 @@ int ptwr_do_page_fault(unsigned long add
     4.4          domain_crash();
     4.5      }
     4.6      
     4.7 -    /* Maybe fall through to shadow mode to propagate writable L1. */
     4.8 -    return !current->mm.shadow_mode;
     4.9 +    return EXCRET_fault_fixed;
    4.10  }
    4.11  
    4.12  static __init int ptwr_init(void)

     5.1 --- a/xen/arch/x86/setup.c	Fri Nov 19 11:29:58 2004 +0000
     5.2 +++ b/xen/arch/x86/setup.c	Fri Nov 19 11:50:59 2004 +0000
     5.3 @@ -268,7 +268,7 @@ void __init cpu_init(void)
     5.4          panic("CPU#%d already initialized!!!\n", nr);
     5.5      printk("Initializing CPU#%d\n", nr);
     5.6  
     5.7 -    t->bitmap = INVALID_IO_BITMAP_OFFSET;
     5.8 +    t->bitmap = IOBMP_INVALID_OFFSET;
     5.9      memset(t->io_bitmap, ~0, sizeof(t->io_bitmap));
    5.10  
    5.11      /* Set up GDT and IDT. */

     6.1 --- a/xen/arch/x86/shadow.c	Fri Nov 19 11:29:58 2004 +0000
     6.2 +++ b/xen/arch/x86/shadow.c	Fri Nov 19 11:50:59 2004 +0000
     6.3 @@ -636,7 +636,7 @@ int shadow_fault(unsigned long va, long 
     6.4      shadow_unlock(m);
     6.5  
     6.6      check_pagetable(m, current->mm.pagetable, "post-sf");
     6.7 -    return 1;
     6.8 +    return EXCRET_fault_fixed;
     6.9  }
    6.10  
    6.11  

     7.1 --- a/xen/arch/x86/traps.c	Fri Nov 19 11:29:58 2004 +0000
     7.2 +++ b/xen/arch/x86/traps.c	Fri Nov 19 11:50:59 2004 +0000
     7.3 @@ -228,7 +228,7 @@ asmlinkage void fatal_trap(int trapnr, s
     7.4          __asm__ __volatile__ ( "hlt" );
     7.5  }
     7.6  
     7.7 -static inline void do_trap(int trapnr, char *str,
     7.8 +static inline int do_trap(int trapnr, char *str,
     7.9                             struct xen_regs *regs, 
    7.10                             long error_code, int use_error_code)
    7.11  {
    7.12 @@ -249,7 +249,7 @@ static inline void do_trap(int trapnr, c
    7.13      tb->eip        = ti->address;
    7.14      if ( TI_GET_IF(ti) )
    7.15          d->shared_info->vcpu_data[0].evtchn_upcall_mask = 1;
    7.16 -    return; 
    7.17 +    return 0;
    7.18  
    7.19   xen_fault:
    7.20  
    7.21 @@ -257,7 +257,7 @@ static inline void do_trap(int trapnr, c
    7.22      {
    7.23          DPRINTK("Trap %d: %08lx -> %08lx\n", trapnr, regs->eip, fixup);
    7.24          regs->eip = fixup;
    7.25 -        return;
    7.26 +        return 0;
    7.27      }
    7.28  
    7.29      DEBUGGER_trap_fatal(trapnr, regs, error_code);
    7.30 @@ -266,18 +266,19 @@ static inline void do_trap(int trapnr, c
    7.31      panic("CPU%d FATAL TRAP: vector = %d (%s)\n"
    7.32            "[error_code=%08x]\n",
    7.33            smp_processor_id(), trapnr, str, error_code);
    7.34 +    return 0;
    7.35  }
    7.36  
    7.37  #define DO_ERROR_NOCODE(trapnr, str, name) \
    7.38 -asmlinkage void do_##name(struct xen_regs * regs, long error_code) \
    7.39 +asmlinkage int do_##name(struct xen_regs * regs, long error_code) \
    7.40  { \
    7.41 -    do_trap(trapnr, str, regs, error_code, 0); \
    7.42 +    return do_trap(trapnr, str, regs, error_code, 0); \
    7.43  }
    7.44  
    7.45  #define DO_ERROR(trapnr, str, name) \
    7.46 -asmlinkage void do_##name(struct xen_regs * regs, long error_code) \
    7.47 +asmlinkage int do_##name(struct xen_regs * regs, long error_code) \
    7.48  { \
    7.49 -    do_trap(trapnr, str, regs, error_code, 1); \
    7.50 +    return do_trap(trapnr, str, regs, error_code, 1); \
    7.51  }
    7.52  
    7.53  DO_ERROR_NOCODE( 0, "divide error", divide_error)
    7.54 @@ -292,7 +293,7 @@ DO_ERROR_NOCODE(16, "fpu error", coproce
    7.55  DO_ERROR(17, "alignment check", alignment_check)
    7.56  DO_ERROR_NOCODE(19, "simd error", simd_coprocessor_error)
    7.57  
    7.58 -asmlinkage void do_int3(struct xen_regs *regs, long error_code)
    7.59 +asmlinkage int do_int3(struct xen_regs *regs, long error_code)
    7.60  {
    7.61      struct domain *d = current;
    7.62      struct trap_bounce *tb = &d->thread.trap_bounce;
    7.63 @@ -316,6 +317,8 @@ asmlinkage void do_int3(struct xen_regs 
    7.64      tb->eip        = ti->address;
    7.65      if ( TI_GET_IF(ti) )
    7.66          d->shared_info->vcpu_data[0].evtchn_upcall_mask = 1;
    7.67 +
    7.68 +    return 0;
    7.69  }
    7.70  
    7.71  asmlinkage void do_double_fault(void)
    7.72 @@ -355,7 +358,7 @@ asmlinkage void do_machine_check(struct 
    7.73      fatal_trap(TRAP_machine_check, regs, error_code);
    7.74  }
    7.75  
    7.76 -asmlinkage void do_page_fault(struct xen_regs *regs, long error_code)
    7.77 +asmlinkage int do_page_fault(struct xen_regs *regs, long error_code)
    7.78  {
    7.79      trap_info_t *ti;
    7.80      unsigned long off, addr, fixup;
    7.81 @@ -377,18 +380,22 @@ asmlinkage void do_page_fault(struct xen
    7.82                        ptwr_info[cpu].ptinfo[PTWR_PT_ACTIVE].l2_idx) )
    7.83          {
    7.84              ptwr_flush(PTWR_PT_ACTIVE);
    7.85 -            return;
    7.86 +            return EXCRET_fault_fixed;
    7.87          }
    7.88  
    7.89          if ( (addr < PAGE_OFFSET) &&
    7.90               ((error_code & 3) == 3) && /* write-protection fault */
    7.91               ptwr_do_page_fault(addr) )
    7.92 -            return;
    7.93 +        {
    7.94 +            if ( unlikely(d->mm.shadow_mode) )
    7.95 +                (void)shadow_fault(addr, error_code);
    7.96 +            return EXCRET_fault_fixed;
    7.97 +        }
    7.98      }
    7.99  
   7.100      if ( unlikely(d->mm.shadow_mode) && 
   7.101           (addr < PAGE_OFFSET) && shadow_fault(addr, error_code) )
   7.102 -        return; /* Returns TRUE if fault was handled. */
   7.103 +        return EXCRET_fault_fixed;
   7.104  
   7.105      if ( unlikely(addr >= LDT_VIRT_START) && 
   7.106           (addr < (LDT_VIRT_START + (d->mm.ldt_ents*LDT_ENTRY_SIZE))) )
   7.107 @@ -400,7 +407,7 @@ asmlinkage void do_page_fault(struct xen
   7.108          off  = addr - LDT_VIRT_START;
   7.109          addr = d->mm.ldt_base + off;
   7.110          if ( likely(map_ldt_shadow_page(off >> PAGE_SHIFT)) )
   7.111 -            return; /* successfully copied the mapping */
   7.112 +            return EXCRET_fault_fixed; /* successfully copied the mapping */
   7.113      }
   7.114  
   7.115      if ( unlikely(!(regs->cs & 3)) )
   7.116 @@ -414,7 +421,7 @@ asmlinkage void do_page_fault(struct xen
   7.117      tb->eip        = ti->address;
   7.118      if ( TI_GET_IF(ti) )
   7.119          d->shared_info->vcpu_data[0].evtchn_upcall_mask = 1;
   7.120 -    return; 
   7.121 +    return 0; 
   7.122  
   7.123   xen_fault:
   7.124  
   7.125 @@ -424,7 +431,7 @@ asmlinkage void do_page_fault(struct xen
   7.126          if ( !d->mm.shadow_mode )
   7.127              DPRINTK("Page fault: %08lx -> %08lx\n", regs->eip, fixup);
   7.128          regs->eip = fixup;
   7.129 -        return;
   7.130 +        return 0;
   7.131      }
   7.132  
   7.133      DEBUGGER_trap_fatal(TRAP_page_fault, regs, error_code);
   7.134 @@ -451,9 +458,10 @@ asmlinkage void do_page_fault(struct xen
   7.135            "[error_code=%08x]\n"
   7.136            "Faulting linear address might be %08lx\n",
   7.137            smp_processor_id(), error_code, addr);
   7.138 +    return 0;
   7.139  }
   7.140  
   7.141 -asmlinkage void do_general_protection(struct xen_regs *regs, long error_code)
   7.142 +asmlinkage int do_general_protection(struct xen_regs *regs, long error_code)
   7.143  {
   7.144      struct domain *d = current;
   7.145      struct trap_bounce *tb = &d->thread.trap_bounce;
   7.146 @@ -502,7 +510,7 @@ asmlinkage void do_general_protection(st
   7.147      if ( VM_ASSIST(d, VMASST_TYPE_4gb_segments) && 
   7.148           (error_code == 0) && 
   7.149           gpf_emulate_4gb(regs) )
   7.150 -        return;
   7.151 +        return 0;
   7.152  #endif
   7.153  
   7.154      /* Pass on GPF as is. */
   7.155 @@ -514,7 +522,7 @@ asmlinkage void do_general_protection(st
   7.156      tb->eip        = ti->address;
   7.157      if ( TI_GET_IF(ti) )
   7.158          d->shared_info->vcpu_data[0].evtchn_upcall_mask = 1;
   7.159 -    return;
   7.160 +    return 0;
   7.161  
   7.162   gp_in_kernel:
   7.163  
   7.164 @@ -522,7 +530,7 @@ asmlinkage void do_general_protection(st
   7.165      {
   7.166          DPRINTK("GPF (%04lx): %08lx -> %08lx\n", error_code, regs->eip, fixup);
   7.167          regs->eip = fixup;
   7.168 -        return;
   7.169 +        return 0;
   7.170      }
   7.171  
   7.172      DEBUGGER_trap_fatal(TRAP_gp_fault, regs, error_code);
   7.173 @@ -530,6 +538,7 @@ asmlinkage void do_general_protection(st
   7.174      show_registers(regs);
   7.175      panic("CPU%d GENERAL PROTECTION FAULT\n"
   7.176            "[error_code=%08x]\n", smp_processor_id(), error_code);
   7.177 +    return 0;
   7.178  }
   7.179  
   7.180  asmlinkage void mem_parity_error(struct xen_regs *regs)
   7.181 @@ -549,8 +558,6 @@ asmlinkage void io_check_error(struct xe
   7.182  
   7.183  static void unknown_nmi_error(unsigned char reason, struct xen_regs * regs)
   7.184  {
   7.185 -    DEBUGGER_trap_entry(TRAP_nmi, regs, 0);
   7.186 -
   7.187      printk("Uhhuh. NMI received for unknown reason %02x.\n", reason);
   7.188      printk("Dazed and confused, but trying to continue\n");
   7.189      printk("Do you have a strange power saving mode enabled?\n");
   7.190 @@ -581,7 +588,7 @@ static void nmi_softirq(void)
   7.191          send_guest_virq(dom0, VIRQ_IO_ERR);
   7.192  }
   7.193  
   7.194 -asmlinkage void math_state_restore(struct xen_regs *regs, long error_code)
   7.195 +asmlinkage int math_state_restore(struct xen_regs *regs, long error_code)
   7.196  {
   7.197      /* Prevent recursion. */
   7.198      clts();
   7.199 @@ -602,9 +609,11 @@ asmlinkage void math_state_restore(struc
   7.200          tb->cs         = current->thread.traps[7].cs;
   7.201          tb->eip        = current->thread.traps[7].address;
   7.202      }
   7.203 +
   7.204 +    return EXCRET_fault_fixed;
   7.205  }
   7.206  
   7.207 -asmlinkage void do_debug(struct xen_regs *regs, long error_code)
   7.208 +asmlinkage int do_debug(struct xen_regs *regs, long error_code)
   7.209  {
   7.210      unsigned int condition;
   7.211      struct domain *d = current;
   7.212 @@ -619,7 +628,7 @@ asmlinkage void do_debug(struct xen_regs
   7.213           (d->thread.debugreg[7] == 0) )
   7.214      {
   7.215          __asm__("movl %0,%%db7" : : "r" (0));
   7.216 -        return;
   7.217 +        goto out;
   7.218      }
   7.219  
   7.220      if ( (regs->cs & 3) == 0 )
   7.221 @@ -632,7 +641,7 @@ asmlinkage void do_debug(struct xen_regs
   7.222           * on it. No need to bump EIP; the only faulting trap is an instruction
   7.223           * breakpoint, which can't happen to us.
   7.224           */
   7.225 -        return;
   7.226 +        goto out;
   7.227      }
   7.228  
   7.229      /* Save debug status register where guest OS can peek at it */
   7.230 @@ -641,13 +650,16 @@ asmlinkage void do_debug(struct xen_regs
   7.231      tb->flags = TBF_TRAP_NOCODE;
   7.232      tb->cs    = d->thread.traps[1].cs;
   7.233      tb->eip   = d->thread.traps[1].address;
   7.234 +
   7.235 + out:
   7.236 +    return EXCRET_not_a_fault;
   7.237  }
   7.238  
   7.239 -
   7.240 -asmlinkage void do_spurious_interrupt_bug(struct xen_regs * regs,
   7.241 -                                          long error_code)
   7.242 -{ /* nothing */ }
   7.243 -
   7.244 +asmlinkage int do_spurious_interrupt_bug(
   7.245 +    struct xen_regs * regs, long error_code)
   7.246 +{
   7.247 +    return EXCRET_not_a_fault;
   7.248 +}
   7.249  
   7.250  #define _set_gate(gate_addr,type,dpl,addr) \
   7.251  do { \
   7.252 @@ -721,7 +733,7 @@ void __init trap_init(void)
   7.253      tss->cs     = __HYPERVISOR_CS;
   7.254      tss->eip    = (unsigned long)do_double_fault;
   7.255      tss->eflags = 2;
   7.256 -    tss->bitmap = INVALID_IO_BITMAP_OFFSET;
   7.257 +    tss->bitmap = IOBMP_INVALID_OFFSET;
   7.258      _set_tssldt_desc(gdt_table+__DOUBLEFAULT_TSS_ENTRY,
   7.259                       (int)tss, 235, 0x89);
   7.260  

     8.1 --- a/xen/common/physdev.c	Fri Nov 19 11:29:58 2004 +0000
     8.2 +++ b/xen/common/physdev.c	Fri Nov 19 11:50:59 2004 +0000
     8.3 @@ -169,16 +169,16 @@ int physdev_pci_access_modify(
     8.4  
     8.5      /* Now, setup access to the IO ports and memory regions for the device. */
     8.6  
     8.7 -    if ( p->io_bitmap == NULL )
     8.8 +    if ( p->thread.io_bitmap == NULL )
     8.9      {
    8.10 -        if ( (p->io_bitmap = xmalloc(IO_BITMAP_BYTES)) == NULL )
    8.11 +        if ( (p->thread.io_bitmap = xmalloc(IOBMP_BYTES)) == NULL )
    8.12          {
    8.13              rc = -ENOMEM;
    8.14              goto out;
    8.15          }
    8.16 -        memset(p->io_bitmap, 0xFF, IO_BITMAP_BYTES);
    8.17 +        memset(p->thread.io_bitmap, 0xFF, IOBMP_BYTES);
    8.18  
    8.19 -        p->io_bitmap_sel = ~0ULL;
    8.20 +        p->thread.io_bitmap_sel = ~0ULL;
    8.21      }
    8.22  
    8.23      for ( i = 0; i < DEVICE_COUNT_RESOURCE; i++ )
    8.24 @@ -195,13 +195,8 @@ int physdev_pci_access_modify(
    8.25                   "for device %s\n", dom, r->start, r->end, pdev->slot_name);
    8.26              for ( j = r->start; j < r->end + 1; j++ )
    8.27              {
    8.28 -                clear_bit(j, p->io_bitmap);
    8.29 -                /* Record that we cleared a bit using bit n of the selector:
    8.30 -                 * n = (j / (4 bytes in a word * 8 bits in a byte))
    8.31 -                 *     / number of words per selector bit
    8.32 -                 */
    8.33 -                clear_bit((j / (8 * 4)) / IOBMP_SELBIT_LWORDS,
    8.34 -                          &p->io_bitmap_sel);
    8.35 +                clear_bit(j, p->thread.io_bitmap);
    8.36 +                clear_bit(j / IOBMP_BITS_PER_SELBIT, &p->thread.io_bitmap_sel);
    8.37              }
    8.38          }
    8.39  

     9.1 --- a/xen/include/asm-x86/debugger.h	Fri Nov 19 11:29:58 2004 +0000
     9.2 +++ b/xen/include/asm-x86/debugger.h	Fri Nov 19 11:50:59 2004 +0000
     9.3 @@ -22,33 +22,13 @@
     9.4  #ifndef __X86_DEBUGGER_H__
     9.5  #define __X86_DEBUGGER_H__
     9.6  
     9.7 -/* Avoid magic vector numbers by using these semi-sensical names. */
     9.8 -#define TRAP_divide_error     0
     9.9 -#define TRAP_debug            1
    9.10 -#define TRAP_nmi              2
    9.11 -#define TRAP_int3             3
    9.12 -#define TRAP_overflow         4
    9.13 -#define TRAP_bounds           5
    9.14 -#define TRAP_invalid_op       6
    9.15 -#define TRAP_no_device        7
    9.16 -#define TRAP_double_fault     8
    9.17 -#define TRAP_copro_seg        9
    9.18 -#define TRAP_invalid_tss     10
    9.19 -#define TRAP_no_segment      11
    9.20 -#define TRAP_stack_error     12
    9.21 -#define TRAP_gp_fault        13
    9.22 -#define TRAP_page_fault      14
    9.23 -#define TRAP_spurious_int    15
    9.24 -#define TRAP_copro_error     16
    9.25 -#define TRAP_alignment_check 17
    9.26 -#define TRAP_machine_check   18
    9.27 -#define TRAP_simd_error      19
    9.28 +#include <asm/processor.h>
    9.29  
    9.30  /* The main trap handlers use these helper macros which include early bail. */
    9.31  #define DEBUGGER_trap_entry(_v, _r, _e) \
    9.32 -    if ( debugger_trap_entry(_v, _r, _e) ) return;
    9.33 +    if ( debugger_trap_entry(_v, _r, _e) ) return EXCRET_fault_fixed;
    9.34  #define DEBUGGER_trap_fatal(_v, _r, _e) \
    9.35 -    if ( debugger_trap_fatal(_v, _r, _e) ) return;
    9.36 +    if ( debugger_trap_fatal(_v, _r, _e) ) return EXCRET_fault_fixed;
    9.37  
    9.38  #ifdef XEN_DEBUGGER
    9.39  

    10.1 --- a/xen/include/asm-x86/processor.h	Fri Nov 19 11:29:58 2004 +0000
    10.2 +++ b/xen/include/asm-x86/processor.h	Fri Nov 19 11:50:59 2004 +0000
    10.3 @@ -85,6 +85,39 @@
    10.4  #define X86_CR4_OSXMMEXCPT	0x0400	/* enable unmasked SSE exceptions */
    10.5  
    10.6  /*
    10.7 + * Trap/fault mnemonics.
    10.8 + */
    10.9 +#define TRAP_divide_error     0
   10.10 +#define TRAP_debug            1
   10.11 +#define TRAP_nmi              2
   10.12 +#define TRAP_int3             3
   10.13 +#define TRAP_overflow         4
   10.14 +#define TRAP_bounds           5
   10.15 +#define TRAP_invalid_op       6
   10.16 +#define TRAP_no_device        7
   10.17 +#define TRAP_double_fault     8
   10.18 +#define TRAP_copro_seg        9
   10.19 +#define TRAP_invalid_tss     10
   10.20 +#define TRAP_no_segment      11
   10.21 +#define TRAP_stack_error     12
   10.22 +#define TRAP_gp_fault        13
   10.23 +#define TRAP_page_fault      14
   10.24 +#define TRAP_spurious_int    15
   10.25 +#define TRAP_copro_error     16
   10.26 +#define TRAP_alignment_check 17
   10.27 +#define TRAP_machine_check   18
   10.28 +#define TRAP_simd_error      19
   10.29 +
   10.30 +/*
   10.31 + * Non-fatal fault/trap handlers return an error code to the caller. If the
   10.32 + * code is non-zero, it means that either the exception was not due to a fault
   10.33 + * (i.e., it was a trap) or that the fault has been fixed up so the instruction
   10.34 + * replay ought to succeed.
   10.35 + */
   10.36 +#define EXCRET_not_a_fault 1 /* It was a trap. No instruction replay needed. */
   10.37 +#define EXCRET_fault_fixed 1 /* It was fault that we fixed: try a replay. */
   10.38 +
   10.39 +/*
   10.40   * 'trap_bounce' flags values.
   10.41   */
   10.42  #define TBF_TRAP        1
   10.43 @@ -244,15 +277,11 @@ static inline void clear_in_cr4 (unsigne
   10.44              :"ax");
   10.45  }
   10.46  
   10.47 -/*
   10.48 - * Size of io_bitmap in longwords:
   10.49 - * For Xen we support the full 8kbyte IO bitmap but use the io_bitmap_sel field
   10.50 - * to avoid a full 8kbyte copy when switching to domains with bits cleared.
   10.51 - */
   10.52 -#define IO_BITMAP_SIZE	2048
   10.53 -#define IO_BITMAP_BYTES (IO_BITMAP_SIZE * 4)
   10.54 -#define IO_BITMAP_OFFSET offsetof(struct tss_struct,io_bitmap)
   10.55 -#define INVALID_IO_BITMAP_OFFSET 0x8000
   10.56 +#define IOBMP_BYTES             8192
   10.57 +#define IOBMP_BYTES_PER_SELBIT  (IOBMP_BYTES / 64)
   10.58 +#define IOBMP_BITS_PER_SELBIT   (IOBMP_BYTES_PER_SELBIT * 8)
   10.59 +#define IOBMP_OFFSET            offsetof(struct tss_struct,io_bitmap)
   10.60 +#define IOBMP_INVALID_OFFSET    0x8000
   10.61  
   10.62  struct i387_state {
   10.63      u8 state[512]; /* big enough for FXSAVE */
   10.64 @@ -293,7 +322,7 @@ struct tss_struct {
   10.65      u16 trace;
   10.66  #endif
   10.67      u16 bitmap;
   10.68 -    u32 io_bitmap[IO_BITMAP_SIZE+1];
   10.69 +    u8  io_bitmap[IOBMP_BYTES];
   10.70      /* Pads the TSS to be cacheline-aligned (total size is 0x2080). */
   10.71      u32 __cacheline_filler[5];
   10.72  };
   10.73 @@ -335,6 +364,11 @@ struct thread_struct {
   10.74      /* Bounce information for propagating an exception to guest OS. */
   10.75      struct trap_bounce trap_bounce;
   10.76  
   10.77 +    /* I/O-port access bitmap. */
   10.78 +    u64 io_bitmap_sel; /* Selector to tell us which part of the IO bitmap are
   10.79 +                        * "interesting" (i.e. have clear bits) */
   10.80 +    u8 *io_bitmap; /* Pointer to task's IO bitmap or NULL */
   10.81 +
   10.82      /* Trap info. */
   10.83  #ifdef __i386__
   10.84      int                fast_trap_idx;

    11.1 --- a/xen/include/xen/sched.h	Fri Nov 19 11:29:58 2004 +0000
    11.2 +++ b/xen/include/xen/sched.h	Fri Nov 19 11:50:59 2004 +0000
    11.3 @@ -104,14 +104,6 @@ struct domain
    11.4      spinlock_t       pcidev_lock;
    11.5      struct list_head pcidev_list;
    11.6  
    11.7 -    /* The following IO bitmap stuff is x86-dependent. */
    11.8 -    u64 io_bitmap_sel; /* Selector to tell us which part of the IO bitmap are
    11.9 -                        * "interesting" (i.e. have clear bits) */
   11.10 -
   11.11 -    /* Handy macro - number of bytes of the IO bitmap, per selector bit. */
   11.12 -#define IOBMP_SELBIT_LWORDS (IO_BITMAP_SIZE / 64)
   11.13 -    unsigned long *io_bitmap; /* Pointer to task's IO bitmap or NULL */
   11.14 -
   11.15      unsigned long flags;
   11.16      unsigned long vm_assist;
   11.17