ia64/xen-unstable

changeset 14930:33e22185002a

xen: Fix up use of trap_bounce structure.
Fixes suggested by Jan Beulich.
Signed-off-by: Keir Fraser <keir@xensource.com>
author kfraser@localhost.localdomain
date Wed Apr 25 13:50:20 2007 +0100 (2007-04-25)
parents 550a795a3dbd
children 0b4375cd7e16
files xen/arch/x86/x86_32/entry.S xen/arch/x86/x86_64/compat/entry.S xen/arch/x86/x86_64/entry.S xen/arch/x86/x86_64/traps.c xen/include/asm-x86/domain.h
line diff
     1.1 --- a/xen/arch/x86/x86_32/entry.S	Wed Apr 25 12:04:55 2007 +0100
     1.2 +++ b/xen/arch/x86/x86_32/entry.S	Wed Apr 25 13:50:20 2007 +0100
     1.3 @@ -75,6 +75,7 @@
     1.4  
     1.5          ALIGN
     1.6  restore_all_guest:
     1.7 +        ASSERT_INTERRUPTS_DISABLED
     1.8          testl $X86_EFLAGS_VM,UREGS_eflags(%esp)
     1.9          jnz  restore_all_vm86
    1.10  #ifdef CONFIG_X86_SUPERVISOR_MODE_KERNEL
    1.11 @@ -129,10 +130,10 @@ failsafe_callback:
    1.12          movl  %eax,TRAPBOUNCE_eip(%edx)
    1.13          movl  VCPU_failsafe_sel(%ebx),%eax
    1.14          movw  %ax,TRAPBOUNCE_cs(%edx)
    1.15 -        movw  $TBF_FAILSAFE,TRAPBOUNCE_flags(%edx)
    1.16 +        movb  $TBF_FAILSAFE,TRAPBOUNCE_flags(%edx)
    1.17          bt    $_VGCF_failsafe_disables_events,VCPU_guest_context_flags(%ebx)
    1.18          jnc   1f
    1.19 -        orw   $TBF_INTERRUPT,TRAPBOUNCE_flags(%edx)
    1.20 +        orb   $TBF_INTERRUPT,TRAPBOUNCE_flags(%edx)
    1.21  1:      call  create_bounce_frame
    1.22          xorl  %eax,%eax
    1.23          movl  %eax,UREGS_ds(%esp)
    1.24 @@ -247,7 +248,7 @@ test_guest_events:
    1.25          movl %eax,TRAPBOUNCE_eip(%edx)
    1.26          movl VCPU_event_sel(%ebx),%eax
    1.27          movw %ax,TRAPBOUNCE_cs(%edx)
    1.28 -        movw $TBF_INTERRUPT,TRAPBOUNCE_flags(%edx)
    1.29 +        movb $TBF_INTERRUPT,TRAPBOUNCE_flags(%edx)
    1.30          call create_bounce_frame
    1.31          jmp  test_all_events
    1.32  
    1.33 @@ -270,7 +271,7 @@ process_nmi:
    1.34          leal VCPU_trap_bounce(%ebx),%edx
    1.35          movl %eax,TRAPBOUNCE_eip(%edx)
    1.36          movw $FLAT_KERNEL_CS,TRAPBOUNCE_cs(%edx)
    1.37 -        movw $TBF_INTERRUPT,TRAPBOUNCE_flags(%edx)
    1.38 +        movb $TBF_INTERRUPT,TRAPBOUNCE_flags(%edx)
    1.39          call create_bounce_frame
    1.40          jmp  test_all_events
    1.41  
    1.42 @@ -383,7 +384,6 @@ 2:      testl $X86_EFLAGS_VM,UREGS_eflag
    1.43          movl %eax,UREGS_cs+4(%esp)
    1.44          movl TRAPBOUNCE_eip(%edx),%eax
    1.45          movl %eax,UREGS_eip+4(%esp)
    1.46 -        movb $0,TRAPBOUNCE_flags(%edx)
    1.47          ret
    1.48  .section __ex_table,"a"
    1.49          .long  .Lft6,domain_crash_synchronous ,  .Lft7,domain_crash_synchronous
    1.50 @@ -441,6 +441,7 @@ 1:      xorl  %eax,%eax
    1.51          testb $TBF_EXCEPTION,TRAPBOUNCE_flags(%edx)
    1.52          jz    test_all_events
    1.53          call  create_bounce_frame
    1.54 +        movb  $0,TRAPBOUNCE_flags(%edx)
    1.55          jmp   test_all_events
    1.56  
    1.57  exception_with_ints_disabled:
     2.1 --- a/xen/arch/x86/x86_64/compat/entry.S	Wed Apr 25 12:04:55 2007 +0100
     2.2 +++ b/xen/arch/x86/x86_64/compat/entry.S	Wed Apr 25 13:50:20 2007 +0100
     2.3 @@ -102,7 +102,7 @@ compat_test_guest_events:
     2.4          movl  %eax,TRAPBOUNCE_eip(%rdx)
     2.5          movl  VCPU_event_sel(%rbx),%eax
     2.6          movl  %eax,TRAPBOUNCE_cs(%rdx)
     2.7 -        movw  $TBF_INTERRUPT,TRAPBOUNCE_flags(%rdx)
     2.8 +        movb  $TBF_INTERRUPT,TRAPBOUNCE_flags(%rdx)
     2.9          call  compat_create_bounce_frame
    2.10          jmp   compat_test_all_events
    2.11  
    2.12 @@ -127,7 +127,7 @@ compat_process_nmi:
    2.13          leaq  VCPU_trap_bounce(%rbx),%rdx
    2.14          movl  %eax,TRAPBOUNCE_eip(%rdx)
    2.15          movl  $FLAT_COMPAT_KERNEL_CS,TRAPBOUNCE_cs(%rdx)
    2.16 -        movw  $TBF_INTERRUPT,TRAPBOUNCE_flags(%rdx)
    2.17 +        movb  $TBF_INTERRUPT,TRAPBOUNCE_flags(%rdx)
    2.18          call  compat_create_bounce_frame
    2.19          jmp   compat_test_all_events
    2.20  
    2.21 @@ -165,12 +165,11 @@ compat_failsafe_callback:
    2.22          movl  %eax,TRAPBOUNCE_eip(%rdx)
    2.23          movl  VCPU_failsafe_sel(%rbx),%eax
    2.24          movl  %eax,TRAPBOUNCE_cs(%rdx)
    2.25 -        movw  $TBF_FAILSAFE,TRAPBOUNCE_flags(%rdx)
    2.26 +        movb  $TBF_FAILSAFE,TRAPBOUNCE_flags(%rdx)
    2.27          btq   $_VGCF_failsafe_disables_events,VCPU_guest_context_flags(%rbx)
    2.28          jnc   1f
    2.29 -        orw   $TBF_INTERRUPT,TRAPBOUNCE_flags(%rdx)
    2.30 -1:
    2.31 -        call  compat_create_bounce_frame
    2.32 +        orb   $TBF_INTERRUPT,TRAPBOUNCE_flags(%rdx)
    2.33 +1:      call  compat_create_bounce_frame
    2.34          jmp   compat_test_all_events
    2.35  .previous
    2.36  .section __pre_ex_table,"a"
    2.37 @@ -185,6 +184,7 @@ ENTRY(compat_post_handle_exception)
    2.38          testb $TBF_EXCEPTION,TRAPBOUNCE_flags(%rdx)
    2.39          jz    compat_test_all_events
    2.40          call  compat_create_bounce_frame
    2.41 +        movb  $0,TRAPBOUNCE_flags(%rdx)
    2.42          jmp   compat_test_all_events
    2.43  
    2.44  ENTRY(compat_int80_direct_trap)
    2.45 @@ -194,7 +194,7 @@ ENTRY(compat_int80_direct_trap)
    2.46  /* CREATE A BASIC EXCEPTION FRAME ON GUEST OS (RING-1) STACK:            */
    2.47  /*   {[ERRCODE,] EIP, CS, EFLAGS, [ESP, SS]}                             */
    2.48  /* %rdx: trap_bounce, %rbx: struct vcpu                                  */
    2.49 -/* On return only %rbx is guaranteed non-clobbered.                      */
    2.50 +/* On return only %rbx and %rdx are guaranteed non-clobbered.            */
    2.51  compat_create_bounce_frame:
    2.52          ASSERT_INTERRUPTS_ENABLED
    2.53          mov   %fs,%edi
    2.54 @@ -253,7 +253,6 @@ 1:
    2.55  2:
    2.56          /* Rewrite our stack frame and return to guest-OS mode. */
    2.57          /* IA32 Ref. Vol. 3: TF, VM, RF and NT flags are cleared on trap. */
    2.58 -        movl  $TRAP_syscall,UREGS_entry_vector+8(%rsp)
    2.59          andl  $~(X86_EFLAGS_VM|X86_EFLAGS_RF|\
    2.60                   X86_EFLAGS_NT|X86_EFLAGS_TF),UREGS_eflags+8(%rsp)
    2.61          mov   %fs,UREGS_ss+8(%rsp)
    2.62 @@ -266,7 +265,6 @@ 2:
    2.63          movl  %eax,UREGS_cs+8(%rsp)
    2.64          movl  TRAPBOUNCE_eip(%rdx),%eax
    2.65          movl  %eax,UREGS_rip+8(%rsp)
    2.66 -        movb  $0,TRAPBOUNCE_flags(%rdx)
    2.67          ret
    2.68  .section .fixup,"ax"
    2.69  .Lfx13:
     3.1 --- a/xen/arch/x86/x86_64/entry.S	Wed Apr 25 12:04:55 2007 +0100
     3.2 +++ b/xen/arch/x86/x86_64/entry.S	Wed Apr 25 13:50:20 2007 +0100
     3.3 @@ -29,10 +29,10 @@ switch_to_kernel:
     3.4          leaq  VCPU_trap_bounce(%rbx),%rdx
     3.5          movq  VCPU_syscall_addr(%rbx),%rax
     3.6          movq  %rax,TRAPBOUNCE_eip(%rdx)
     3.7 -        movw  $0,TRAPBOUNCE_flags(%rdx)
     3.8 +        movb  $0,TRAPBOUNCE_flags(%rdx)
     3.9          bt    $_VGCF_syscall_disables_events,VCPU_guest_context_flags(%rbx)
    3.10          jnc   1f
    3.11 -        orw   $TBF_INTERRUPT,TRAPBOUNCE_flags(%rdx)
    3.12 +        movb  $TBF_INTERRUPT,TRAPBOUNCE_flags(%rdx)
    3.13  1:      call  create_bounce_frame
    3.14          jmp   test_all_events
    3.15  
    3.16 @@ -80,10 +80,10 @@ failsafe_callback:
    3.17          leaq  VCPU_trap_bounce(%rbx),%rdx
    3.18          movq  VCPU_failsafe_addr(%rbx),%rax
    3.19          movq  %rax,TRAPBOUNCE_eip(%rdx)
    3.20 -        movw  $TBF_FAILSAFE,TRAPBOUNCE_flags(%rdx)
    3.21 +        movb  $TBF_FAILSAFE,TRAPBOUNCE_flags(%rdx)
    3.22          bt    $_VGCF_failsafe_disables_events,VCPU_guest_context_flags(%rbx)
    3.23          jnc   1f
    3.24 -        orw   $TBF_INTERRUPT,TRAPBOUNCE_flags(%rdx)
    3.25 +        orb   $TBF_INTERRUPT,TRAPBOUNCE_flags(%rdx)
    3.26  1:      call  create_bounce_frame
    3.27          jmp   test_all_events
    3.28  .previous
    3.29 @@ -191,7 +191,7 @@ test_guest_events:
    3.30          leaq  VCPU_trap_bounce(%rbx),%rdx
    3.31          movq  VCPU_event_addr(%rbx),%rax
    3.32          movq  %rax,TRAPBOUNCE_eip(%rdx)
    3.33 -        movw  $TBF_INTERRUPT,TRAPBOUNCE_flags(%rdx)
    3.34 +        movb  $TBF_INTERRUPT,TRAPBOUNCE_flags(%rdx)
    3.35          call  create_bounce_frame
    3.36          jmp   test_all_events
    3.37  
    3.38 @@ -215,7 +215,7 @@ process_nmi:
    3.39          sti
    3.40          leaq VCPU_trap_bounce(%rbx),%rdx
    3.41          movq %rax,TRAPBOUNCE_eip(%rdx)
    3.42 -        movw $TBF_INTERRUPT,TRAPBOUNCE_flags(%rdx)
    3.43 +        movb $TBF_INTERRUPT,TRAPBOUNCE_flags(%rdx)
    3.44          call create_bounce_frame
    3.45          jmp  test_all_events
    3.46  
    3.47 @@ -231,7 +231,7 @@ ENTRY(int80_direct_trap)
    3.48  
    3.49          /* Check that the callback is non-null. */
    3.50          leaq  VCPU_int80_bounce(%rbx),%rdx
    3.51 -        cmp   $0,TRAPBOUNCE_flags(%rdx)
    3.52 +        cmpb  $0,TRAPBOUNCE_flags(%rdx)
    3.53          jz    int80_slow_path
    3.54  
    3.55          movq  VCPU_domain(%rbx),%rax
    3.56 @@ -249,13 +249,13 @@ int80_slow_path:
    3.57          movl  $((0x80 << 3) | 0x2),UREGS_error_code(%rsp)
    3.58          movl  $TRAP_gp_fault,UREGS_entry_vector(%rsp)
    3.59          /* A GPF wouldn't have incremented the instruction pointer. */
    3.60 -        sub   $2,UREGS_rip(%rsp)
    3.61 +        subq  $2,UREGS_rip(%rsp)
    3.62          jmp   handle_exception_saved
    3.63  
    3.64  /* CREATE A BASIC EXCEPTION FRAME ON GUEST OS STACK:                     */
    3.65  /*   { RCX, R11, [DS-GS,] [CR2,] [ERRCODE,] RIP, CS, RFLAGS, RSP, SS }   */
    3.66 -/* %rdx: trap_bounce, %rbx: struct vcpu                           */
    3.67 -/* On return only %rbx is guaranteed non-clobbered.                      */
    3.68 +/* %rdx: trap_bounce, %rbx: struct vcpu                                  */
    3.69 +/* On return only %rbx and %rdx are guaranteed non-clobbered.            */
    3.70  create_bounce_frame:
    3.71          ASSERT_INTERRUPTS_ENABLED
    3.72          testb $TF_kernel_mode,VCPU_thread_flags(%rbx)
    3.73 @@ -336,7 +336,6 @@ 2:      subq  $16,%rsi
    3.74          testq %rax,%rax
    3.75          jz    domain_crash_synchronous
    3.76          movq  %rax,UREGS_rip+8(%rsp)
    3.77 -        movb  $0,TRAPBOUNCE_flags(%rdx)
    3.78          ret
    3.79  .section __ex_table,"a"
    3.80          .quad  .Lft2,domain_crash_synchronous ,  .Lft3,domain_crash_synchronous
    3.81 @@ -401,6 +400,7 @@ 1:      movq  %rsp,%rdi
    3.82          testb $TBF_EXCEPTION,TRAPBOUNCE_flags(%rdx)
    3.83          jz    test_all_events
    3.84          call  create_bounce_frame
    3.85 +        movb  $0,TRAPBOUNCE_flags(%rdx)
    3.86          jmp   test_all_events
    3.87  
    3.88  /* No special register assumptions. */
     4.1 --- a/xen/arch/x86/x86_64/traps.c	Wed Apr 25 12:04:55 2007 +0100
     4.2 +++ b/xen/arch/x86/x86_64/traps.c	Wed Apr 25 13:50:20 2007 +0100
     4.3 @@ -357,9 +357,6 @@ void init_int80_direct_trap(struct vcpu 
     4.4      struct trap_info *ti = &v->arch.guest_context.trap_ctxt[0x80];
     4.5      struct trap_bounce *tb = &v->arch.int80_bounce;
     4.6  
     4.7 -    if ( !guest_gate_selector_okay(v->domain, ti->cs) )
     4.8 -         return;
     4.9 -
    4.10      tb->flags = TBF_EXCEPTION;
    4.11      tb->cs    = ti->cs;
    4.12      tb->eip   = ti->address;
     5.1 --- a/xen/include/asm-x86/domain.h	Wed Apr 25 12:04:55 2007 +0100
     5.2 +++ b/xen/include/asm-x86/domain.h	Wed Apr 25 13:50:20 2007 +0100
     5.3 @@ -8,10 +8,10 @@
     5.4  #include <asm/e820.h>
     5.5  
     5.6  struct trap_bounce {
     5.7 -    unsigned long  error_code;
     5.8 -    unsigned short flags; /* TBF_ */
     5.9 -    unsigned short cs;
    5.10 -    unsigned long  eip;
    5.11 +    uint32_t      error_code;
    5.12 +    uint8_t       flags; /* TBF_ */
    5.13 +    uint16_t      cs;
    5.14 +    unsigned long eip;
    5.15  };
    5.16  
    5.17  #define MAPHASH_ENTRIES 8