ia64/xen-unstable

changeset 9311:3377e445aa5e

Fix VMX cpuid handling when EAX == 4.
When eax == 4, ecx should contain cache level.

Signed-off-by: Xin Li <xin.b.li@intel.com>
author kaf24@firebug.cl.cam.ac.uk
date Fri Mar 17 16:25:04 2006 +0100 (2006-03-17)
parents 843ced27531a
children 25003dd43a92 ea67b8a9c7e0
files xen/arch/x86/hvm/vmx/vmx.c
line diff
     1.1 --- a/xen/arch/x86/hvm/vmx/vmx.c	Fri Mar 17 11:45:46 2006 +0100
     1.2 +++ b/xen/arch/x86/hvm/vmx/vmx.c	Fri Mar 17 16:25:04 2006 +0100
     1.3 @@ -670,27 +670,31 @@ static void vmx_do_no_device_fault(void)
     1.4  /* Reserved bits: [31:15], [12:11], [9], [6], [2:1] */
     1.5  #define VMX_VCPU_CPUID_L1_RESERVED 0xffff9a46
     1.6  
     1.7 -static void vmx_vmexit_do_cpuid(unsigned long input, struct cpu_user_regs *regs)
     1.8 +static void vmx_vmexit_do_cpuid(struct cpu_user_regs *regs)
     1.9  {
    1.10 +    unsigned int input = (unsigned int)regs->eax;
    1.11 +    unsigned int count = (unsigned int)regs->ecx;
    1.12      unsigned int eax, ebx, ecx, edx;
    1.13      unsigned long eip;
    1.14      struct vcpu *v = current;
    1.15  
    1.16      __vmread(GUEST_RIP, &eip);
    1.17  
    1.18 -    HVM_DBG_LOG(DBG_LEVEL_1,
    1.19 -                "do_cpuid: (eax) %lx, (ebx) %lx, (ecx) %lx, (edx) %lx,"
    1.20 -                " (esi) %lx, (edi) %lx",
    1.21 +    HVM_DBG_LOG(DBG_LEVEL_3, "(eax) 0x%08lx, (ebx) 0x%08lx, "
    1.22 +                "(ecx) 0x%08lx, (edx) 0x%08lx, (esi) 0x%08lx, (edi) 0x%08lx",
    1.23                  (unsigned long)regs->eax, (unsigned long)regs->ebx,
    1.24                  (unsigned long)regs->ecx, (unsigned long)regs->edx,
    1.25                  (unsigned long)regs->esi, (unsigned long)regs->edi);
    1.26  
    1.27 -    cpuid(input, &eax, &ebx, &ecx, &edx);
    1.28 +    if ( input == 4 )
    1.29 +        cpuid_count(input, count, &eax, &ebx, &ecx, &edx);
    1.30 +    else
    1.31 +        cpuid(input, &eax, &ebx, &ecx, &edx);
    1.32  
    1.33      if ( input == 1 )
    1.34      {
    1.35          if ( hvm_apic_support(v->domain) &&
    1.36 -                !vlapic_global_enabled((VLAPIC(v))) )
    1.37 +             !vlapic_global_enabled((VLAPIC(v))) )
    1.38              clear_bit(X86_FEATURE_APIC, &edx);
    1.39  
    1.40  #if CONFIG_PAGING_LEVELS < 3
    1.41 @@ -725,10 +729,12 @@ static void vmx_vmexit_do_cpuid(unsigned
    1.42      regs->ecx = (unsigned long) ecx;
    1.43      regs->edx = (unsigned long) edx;
    1.44  
    1.45 -    HVM_DBG_LOG(DBG_LEVEL_1,
    1.46 -                "vmx_vmexit_do_cpuid: eip: %lx, input: %lx, out:eax=%x, ebx=%x, ecx=%x, edx=%x",
    1.47 -                eip, input, eax, ebx, ecx, edx);
    1.48 -
    1.49 +    HVM_DBG_LOG(DBG_LEVEL_3, "eip@%lx, input: 0x%lx, "
    1.50 +                "output: eax = 0x%08lx, ebx = 0x%08lx, "
    1.51 +                "ecx = 0x%08lx, edx = 0x%08lx",
    1.52 +                (unsigned long)eip, (unsigned long)input,
    1.53 +                (unsigned long)eax, (unsigned long)ebx,
    1.54 +                (unsigned long)ecx, (unsigned long)edx);
    1.55  }
    1.56  
    1.57  #define CASE_GET_REG_P(REG, reg)    \
    1.58 @@ -2014,8 +2020,8 @@ asmlinkage void vmx_vmexit_handler(struc
    1.59          __hvm_bug(&regs);
    1.60          break;
    1.61      case EXIT_REASON_CPUID:
    1.62 +        vmx_vmexit_do_cpuid(&regs);
    1.63          __get_instruction_length(inst_len);
    1.64 -        vmx_vmexit_do_cpuid(regs.eax, &regs);
    1.65          __update_guest_eip(inst_len);
    1.66          break;
    1.67      case EXIT_REASON_HLT: