ia64/xen-unstable

changeset 18655:314df03b7d61

NMI watchdog: don't try to run too slow.

The way MSR writes of performance counters works means that Intel
CPUs running faster than about 2.1GHz can't set the NMI timer to 1Hz.

Signed-off-by: Tim Deegan <Tim.Deegan@citrix.com>
author Keir Fraser <keir.fraser@citrix.com>
date Mon Oct 20 15:11:19 2008 +0100 (2008-10-20)
parents 0a09de68c541
children d8a156bdef14
files xen/arch/x86/nmi.c
line diff
     1.1 --- a/xen/arch/x86/nmi.c	Mon Oct 20 15:08:24 2008 +0100
     1.2 +++ b/xen/arch/x86/nmi.c	Mon Oct 20 15:11:19 2008 +0100
     1.3 @@ -122,10 +122,17 @@ int __init check_nmi_watchdog (void)
     1.4  
     1.5      printk("\n");
     1.6  
     1.7 -    /* now that we know it works we can reduce NMI frequency to
     1.8 -       something more reasonable; makes a difference in some configs */
     1.9 +    /*
    1.10 +     * Now that we know it works we can reduce NMI frequency to
    1.11 +     * something more reasonable; makes a difference in some configs.
    1.12 +     * There's a limit to how slow we can go because writing the perfctr
    1.13 +     * MSRs only sets the low 32 bits, with the top 8 bits sign-extended
    1.14 +     * from those, so it's not possible to set up a delay larger than
    1.15 +     * 2^31 cycles and smaller than (2^40 - 2^31) cycles. 
    1.16 +     * (Intel SDM, section 18.22.2)
    1.17 +     */
    1.18      if ( nmi_watchdog == NMI_LOCAL_APIC )
    1.19 -        nmi_hz = 1;
    1.20 +        nmi_hz = max(1ul, cpu_khz >> 20);
    1.21  
    1.22      return 0;
    1.23  }