ia64/xen-unstable

changeset 13892:3050c8339da6

x86: hide assembly labels

Prevent the fault recovery labels to clutter the symbol table and the
disassembly.

Signed-off-by: Jan Beulich <jbeulich@novell.com>
author Keir Fraser <keir@xensource.com>
date Thu Feb 08 18:18:56 2007 +0000 (2007-02-08)
parents 0cbf1586a432
children 9e27245a692e
files xen/arch/x86/x86_32/entry.S xen/arch/x86/x86_64/compat/entry.S xen/arch/x86/x86_64/entry.S
line diff
     1.1 --- a/xen/arch/x86/x86_32/entry.S	Thu Feb 08 18:01:42 2007 +0000
     1.2 +++ b/xen/arch/x86/x86_32/entry.S	Thu Feb 08 18:18:56 2007 +0000
     1.3 @@ -84,10 +84,10 @@ restore_all_guest:
     1.4          jmp   restore_all_vm86
     1.5  1:
     1.6  #endif
     1.7 -FLT1:   mov  UREGS_ds(%esp),%ds
     1.8 -FLT2:   mov  UREGS_es(%esp),%es
     1.9 -FLT3:   mov  UREGS_fs(%esp),%fs
    1.10 -FLT4:   mov  UREGS_gs(%esp),%gs
    1.11 +.Lft1:  mov  UREGS_ds(%esp),%ds
    1.12 +.Lft2:  mov  UREGS_es(%esp),%es
    1.13 +.Lft3:  mov  UREGS_fs(%esp),%fs
    1.14 +.Lft4:  mov  UREGS_gs(%esp),%gs
    1.15  restore_all_vm86:
    1.16          popl %ebx
    1.17          popl %ecx
    1.18 @@ -97,9 +97,9 @@ restore_all_vm86:
    1.19          popl %ebp
    1.20          popl %eax
    1.21          addl $4,%esp
    1.22 -FLT5:   iret
    1.23 +.Lft5:  iret
    1.24  .section .fixup,"ax"
    1.25 -FIX5:   subl  $28,%esp
    1.26 +.Lfx5:  subl  $28,%esp
    1.27          pushl 28(%esp)                 # error_code/entry_vector
    1.28          movl  %eax,UREGS_eax+4(%esp)
    1.29          movl  %ebp,UREGS_ebp+4(%esp)
    1.30 @@ -108,7 +108,7 @@ FIX5:   subl  $28,%esp
    1.31          movl  %edx,UREGS_edx+4(%esp)
    1.32          movl  %ecx,UREGS_ecx+4(%esp)
    1.33          movl  %ebx,UREGS_ebx+4(%esp)
    1.34 -FIX1:   SET_XEN_SEGMENTS(a)
    1.35 +.Lfx1:  SET_XEN_SEGMENTS(a)
    1.36          movl  %eax,%fs
    1.37          movl  %eax,%gs
    1.38          sti
    1.39 @@ -116,11 +116,11 @@ FIX1:   SET_XEN_SEGMENTS(a)
    1.40          pushfl                         # EFLAGS
    1.41          movl  $__HYPERVISOR_CS,%eax
    1.42          pushl %eax                     # CS
    1.43 -        movl  $DBLFLT1,%eax
    1.44 +        movl  $.Ldf1,%eax
    1.45          pushl %eax                     # EIP
    1.46          pushl %esi                     # error_code/entry_vector
    1.47          jmp   handle_exception
    1.48 -DBLFLT1:GET_CURRENT(%ebx)
    1.49 +.Ldf1:  GET_CURRENT(%ebx)
    1.50          jmp   test_all_events
    1.51  failsafe_callback:
    1.52          GET_CURRENT(%ebx)
    1.53 @@ -142,14 +142,14 @@ 1:      call  create_bounce_frame
    1.54          jmp   test_all_events
    1.55  .previous
    1.56  .section __pre_ex_table,"a"
    1.57 -        .long FLT1,FIX1
    1.58 -        .long FLT2,FIX1
    1.59 -        .long FLT3,FIX1
    1.60 -        .long FLT4,FIX1
    1.61 -        .long FLT5,FIX5
    1.62 +        .long .Lft1,.Lfx1
    1.63 +        .long .Lft2,.Lfx1
    1.64 +        .long .Lft3,.Lfx1
    1.65 +        .long .Lft4,.Lfx1
    1.66 +        .long .Lft5,.Lfx5
    1.67  .previous
    1.68  .section __ex_table,"a"
    1.69 -        .long DBLFLT1,failsafe_callback
    1.70 +        .long .Ldf1,failsafe_callback
    1.71  .previous
    1.72  
    1.73          ALIGN
    1.74 @@ -288,32 +288,33 @@ create_bounce_frame:
    1.75          testl $(2|X86_EFLAGS_VM),%ecx
    1.76          jz   ring1 /* jump if returning to an existing ring-1 activation */
    1.77          movl VCPU_kernel_sp(%ebx),%esi
    1.78 -FLT6:   mov  VCPU_kernel_ss(%ebx),%gs
    1.79 +.Lft6:  mov  VCPU_kernel_ss(%ebx),%gs
    1.80          testl $X86_EFLAGS_VM,UREGS_eflags+4(%esp)
    1.81 -        jz   nvm86_1
    1.82 +        jz   .Lnvm86_1
    1.83          subl $16,%esi       /* push ES/DS/FS/GS (VM86 stack frame) */
    1.84          movl UREGS_es+4(%esp),%eax
    1.85 -FLT7:   movl %eax,%gs:(%esi)
    1.86 +.Lft7:  movl %eax,%gs:(%esi)
    1.87          movl UREGS_ds+4(%esp),%eax
    1.88 -FLT8:   movl %eax,%gs:4(%esi)
    1.89 +.Lft8:  movl %eax,%gs:4(%esi)
    1.90          movl UREGS_fs+4(%esp),%eax
    1.91 -FLT9:   movl %eax,%gs:8(%esi)
    1.92 +.Lft9:  movl %eax,%gs:8(%esi)
    1.93          movl UREGS_gs+4(%esp),%eax
    1.94 -FLT10:  movl %eax,%gs:12(%esi)
    1.95 -nvm86_1:subl $8,%esi        /* push SS/ESP (inter-priv iret) */
    1.96 +.Lft10: movl %eax,%gs:12(%esi)
    1.97 +.Lnvm86_1:
    1.98 +        subl $8,%esi        /* push SS/ESP (inter-priv iret) */
    1.99          movl UREGS_esp+4(%esp),%eax
   1.100 -FLT11:  movl %eax,%gs:(%esi) 
   1.101 +.Lft11: movl %eax,%gs:(%esi)
   1.102          movl UREGS_ss+4(%esp),%eax
   1.103 -FLT12:  movl %eax,%gs:4(%esi) 
   1.104 +.Lft12: movl %eax,%gs:4(%esi)
   1.105          jmp 1f
   1.106  ring1:  /* obtain ss/esp from oldss/oldesp -- a ring-1 activation exists */
   1.107          movl UREGS_esp+4(%esp),%esi
   1.108 -FLT13:  mov  UREGS_ss+4(%esp),%gs 
   1.109 +.Lft13: mov  UREGS_ss+4(%esp),%gs
   1.110  1:      /* Construct a stack frame: EFLAGS, CS/EIP */
   1.111          movb TRAPBOUNCE_flags(%edx),%cl
   1.112          subl $12,%esi
   1.113          movl UREGS_eip+4(%esp),%eax
   1.114 -FLT14:  movl %eax,%gs:(%esi) 
   1.115 +.Lft14: movl %eax,%gs:(%esi)
   1.116          movl VCPU_vcpu_info(%ebx),%eax
   1.117          pushl VCPUINFO_upcall_mask(%eax)
   1.118          testb $TBF_INTERRUPT,%cl
   1.119 @@ -324,49 +325,51 @@ FLT14:  movl %eax,%gs:(%esi)
   1.120          movw UREGS_cs+4(%esp),%ax        # Bits  0-15: CS
   1.121  #ifdef CONFIG_X86_SUPERVISOR_MODE_KERNEL
   1.122          testw $2,%ax
   1.123 -        jnz  FLT15
   1.124 +        jnz  .Lft15
   1.125          and  $~3,%ax                     # RPL 1 -> RPL 0
   1.126  #endif
   1.127 -FLT15:  movl %eax,%gs:4(%esi) 
   1.128 +.Lft15: movl %eax,%gs:4(%esi)
   1.129          test $0x00FF0000,%eax            # Bits 16-23: saved_upcall_mask
   1.130          setz %ch                         # %ch == !saved_upcall_mask
   1.131          movl UREGS_eflags+4(%esp),%eax
   1.132          andl $~X86_EFLAGS_IF,%eax
   1.133          shlb $1,%ch                      # Bit 9 (EFLAGS.IF)
   1.134          orb  %ch,%ah                     # Fold EFLAGS.IF into %eax
   1.135 -FLT16:  movl %eax,%gs:8(%esi)
   1.136 +.Lft16: movl %eax,%gs:8(%esi)
   1.137          test $TBF_EXCEPTION_ERRCODE,%cl
   1.138          jz   1f
   1.139          subl $4,%esi                    # push error_code onto guest frame
   1.140          movl TRAPBOUNCE_error_code(%edx),%eax
   1.141 -FLT17:  movl %eax,%gs:(%esi)
   1.142 +.Lft17: movl %eax,%gs:(%esi)
   1.143  1:      testb $TBF_FAILSAFE,%cl
   1.144          jz   2f
   1.145          subl $16,%esi                # add DS/ES/FS/GS to failsafe stack frame
   1.146          testl $X86_EFLAGS_VM,UREGS_eflags+4(%esp)
   1.147 -        jz   nvm86_2
   1.148 +        jz   .Lnvm86_2
   1.149          xorl %eax,%eax               # VM86: we write zero selector values
   1.150 -FLT18:  movl %eax,%gs:(%esi) 
   1.151 -FLT19:  movl %eax,%gs:4(%esi)
   1.152 -FLT20:  movl %eax,%gs:8(%esi) 
   1.153 -FLT21:  movl %eax,%gs:12(%esi)
   1.154 +.Lft18: movl %eax,%gs:(%esi)
   1.155 +.Lft19: movl %eax,%gs:4(%esi)
   1.156 +.Lft20: movl %eax,%gs:8(%esi)
   1.157 +.Lft21: movl %eax,%gs:12(%esi)
   1.158          jmp  2f
   1.159 -nvm86_2:movl UREGS_ds+4(%esp),%eax   # non-VM86: write real selector values
   1.160 -FLT22:  movl %eax,%gs:(%esi) 
   1.161 +.Lnvm86_2:
   1.162 +        movl UREGS_ds+4(%esp),%eax   # non-VM86: write real selector values
   1.163 +.Lft22: movl %eax,%gs:(%esi)
   1.164          movl UREGS_es+4(%esp),%eax
   1.165 -FLT23:  movl %eax,%gs:4(%esi)
   1.166 +.Lft23: movl %eax,%gs:4(%esi)
   1.167          movl UREGS_fs+4(%esp),%eax
   1.168 -FLT24:  movl %eax,%gs:8(%esi) 
   1.169 +.Lft24: movl %eax,%gs:8(%esi)
   1.170          movl UREGS_gs+4(%esp),%eax
   1.171 -FLT25:  movl %eax,%gs:12(%esi)
   1.172 +.Lft25: movl %eax,%gs:12(%esi)
   1.173  2:      testl $X86_EFLAGS_VM,UREGS_eflags+4(%esp)
   1.174 -        jz   nvm86_3
   1.175 +        jz   .Lnvm86_3
   1.176          xorl %eax,%eax      /* zero DS-GS, just as a real CPU would */
   1.177          movl %eax,UREGS_ds+4(%esp)
   1.178          movl %eax,UREGS_es+4(%esp)
   1.179          movl %eax,UREGS_fs+4(%esp)
   1.180          movl %eax,UREGS_gs+4(%esp)
   1.181 -nvm86_3:/* Rewrite our stack frame and return to ring 1. */
   1.182 +.Lnvm86_3:
   1.183 +        /* Rewrite our stack frame and return to ring 1. */
   1.184          /* IA32 Ref. Vol. 3: TF, VM, RF and NT flags are cleared on trap. */
   1.185          andl $~(X86_EFLAGS_VM|X86_EFLAGS_RF|\
   1.186                  X86_EFLAGS_NT|X86_EFLAGS_TF),UREGS_eflags+4(%esp)
   1.187 @@ -382,16 +385,16 @@ nvm86_3:/* Rewrite our stack frame and r
   1.188          movb $0,TRAPBOUNCE_flags(%edx)
   1.189          ret
   1.190  .section __ex_table,"a"
   1.191 -        .long  FLT6,domain_crash_synchronous ,  FLT7,domain_crash_synchronous
   1.192 -        .long  FLT8,domain_crash_synchronous ,  FLT9,domain_crash_synchronous
   1.193 -        .long FLT10,domain_crash_synchronous , FLT11,domain_crash_synchronous
   1.194 -        .long FLT12,domain_crash_synchronous , FLT13,domain_crash_synchronous
   1.195 -        .long FLT14,domain_crash_synchronous , FLT15,domain_crash_synchronous
   1.196 -        .long FLT16,domain_crash_synchronous , FLT17,domain_crash_synchronous
   1.197 -        .long FLT18,domain_crash_synchronous , FLT19,domain_crash_synchronous
   1.198 -        .long FLT20,domain_crash_synchronous , FLT21,domain_crash_synchronous
   1.199 -        .long FLT22,domain_crash_synchronous , FLT23,domain_crash_synchronous
   1.200 -        .long FLT24,domain_crash_synchronous , FLT25,domain_crash_synchronous
   1.201 +        .long  .Lft6,domain_crash_synchronous ,  .Lft7,domain_crash_synchronous
   1.202 +        .long  .Lft8,domain_crash_synchronous ,  .Lft9,domain_crash_synchronous
   1.203 +        .long .Lft10,domain_crash_synchronous , .Lft11,domain_crash_synchronous
   1.204 +        .long .Lft12,domain_crash_synchronous , .Lft13,domain_crash_synchronous
   1.205 +        .long .Lft14,domain_crash_synchronous , .Lft15,domain_crash_synchronous
   1.206 +        .long .Lft16,domain_crash_synchronous , .Lft17,domain_crash_synchronous
   1.207 +        .long .Lft18,domain_crash_synchronous , .Lft19,domain_crash_synchronous
   1.208 +        .long .Lft20,domain_crash_synchronous , .Lft21,domain_crash_synchronous
   1.209 +        .long .Lft22,domain_crash_synchronous , .Lft23,domain_crash_synchronous
   1.210 +        .long .Lft24,domain_crash_synchronous , .Lft25,domain_crash_synchronous
   1.211  .previous
   1.212  
   1.213  domain_crash_synchronous_string:
     2.1 --- a/xen/arch/x86/x86_64/compat/entry.S	Thu Feb 08 18:01:42 2007 +0000
     2.2 +++ b/xen/arch/x86/x86_64/compat/entry.S	Thu Feb 08 18:18:56 2007 +0000
     2.3 @@ -123,10 +123,10 @@ compat_bad_hypercall:
     2.4  compat_restore_all_guest:
     2.5          RESTORE_ALL
     2.6          addq  $8,%rsp
     2.7 -CFLT0:  iretq
     2.8 +.Lft0:  iretq
     2.9  
    2.10  .section .fixup,"ax"
    2.11 -CFIX0:  popq  -15*8-8(%rsp)            # error_code/entry_vector
    2.12 +.Lfx0:  popq  -15*8-8(%rsp)            # error_code/entry_vector
    2.13          SAVE_ALL                       # 15*8 bytes pushed
    2.14          movq  -8(%rsp),%rsi            # error_code/entry_vector
    2.15          sti                            # after stack abuse (-1024(%rsp))
    2.16 @@ -135,11 +135,11 @@ CFIX0:  popq  -15*8-8(%rsp)            #
    2.17          pushq %rax                     # RSP
    2.18          pushfq                         # RFLAGS
    2.19          pushq $__HYPERVISOR_CS         # CS
    2.20 -        leaq  CDBLFLT0(%rip),%rax
    2.21 +        leaq  .Ldf0(%rip),%rax
    2.22          pushq %rax                     # RIP
    2.23          pushq %rsi                     # error_code/entry_vector
    2.24          jmp   handle_exception
    2.25 -CDBLFLT0:GET_CURRENT(%rbx)
    2.26 +.Ldf0:  GET_CURRENT(%rbx)
    2.27          jmp   compat_test_all_events
    2.28  compat_failsafe_callback:
    2.29          GET_CURRENT(%rbx)
    2.30 @@ -157,10 +157,10 @@ 1:
    2.31          jmp   compat_test_all_events
    2.32  .previous
    2.33  .section __pre_ex_table,"a"
    2.34 -	.quad CFLT0,CFIX0
    2.35 +	.quad .Lft0,.Lfx0
    2.36  .previous
    2.37  .section __ex_table,"a"
    2.38 -        .quad CDBLFLT0,compat_failsafe_callback
    2.39 +        .quad .Ldf0,compat_failsafe_callback
    2.40  .previous
    2.41  
    2.42  /* %rdx: trap_bounce, %rbx: struct vcpu */
    2.43 @@ -180,16 +180,16 @@ compat_create_bounce_frame:
    2.44          jz    1f
    2.45          /* Push new frame at registered guest-OS stack base. */
    2.46          movl  VCPU_kernel_sp(%rbx),%esi
    2.47 -CFLT1:  mov   VCPU_kernel_ss(%rbx),%fs
    2.48 +.Lft1:  mov   VCPU_kernel_ss(%rbx),%fs
    2.49          subl  $2*4,%esi
    2.50          movl  UREGS_rsp+8(%rsp),%eax
    2.51 -CFLT2:  movl  %eax,%fs:(%rsi)
    2.52 +.Lft2:  movl  %eax,%fs:(%rsi)
    2.53          movl  UREGS_ss+8(%rsp),%eax
    2.54 -CFLT3:  movl  %eax,%fs:4(%rsi)
    2.55 +.Lft3:  movl  %eax,%fs:4(%rsi)
    2.56          jmp   2f
    2.57  1:      /* In kernel context already: push new frame at existing %rsp. */
    2.58          movl  UREGS_rsp+8(%rsp),%esi
    2.59 -CFLT4:  mov   UREGS_ss+8(%rsp),%fs
    2.60 +.Lft4:  mov   UREGS_ss+8(%rsp),%fs
    2.61  2:
    2.62          movb  TRAPBOUNCE_flags(%rdx),%cl
    2.63          subl  $3*4,%esi
    2.64 @@ -201,7 +201,7 @@ 2:
    2.65          popq  %rax
    2.66          shll  $16,%eax                  # Bits 16-23: saved_upcall_mask
    2.67          movw  UREGS_cs+8(%rsp),%ax      # Bits  0-15: CS
    2.68 -CFLT5:  movl  %eax,%fs:4(%rsi)          # CS / saved_upcall_mask
    2.69 +.Lft5:  movl  %eax,%fs:4(%rsi)          # CS / saved_upcall_mask
    2.70          shrl  $16,%eax
    2.71          testb %al,%al                   # Bits 0-7: saved_upcall_mask
    2.72          setz  %ch                       # %ch == !saved_upcall_mask
    2.73 @@ -209,25 +209,25 @@ CFLT5:  movl  %eax,%fs:4(%rsi)          
    2.74          andl  $~X86_EFLAGS_IF,%eax
    2.75          shlb  $1,%ch                    # Bit 9 (EFLAGS.IF)
    2.76          orb   %ch,%ah                   # Fold EFLAGS.IF into %eax
    2.77 -CFLT6:  movl  %eax,%fs:2*4(%rsi)        # EFLAGS
    2.78 +.Lft6:  movl  %eax,%fs:2*4(%rsi)        # EFLAGS
    2.79          movl  UREGS_rip+8(%rsp),%eax
    2.80 -CFLT7:  movl  %eax,%fs:(%rsi)           # EIP
    2.81 +.Lft7:  movl  %eax,%fs:(%rsi)           # EIP
    2.82          testb $TBF_EXCEPTION_ERRCODE,%cl
    2.83          jz    1f
    2.84          subl  $4,%esi
    2.85          movl  TRAPBOUNCE_error_code(%rdx),%eax
    2.86 -CFLT8:  movl  %eax,%fs:(%rsi)           # ERROR CODE
    2.87 +.Lft8:  movl  %eax,%fs:(%rsi)           # ERROR CODE
    2.88  1:
    2.89          testb $TBF_FAILSAFE,%cl
    2.90          jz    2f
    2.91          subl  $4*4,%esi
    2.92          movl  %gs,%eax
    2.93 -CFLT9:  movl  %eax,%fs:3*4(%rsi)        # GS
    2.94 -CFLT10: movl  %edi,%fs:2*4(%rsi)        # FS
    2.95 +.Lft9:  movl  %eax,%fs:3*4(%rsi)        # GS
    2.96 +.Lft10: movl  %edi,%fs:2*4(%rsi)        # FS
    2.97          movl  %es,%eax
    2.98 -CFLT11: movl  %eax,%fs:1*4(%rsi)        # ES
    2.99 +.Lft11: movl  %eax,%fs:1*4(%rsi)        # ES
   2.100          movl  %ds,%eax
   2.101 -CFLT12: movl  %eax,%fs:0*4(%rsi)        # DS
   2.102 +.Lft12: movl  %eax,%fs:0*4(%rsi)        # DS
   2.103  2:
   2.104          /* Rewrite our stack frame and return to guest-OS mode. */
   2.105          /* IA32 Ref. Vol. 3: TF, VM, RF and NT flags are cleared on trap. */
   2.106 @@ -236,7 +236,7 @@ 2:
   2.107                   X86_EFLAGS_NT|X86_EFLAGS_TF),UREGS_eflags+8(%rsp)
   2.108          mov   %fs,UREGS_ss+8(%rsp)
   2.109          movl  %esi,UREGS_rsp+8(%rsp)
   2.110 -CFLT13: mov   %edi,%fs
   2.111 +.Lft13: mov   %edi,%fs
   2.112          movzwl TRAPBOUNCE_cs(%rdx),%eax
   2.113          /* Null selectors (0-3) are not allowed. */
   2.114          testl $~3,%eax
   2.115 @@ -247,18 +247,18 @@ CFLT13: mov   %edi,%fs
   2.116          movb  $0,TRAPBOUNCE_flags(%rdx)
   2.117          ret
   2.118  .section .fixup,"ax"
   2.119 -CFIX13:
   2.120 +.Lfx13:
   2.121          xorl  %edi,%edi
   2.122 -        jmp   CFLT13
   2.123 +        jmp   .Lft13
   2.124  .previous
   2.125  .section __ex_table,"a"
   2.126 -        .quad  CFLT1,domain_crash_synchronous  ,  CFLT2,compat_crash_page_fault
   2.127 -        .quad  CFLT3,compat_crash_page_fault_4 ,  CFLT4,domain_crash_synchronous
   2.128 -        .quad  CFLT5,compat_crash_page_fault_4 ,  CFLT6,compat_crash_page_fault_8
   2.129 -        .quad  CFLT7,compat_crash_page_fault   ,  CFLT8,compat_crash_page_fault
   2.130 -        .quad  CFLT9,compat_crash_page_fault_12, CFLT10,compat_crash_page_fault_8
   2.131 -        .quad CFLT11,compat_crash_page_fault_4 , CFLT12,compat_crash_page_fault
   2.132 -        .quad CFLT13,CFIX13
   2.133 +        .quad  .Lft1,domain_crash_synchronous  ,  .Lft2,compat_crash_page_fault
   2.134 +        .quad  .Lft3,compat_crash_page_fault_4 ,  .Lft4,domain_crash_synchronous
   2.135 +        .quad  .Lft5,compat_crash_page_fault_4 ,  .Lft6,compat_crash_page_fault_8
   2.136 +        .quad  .Lft7,compat_crash_page_fault   ,  .Lft8,compat_crash_page_fault
   2.137 +        .quad  .Lft9,compat_crash_page_fault_12, .Lft10,compat_crash_page_fault_8
   2.138 +        .quad .Lft11,compat_crash_page_fault_4 , .Lft12,compat_crash_page_fault
   2.139 +        .quad .Lft13,.Lfx13
   2.140  .previous
   2.141  
   2.142  compat_crash_page_fault_12:
   2.143 @@ -268,17 +268,17 @@ compat_crash_page_fault_8:
   2.144  compat_crash_page_fault_4:
   2.145          addl  $4,%esi
   2.146  compat_crash_page_fault:
   2.147 -CFLT14: mov   %edi,%fs
   2.148 +.Lft14: mov   %edi,%fs
   2.149          movl  %esi,%edi
   2.150          call  show_page_walk
   2.151          jmp   domain_crash_synchronous
   2.152  .section .fixup,"ax"
   2.153 -CFIX14:
   2.154 +.Lfx14:
   2.155          xorl  %edi,%edi
   2.156 -        jmp   CFLT14
   2.157 +        jmp   .Lft14
   2.158  .previous
   2.159  .section __ex_table,"a"
   2.160 -        .quad CFLT14,CFIX14
   2.161 +        .quad .Lft14,.Lfx14
   2.162  .previous
   2.163  
   2.164  .section .rodata, "a", @progbits
     3.1 --- a/xen/arch/x86/x86_64/entry.S	Thu Feb 08 18:01:42 2007 +0000
     3.2 +++ b/xen/arch/x86/x86_64/entry.S	Thu Feb 08 18:18:56 2007 +0000
     3.3 @@ -56,10 +56,10 @@ 1:      sysretl
     3.4  /* No special register assumptions. */
     3.5  iret_exit_to_guest:
     3.6          addq  $8,%rsp
     3.7 -FLT1:   iretq
     3.8 +.Lft1:  iretq
     3.9  
    3.10  .section .fixup,"ax"
    3.11 -FIX1:   popq  -15*8-8(%rsp)            # error_code/entry_vector
    3.12 +.Lfx1:  popq  -15*8-8(%rsp)            # error_code/entry_vector
    3.13          SAVE_ALL                       # 15*8 bytes pushed
    3.14          movq  -8(%rsp),%rsi            # error_code/entry_vector
    3.15          sti                            # after stack abuse (-1024(%rsp))
    3.16 @@ -68,11 +68,11 @@ FIX1:   popq  -15*8-8(%rsp)            #
    3.17          pushq %rax                     # RSP
    3.18          pushf                          # RFLAGS
    3.19          pushq $__HYPERVISOR_CS         # CS
    3.20 -        leaq  DBLFLT1(%rip),%rax
    3.21 +        leaq  .Ldf1(%rip),%rax
    3.22          pushq %rax                     # RIP
    3.23          pushq %rsi                     # error_code/entry_vector
    3.24          jmp   handle_exception
    3.25 -DBLFLT1:GET_CURRENT(%rbx)
    3.26 +.Ldf1:  GET_CURRENT(%rbx)
    3.27          jmp   test_all_events
    3.28  failsafe_callback:
    3.29          GET_CURRENT(%rbx)
    3.30 @@ -87,10 +87,10 @@ 1:      call  create_bounce_frame
    3.31          jmp   test_all_events
    3.32  .previous
    3.33  .section __pre_ex_table,"a"
    3.34 -        .quad FLT1,FIX1
    3.35 +        .quad .Lft1,.Lfx1
    3.36  .previous
    3.37  .section __ex_table,"a"
    3.38 -        .quad DBLFLT1,failsafe_callback
    3.39 +        .quad .Ldf1,failsafe_callback
    3.40  .previous
    3.41  
    3.42          ALIGN
    3.43 @@ -249,9 +249,9 @@ 2:      andq  $~0xf,%rsi                
    3.44  1:      movb  TRAPBOUNCE_flags(%rdx),%cl
    3.45          subq  $40,%rsi
    3.46          movq  UREGS_ss+8(%rsp),%rax
    3.47 -FLT2:   movq  %rax,32(%rsi)             # SS
    3.48 +.Lft2:  movq  %rax,32(%rsi)             # SS
    3.49          movq  UREGS_rsp+8(%rsp),%rax
    3.50 -FLT3:   movq  %rax,24(%rsi)             # RSP
    3.51 +.Lft3:  movq  %rax,24(%rsi)             # RSP
    3.52          movq  VCPU_vcpu_info(%rbx),%rax
    3.53          pushq VCPUINFO_upcall_mask(%rax)
    3.54          testb $TBF_INTERRUPT,%cl
    3.55 @@ -260,7 +260,7 @@ FLT3:   movq  %rax,24(%rsi)             
    3.56          popq  %rax
    3.57          shlq  $32,%rax                  # Bits 32-39: saved_upcall_mask
    3.58          movw  UREGS_cs+8(%rsp),%ax      # Bits  0-15: CS
    3.59 -FLT4:   movq  %rax,8(%rsi)              # CS / saved_upcall_mask
    3.60 +.Lft4:  movq  %rax,8(%rsi)              # CS / saved_upcall_mask
    3.61          shrq  $32,%rax
    3.62          testb $0xFF,%al                 # Bits 0-7: saved_upcall_mask
    3.63          setz  %ch                       # %ch == !saved_upcall_mask
    3.64 @@ -268,30 +268,30 @@ FLT4:   movq  %rax,8(%rsi)              
    3.65          andq  $~X86_EFLAGS_IF,%rax
    3.66          shlb  $1,%ch                    # Bit 9 (EFLAGS.IF)
    3.67          orb   %ch,%ah                   # Fold EFLAGS.IF into %eax
    3.68 -FLT5:   movq  %rax,16(%rsi)             # RFLAGS
    3.69 +.Lft5:  movq  %rax,16(%rsi)             # RFLAGS
    3.70          movq  UREGS_rip+8(%rsp),%rax
    3.71 -FLT6:   movq  %rax,(%rsi)               # RIP
    3.72 +.Lft6:  movq  %rax,(%rsi)               # RIP
    3.73          testb $TBF_EXCEPTION_ERRCODE,%cl
    3.74          jz    1f
    3.75          subq  $8,%rsi
    3.76          movl  TRAPBOUNCE_error_code(%rdx),%eax
    3.77 -FLT7:   movq  %rax,(%rsi)               # ERROR CODE
    3.78 +.Lft7:  movq  %rax,(%rsi)               # ERROR CODE
    3.79  1:      testb $TBF_FAILSAFE,%cl
    3.80          jz    2f
    3.81          subq  $32,%rsi
    3.82          movl  %gs,%eax
    3.83 -FLT8:   movq  %rax,24(%rsi)             # GS
    3.84 +.Lft8:  movq  %rax,24(%rsi)             # GS
    3.85          movl  %fs,%eax
    3.86 -FLT9:   movq  %rax,16(%rsi)             # FS
    3.87 +.Lft9:  movq  %rax,16(%rsi)             # FS
    3.88          movl  %es,%eax
    3.89 -FLT10:  movq  %rax,8(%rsi)              # ES
    3.90 +.Lft10: movq  %rax,8(%rsi)              # ES
    3.91          movl  %ds,%eax
    3.92 -FLT11:  movq  %rax,(%rsi)               # DS
    3.93 +.Lft11: movq  %rax,(%rsi)               # DS
    3.94  2:      subq  $16,%rsi
    3.95          movq  UREGS_r11+8(%rsp),%rax
    3.96 -FLT12:  movq  %rax,8(%rsi)              # R11
    3.97 +.Lft12: movq  %rax,8(%rsi)              # R11
    3.98          movq  UREGS_rcx+8(%rsp),%rax
    3.99 -FLT13:  movq  %rax,(%rsi)               # RCX
   3.100 +.Lft13: movq  %rax,(%rsi)               # RCX
   3.101          /* Rewrite our stack frame and return to guest-OS mode. */
   3.102          /* IA32 Ref. Vol. 3: TF, VM, RF and NT flags are cleared on trap. */
   3.103          /* Also clear AC: alignment checks shouldn't trigger in kernel mode. */
   3.104 @@ -308,12 +308,12 @@ FLT13:  movq  %rax,(%rsi)               
   3.105          movb  $0,TRAPBOUNCE_flags(%rdx)
   3.106          ret
   3.107  .section __ex_table,"a"
   3.108 -        .quad  FLT2,domain_crash_synchronous ,  FLT3,domain_crash_synchronous
   3.109 -        .quad  FLT4,domain_crash_synchronous ,  FLT5,domain_crash_synchronous
   3.110 -        .quad  FLT6,domain_crash_synchronous ,  FLT7,domain_crash_synchronous
   3.111 -        .quad  FLT8,domain_crash_synchronous ,  FLT9,domain_crash_synchronous
   3.112 -        .quad FLT10,domain_crash_synchronous , FLT11,domain_crash_synchronous
   3.113 -        .quad FLT12,domain_crash_synchronous , FLT13,domain_crash_synchronous
   3.114 +        .quad  .Lft2,domain_crash_synchronous ,  .Lft3,domain_crash_synchronous
   3.115 +        .quad  .Lft4,domain_crash_synchronous ,  .Lft5,domain_crash_synchronous
   3.116 +        .quad  .Lft6,domain_crash_synchronous ,  .Lft7,domain_crash_synchronous
   3.117 +        .quad  .Lft8,domain_crash_synchronous ,  .Lft9,domain_crash_synchronous
   3.118 +        .quad .Lft10,domain_crash_synchronous , .Lft11,domain_crash_synchronous
   3.119 +        .quad .Lft12,domain_crash_synchronous , .Lft13,domain_crash_synchronous
   3.120  .previous
   3.121  
   3.122  domain_crash_synchronous_string: